SSM4435M

SSM4435M SSC | Alldatasheet

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Technical content

www.SiliconStandard.com 1 of 6 SSM4435M P-CHANNEL ENHANCEMENT-MODE POWER MOSFET Simple drive requirement BVDSS -30V Low on-resistance R DS(ON) 20mΩ Fast switching ID -8A

Description

I D @ TA=25°C I D @ TA=70°C I DM A PD @ TA=25°C W/ °C TSTG TJ Symbol Value Unit Rthj-amb Thermal Resistance Junction-ambient Max. 50 °C/W Thermal Data Parameter Total Power Dissipation 2.5 W -55 to 150 °C Operating Junction Temperature Range -55 to 150 °C Linear Derating Factor 0.02 Storage Temperature Range Continuous Drain Current3 -6 A Pulsed Drain Current1,2 -50 Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Rating - 30 -8 A ± 20 Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is widely preferred for commercial and industrial surface mount applications and is well suited for low voltage applications such as DC/DC converters. S S S G D D D D SO-8 G D S Rev.2.02 4/18/2004

www.SiliconStandard.com 2 of 6 SSM4435M Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=-250uA -30 - - V ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.037 -V/°C RDS(ON) Static Drain-Source On-Resistance VGS=-10V, ID=-8A - - 20 mΩ VGS=-4.5V, ID=-5A - - 35 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250uA -1 - -3 V gfs Forward Transconductance VDS=-15V, ID=-8A - 20 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-30V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=70oC) VDS=-24V, VGS=0V - - -25 uA IGSS Gate-Source Leakage VGS=- - nA Qg Total Gate Charge2 ID=-4.6A - 36 - nC Qgs Gate-Source Charge VDS=-15V - 5.5 - nC Qgd Gate-Drain ("Miller") Charge VGS=-10V - 3.5 - nC td(on) Turn-on Delay Time2 VDS=-15V - 12 - ns tr Rise Time ID=-1A - 8 - ns td(off) Turn-off Delay Time RG=6Ω , VGS=-10V - 75 - ns tf Fall Time RD=15Ω -4 0- ns Ciss Input Capacitance VGS=0V - 1530 - pF Coss Output Capacitance VDS=-15V - 900 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 280 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=-1.2V - - -2.1 A ISM Pulsed Source Current ( Body Diode )1 - - -50 A VSD Forward On Voltage2 Tj=25°C, IS=-2.1A, VGS=0V - -0.75 -1.2 V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. ± 20V ±100 Rev.2.02 4/18/2004

www.SiliconStandard.com 3 of 6 SSM4435M Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 024681 0 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T C =25 o C V G =-10V V G =-8.0V V G =-6.0V V G =-4.0V 024681 0 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T C =150 o C V G =-4.0V V G =-6.0V V G =-8.0V V G =-10V 34567891 01 1 -V GS (V) RDSON (m ΩΩΩΩ) Id=-8A T c =25 ℃℃℃℃ 0.6 0.8 1.0 1.2 1.4 1.6 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =-8A V G =-10V Rev.2.02 4/18/2004

www.SiliconStandard.com 4 of 6 SSM4435M Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 0.5 1.5 2.5 0 25 50 75 100 125 150 T c , Case Temperature ( o C) PD (W) 25 50 75 100 125 150 T c , Case Temperature ( o C) -ID , Drain Current (A) 0.10 1.00 10.00 100.00 0.1 1 10 100 -V DS (V) -ID (A) T c =25 o C Single Pulse 100us 1ms 10ms 100ms 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (Rthja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 SINGLE PULSE Rev.2.02 4/18/2004

www.SiliconStandard.com 5 of 6 SSM4435M Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 0.01 0.10 1.00 10.00 100.00 -V SD (V) -IS(A) T j =25 o C T j =150 o C 100 1000 10000 1 5 9 13 17 21 25 29 -V DS (V) C (pF) f=1.0MHz Ciss Coss Crss 0 5 10 15 20 25 30 35 40 45 50 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) I D =-4.6A V DS =-15V -50 0 50 100 150 T j , Junction Temperature ( o C) -VGS(th) (V) Rev.2.02 4/18/2004

www.SiliconStandard.com 6 of 6 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. SSM4435M Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG -10V QGS QGD QG Charge 0.5 x RATED TO THE OSCILLOSCOPE -10 V D G S VDS VGS RG RD 0.5 x RATED VDS TO THE OSCILLOSCOPED G S VDS VGS I D I G -1~-3mA Rev.2.02 4/18/2004