SSM4409GEM

SSM4409GEM SSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 5

Technical content

P-CHANNEL ENHANCEMENT MODE POWER MOSFET 08/04/2007 Rev.1.00 www.SiliconStandard.com 1 SSM4409GEM PRODUCT SUMMARY Simple Drive Requirement Low On-resistance Fast Switching Characteristic RoHS Compliant

DESCRIPTION

The Advanced Power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters. ABSOLUTE MAXIMUM RATINGS Pb-free; RoHS-compliant Symbol Units VDS V VGS V ID@TA=25℃ A ID@TA=70℃ A IDM A PD@TA=25℃ W W/℃ TSTG ℃ TJ ℃ Symbol Value Unit Rthj-a Thermal Resistance Junction-ambient3a Max 50 ℃/W Parameter Total Power Dissipation 2.5 -55 to 150 Operating Junction Temperature Range -55 to 150 Linear Derating Factor Storage Temperature Range Continuous Drain Current3a -12 Pulsed Drain Current1 -50 0.02 Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current3a Rating -35 ±20 -14.5 THERMAL DATA BVDSS -35V RDS(ON) 7.5mΩ ID -14.5A S S S G D D D D SO-8 G D S

08/04/2007 Rev.1.00 www.SiliconStandard.com 2 SSM4409GEM Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=-250uA -35 - - V ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA - -0.02 - V/℃ RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-7A - - 7.5 mΩ VGS=-4V, ID=-7A - - 15 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250uA -0.8 - -2 V gfs Forward Transconductance VDS=-10V, ID=-7A - 13 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-30V, VGS=0V - - -10 uA Drain-Source Leakage Current (Tj=70oC) VDS=-24V, VGS=0V - - -25 uA IGSS Gate-Source Leakage VGS=±20V - - ±30 uA Qg Total Gate Charge2 ID=-14A - 55 90 nC Qgs Gate-Source Charge VDS=-30V - 10 - nC Qgd Gate-Drain ("Miller") Charge VGS=-4.5V - 30 - nC td(on) Turn-on Delay Time2 VDS=-15V - 18 - ns tr Rise Time ID=-1A - 10 - ns td(off) Turn-off Delay Time RG=3.3Ω,VGS=-10V - 160 - ns tf Fall Time RD=15Ω - 110 - ns Ciss Input Capacitance VGS=0V - 4100 6600 pF Coss Output Capacitance VDS=-25V - 860 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 770 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=-14A, VGS=0V - - -1.3 V trr Reverse Recovery Time2 IS=-14A, VGS=0V, - 43 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 37 - nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board （a）, t <10sec (a) 1 in2 pad of 2 oz copper (b) 125℃℃℃℃/W when mounted on a 0.003 in2 pad of 2 oz copper ELECTRICAL CHARACTERISTICS @TJ=25 oC (unless otherwise specified )

08/04/2007 Rev.1.00 www.SiliconStandard.com 3 SSM4409GEM Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature 01 23 4 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A =2 5 o C - 10V -5.0 V -4.5 V -3.0 V V G = - 2.5 V 01 23 4 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A = 150 o C -10V - 5.0 V - 4.5 V - 3.0 V V G = - 2.5 V 24 68 10 -V GS , Gate-to-Source Voltage (V) RDS(ON\\) (m ΩΩΩΩ) I D =- 7 A T A =25 ℃℃℃℃ 0.6 1.0 1.4 1.8 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =-7A V G =-10V 0.2 0.6 1.0 1.4 1.8 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized -VGS(th) (V) -V SD , Source-to-Drain Voltage (V) -IS(A) T j =25 o CT j =150 o C

08/04/2007 Rev.1.00 www.SiliconStandard.com 4 SSM4409GEM Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Transfer Characteristics Fig 12. Gate Charge Waveform Q VG -4.5V QGS QGD QG Charge 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 t , Pulse Width (s) Normalized Thermal Response (Rthja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=125oC/W t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 012345 -V GS , Gate-to-Source Voltage (V) -ID , Drain Current (A) T j =150 o CT j =25 o C V DS =-5V 0 30 60 90 120 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) I D = - 14A V DS = - 30 V 0.01 0.1 100 0.1 1 10 100 -V DS , Drain-to-Source Voltage (V) -ID (A) T A =25 o C Single Pulse 1ms 10ms 100ms DC 100 1000 10000 1 5 9 131 72 1 252 9 -V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss

08/04/2007 Rev.1.00 www.SiliconStandard.com 5 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.