SSM40P03GH SSC | Alldatasheet

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www.SiliconStandard.com 1 of 5 P-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low gate-charge BVDSS -30V Simple drive requirement R DS(ON) 28mΩ Fast switching ID -30A

Description

The SSM40P03H is in a TO-252 package, which is widely used for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. The through-hole version, the SSM40P03J in TO-251, is available for low-footprint vertical G D S TO-251 (J) G D S TO-252 (H) SSM40P03GH,J 2/16/2005 Rev.2.2 Absolute Maximum Ratings Symbol Units VDS V VGS V ID @ TC=25°C ID @ TC=100°C IDM A PD @ TC=25°C W/°C TSTG TJ Symbol Value Units Rthj-c Thermal Resistance Junction-case Max. 4.0 °C/W Rthj-a Thermal Resistance Junction-ambient Max. 110 °C/W Rating -30 ±20 -30 A 0.25 31.3 W -55 to 150 °C Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V -18 A Pulsed Drain Current1 -120 Parameter Total Power Dissipation Operating Junction Temperature Range Storage Temperature Range -55 to 150 °C Linear Derating Factor Thermal Data G D S Pb-free lead finish (second-level interconnect) mounting. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance.

www.SiliconStandard.com 2 of 5 SSM40P03GH,J 2/16/2005 Rev.2.2 Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=-250uA -30 - - V Δ BVDSS/ ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.02 - V/°C RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-18A - - 28 mΩ VGS=-4.5V, ID=-14A - - 50 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250uA -1 - V gfs Forward Transconductance VDS=-10V, ID=-18A - 20 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-30V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=150oC) VDS=-24V, VGS=0V - - -25 uA IGSS Gate-Source Leakage VGS= ±20V - - nA Qg Total Gate Charge2 ID=-18A - 14 22 nC Qgs Gate-Source Charge VDS=-24V - 3 - nC Qgd Gate-Drain ("Miller") Charge V GS=-4.5V - 9 - nC td(on) Turn-on Delay Time2 VDS=-15V - 12 - ns tr Rise Time ID=-18A - 56 - ns td(off) Turn-off Delay Time RG=3.3Ω , VGS=-10V - 30 - ns tf Fall Time RD=0.8Ω -5 7- ns Ciss Input Capacitance VGS=0V - 915 1465 pF Coss Output Capacitance VDS=-25V - 280 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 195 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage2 IS=-18A, VGS=0V - - -1.2 V trr Reverse Recovery Time2 IS=-18A, VGS=0V, - 30 - ns Qrr Reverse Recovery Charge dI/dt=-100A/µs - 21 - nC Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. ±100

www.SiliconStandard.com 3 of 5 SSM40P03GH,J 2/16/2005 Rev.2.2 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 24681 0 -V GS , Gate-to-Source Voltage (V) RDS(ON) (mΩ ) I D = -14 A T C =25°C 100 120 02468 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A =2 5o C -10V -7.0V -5.0V -4.5V V G = -3.0 V 0.6 0.8 1.0 1.2 1.4 1.6 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =-1 8 A V G =-10V -V SD , Source-to-Drain Voltage (V) -IS(A) T j =25 o CT j =150 o C 0.0 0.5 1.0 1.5 2.0 2.5 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized -VGS(th) (V) 100 02468 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T A =150 o C -10V -7.0V -5.0V -4.5V V G = -3.0 V

www.SiliconStandard.com 4 of 5 SSM40P03GH,J 2/16/2005 Rev.2.2 Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform td(on) tr td(off)tf VDS VGS 10% 90% Q VG -4.5V QGS QGD QG Charge 0 5 10 15 20 25 30 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) V DS =- 24 V I D =-1 8 A 100 1000 10000 1 5 9 1 31 72 12 52 9 -V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss 0.01 0.1 t , Pulse Width (s) Normalized Thermal Response (R thjc) PDM Duty factor = t/T Peak Tj = PDM x Rthjc + TC t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 0.1 1.0 10.0 100.0 1000.0 0.1 1 10 100 -V DS , Drain-to-Source Voltage (V) -ID (A) T c =25 o C Single Pulse 100us 1ms 10ms 100ms DC

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