SSM2160 AD | Alldatasheet
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REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a SSM2160/SSM2161 Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1996 6- and 4-Channel, Serial Input Master/Balance Volume Controls FUNCTIONAL BLOCK DIAGRAM POWER SUPPLY AND REFERENCE GENERATOR VCA CH1 IN CH1 OUT CLK DATA LD WRITE VREF ∑5-BIT CHANNEL DAC VCA CH2 IN CH2 OUT ∑5-BIT CHANNEL DAC VCA CH3 IN CH3 OUT ∑5-BIT CHANNEL DAC VCA CH4 IN CH4 OUT ∑5-BIT CHANNEL DAC VCA CH5 IN CH5 OUT ∑5-BIT CHANNEL DAC VCA CH6 IN CH6 OUT ∑5-BIT CHANNEL DAC 7-BIT MASTER DAC SHIFT REGISTER AND ADDRESS DECODER STEP SIZE ADJUST CH SET MSTR SET MSTR OUT
FEATURES
Clickless Digitally Controlled Level Adjustment SSM2160: Six Channels SSM2161: Four Channels 7-Bit Master Control Gives 128 Levels of Attenuation 5-Bit Channel Controls Give 32 Levels of Gain Master/Channel Step Size Set by External Resistors 100 dB Dynamic Range Automatic Power On Mute Excellent Audio Characteristics: 0.01% THD+N 0.001% IMD (SMPTE) –90 dBu Noise Floor –80 dB Channel Separation 90 dB SNR Single and Dual Supply Operation
APPLICATIONS
Circle Surround* and AC-3* Decoders DSP Soundfield Processors HDTV and Surround TV Audio Systems Automotive Surround Sound Systems Multiple Input Mixer Consoles and Amplifiers GENERAL DESCRIPTION The SSM2160 and SSM2161 allow digital control of volume of six and four audio channels, respectively, with a master level control and individual channel controls. Low distortion VCAs (Voltage Controlled Amplifiers) are used in the signal path. By using controlled rate-of-change drive to the VCAs, the “click- ing” associated with switched resistive networks is eliminated in the Master control. Each channel is controlled by a dedicated 5-bit DAC providing 32 levels of gain. A master 7-bit DAC feeds every control port giving 128 levels of attenuation. Step sizes are nominally 1 dB and can be changed by external resistors. Channel balance is maintained over the entire master control range. Upon power-up, all outputs are automatically muted. A three- or four-wire serial data bus enables interfacing with most popular microcontrollers. Windows * software and an evaluation board for controlling the SSM2160 are available. The SSM2160 can be operated from single supplies of +10 V to +20 V or dual supplies from ± 5 V to ± 10 V. The SSM2161 can be operated from single supplies of +8.5 V to +20 V (for automotive applications) or dual supplies from ± 4.25 V to ± 10 V. An on-chip reference provides the correct analog common voltage for single supply applications. Both models come in P-DIP and SO packages. See the Ordering Guide for more details. *Circle Surround is a registered trademark of Rocktron Corporation. AC-3 is a registered trademark of Dolby Labs, Inc. Windows is a regis- tered trademark of Microsoft Corp.
–2– REV. 0 SSM2160/SSM2161–SPECIFICATIONS (VS = 66 V, TA = +258C, AV = 0 dB, fAUDIO = 1 kHz, fCLOCK = 250 kHz, RL = 10 kV, unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units AUDIO PERFORMANCE Noise floor NFL V IN = GND, BW= 20 kHz, A V = 0 dB1 –90 dBu Total Harmonic Distortion + Noise THD+N 2nd & 3rd Harmonics Only, VOUT = 0 dBu2 AV = 0 dB 0.01 0.035 % Channel Separation Any Channel to Another 80 dB Dynamic Range NFL to Clip Point 100 dB ANALOG INPUT Maximum Level V IN max V S = ± 10 V 1.8 V rms Impedance Z IN Any Channel 10 k Ω ANALOG OUTPUT Maximum Level3 VS = ± 10 V, All Conditions of Master Attenuation and Channel Gain 1.8 V rms Impedance Z OUT 10 Ω Offset Voltage 20 mV Minimum Resistive Load R L min 10 k Ω Maximum Capacitive Load C L max 50 pF MASTER ATTENUATOR ERROR Measured from Best Fit of All Channels from 0 dB and –127 dB (or Noise Floor) AV = 0 dB Channel Gain = 0 dB ± 0.5 dB AV = –20 dB Channel Gain = 0 dB ± 1.0 dB AV = –40 dB Channel Gain = 0 dB ± 2.0 dB AV = –60 dB Channel Gain = 0 dB ± 2.5 dB CHANNEL MATCHING ± 1.0 dB CHANNEL GAIN ERROR Master Attenuation = 0 dB AV = 0 dB ± 0.5 dB AV = +10 dB ± 1.0 dB AV = +31 dB ± 2.0 dB MUTE ATTENUATION V IN = 0 dBu –95 dB VOLTAGE REFERENCE V REF Accuracy Percent of (V + )+ (V ±) 2 ± 5% Output Impedance 5 Ω CONTROL LOGIC Logic Thresholds High (1) Re: DGND 2.0 V Low (0) 0.8 V Input Current ± 1 µA Clock Frequency 1 1000 kHz Timing Characteristics See Timing Diagrams POWER SUPPLIES Voltage Range SSM2160 V S Single Supply +10 +20 V SSM2161 +8.5 +20 V SSM2160 V+, V– Dual Supply ± 5 ± 10 V SSM2161 ± 4.25 ± 10 V Supply Current No Load 20 28 mA NOTES 1Master = 0 dB; Channel = 0 dB. 2Input level adjusted accordingly. 0 dBu = 0.775 V rms. 3For other than ± 10 V supplies, maximum is V S/4. Specifications subject to change without notice.
- An idle HI (CLK-HI) or idle LO (CLK-LO) clock may be used. Data is latched on the negative edge.
- For SPI or microwire three-wire bus operation, tie
- If an idle HI clock is used, t CW and tWL are measured from the final negative transition to the idle state.
- The first data byte selects an address (MSB HI), and subsequent MSB LO states set gain/attenuation levels. Refer to the Address/Data Decoding Truth Table.
- Data must be sent MSB first.
Figure 1. Timing Diagrams
–4– REV. 0 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage ESD Ratings PACKAGE THERMAL INFORMATION Package Type3 uJA uJC Units 24-Pin Plastic P-DIP 60 30 °C/W 24-Pin SOIC 71 23 °C/W 20-Pin Plastic P-DIP 65 26 °C/W 20-Pin SOIC 84 24 °C/W NOTES 1Absolute maximum ratings apply at +25 °C unless otherwise noted. 2VS is the total supply span from V+ to V–. 3θJA is specified for the worst case conditions, i.e., for device in socket for P-DIP, packages and for device soldered onto a circuit board for SOIC packages. ORDERING GUIDE Temperature Package Package Model Range Description Option SSM2160P 0 °C to +70°C 24-Lead Plastic DIP N-24 SSM2160S 0 °C to +70°C 24-Lead SOL R-24 SSM2160S-REEL 0 °C to +70°C 24-Lead SOL R-24 SSM2161P 0 °C to +70°C 20-Lead Plastic DIP N-20 SSM2161S 0 °C to +70°C 20-Lead SOL R-20 SSM2161S-REEL 0 °C to +70°C 20-Lead SOL R-20 PIN CONFIGURATIONS 24-Lead Epoxy DIP and SOIC TOP VIEW (Not to Scale) SSM2160 VOUT2 MSTR SET MSTR OUT CH SET AGND VREF VOUT1 VIN4 VOUT4 VIN2VIN1 VOUT3 VIN3 VOUT5 VIN5 WRITE DATA VIN6 VOUT6 LD CLK DGND 20-Lead Epoxy DIP and SOIC TOP VIEW (Not to Scale) SSM2161 VOUT2 MSTR SET MSTR OUT CH SET AGND VREF VOUT1 VIN4 VOUT4 VIN2VIN1 VOUT3 VIN3 WRITE LD V– DGND CLK DATA
–5–REV. 0 PIN DESCRIPTIONS SSM2160 SSM2161 Pin No. Pin No. Name Function 1 1 V+ V+ is the positive power supply pin. Refer to the Power Supply Connections section for more information. 2 2 AGND AGND is the internal ground reference for the audio circuitry. When operating the SSM2160 from dual supplies, AGND should be connected to ground. When operating from a single supply, AGND should be connected to V REF, the internally generated voltage reference. AGND may also be connected to an external reference. Refer to the Power Supply Connections section for more details. 33 V REF VREF is the internally generated ground reference for the audio circuitry obtained from a buffered divider between V+ and V–. In a dual-supply application with the AGND pin connected to ground, V REF should be left floating. In a single supply application, V REF should be connected to AGND. Refer to the Power Supply Connections section for more details. 4 4 CH1 OUT Audio Output from Channel 1. 5 5 CH1 IN Audio Input to Channel 1. 6 6 CH3 OUT Audio Output from Channel 3. 7 7 CH3 IN Audio Input to Channel 3. 8 – CH5 OUT Audio Output from Channel 5. 9 – CH5 IN Audio Input to Channel 5. 10 8 WRITE A logic LOW voltage enables the SSM2160 to receive information at the DATA input (Pin 15). A logic HIGH applied to WRITE retains data at their previous settings. See Timing Diagrams. Serves as CHIP SELECT. 11 9 LD Loads the information retained by WRITE into the SSM2160 at logic LOW. See Timing Diagrams. 12 10 V– V– is the negative power supply pin. Connect to ground if using in a single supply application. Refer to the Power Supply Connections section for more details. 13 11 DGND DGND is the digital ground reference for the SSM2160. This pin should always be connected to ground. All digital inputs, including WRITE, LD, CLK, and DATA are TTL input compatible; drive currents are returned to DGND. 14 12 CLK CLK is the clock input. It is positive edge triggered. See Timing Diagrams. 15 13 DATA Channel and Master control information flows MSB first into the DATA pin. Refer to Address/ Data Decoding Truth Table, Figure 19, for information on how to control the VCAs. 16 – CH6 IN Audio Input to Channel 6. 17 – CH6 OUT Audio Output from Channel 6. 18 14 CH4 IN Audio Input to Channel 4. 19 15 CH4 OUT Audio Output from Channel 4. 20 16 CH2 IN Audio Input to Channel 2. 21 17 CH2 OUT Audio Output from Channel 2. 22 18 MSTR SET MSTR SET is connected to the inverting input of an I-V converting op amp used to generate a Master Control voltage from the Master Control DAC current output. A resistor connected from MSTR OUT to MSTR SET reduces the step size of the Master control. See the Adjusting Step Sizes section for more details. A 10 µF capacitor should be connected from MSTR OUT to MSTR SET to eliminate the zipper noise in the Master control. 23 19 MSTR OUT MSTR OUT is connected to the output of the I-V converting op amp. See MSTR SET description. 24 20 CH SET The step size of the Channel Control can be increased by connecting a resistor from CH SET to V+. No connection to CH SET is required if the default value of 1 dB per step is desired. Mini- mum of 10 Ω external resistor. See the Adjusting Step Sizes section for more details.
0.001 THD+N – %
Figure 2. THD vs. Gain Figure 5. THD+N % vs. Frequency Figure 3. THD+N % vs. Amplitude Figure 6. Channel Separation vs. Figure 8. Noise vs. Gain Figure 4. THD+N % vs. Amplitude Figure 7. Mute vs. Frequency
Figure 10. SMPTE IM vs. Amplitude Figure 11. Noise Floor FFT
15 SUPPLY CURRENT – mA
Figure 13. I SY vs. VS Figure 12. PSR vs. Frequency
13 DGND
Figure 16. Single Supply Operation with V REF Buffer use of the Master and Channel controls. Figure 17. Typical Signal Chain Using the SSM2160 Figure 18. Potentiometer Representation of SSM2160 the gain to minimum would occur at Channel = 1F h. Figure 19. Interface Characteristics, DAC Address/Data Decoding Truth Table
–13–REV. 0 Controlling Stereo Headphones Level and Balance Figure 26 shows how the SSM2160 can be configured to drive a stereo headphone output amplifier. Note that the minimum load specification precludes driving headphones directly. This example assumes that audio left and right signals are being fed into Channels 1 and 2, respectively. Additional amplifiers could be connected to the outputs to provide additional channels. The master control will set the loudness, and the channel controls will set the balance. The headphone amplifiers may be connected to the same power supplies as the SSM2160. The stereo audio signals are directly coupled to the noninverting input of both op amps. Depending upon the headphones and the signal levels, the optional R1 may be selected to provide additional gain. The gain is determined by: AV = 1+ R2 As an example, suppose a high impedance headphone (600 Ω ) required a minimum of 25 mW to produce the desired loudness. Further, suppose the system design made available an output level from the SSM2160 of 300 mV. If the output were buffered without gain and applied directly to the headphone, the power would be: P =V 2 R P = (0.3)2 600 = 0.15mW This is obviously too little power, so we solve the equation for the voltage required to produce the desired power of 25 mW: V = PR V = 0.025 × 600 = 3.9 V rms The gain of the amplifiers must then be: AV = 3.89 0.3 = 13 AV = 1+ R2 R1 = 12 R1= R2 12 = 6000 12 = 500 Ω If lower impedance headphones were used, say 30 Ω , the voltage required would be 0.9 V rms, so a gain of 3 would suffice, thus R1 = 2.5 kΩ and R2 = 5 kΩ . The 100 pF capacitor, C 2, in parallel with R2, creates a low- pass filter with a cutoff above the audible range, reducing the gain to high frequency noise. A small resistor within the feedback loop protects the output stage in the event of a short circuit at the headphone output but does not measurably reduce the signal swing or loop gain. The dc blocking capacitor at the output establishes a high pass filter with a –3 dB corner fre- quency determined by the value of C1 and the headphone impedance. With 600 Ω headphones, an output capacitor of 15 µF sets this corner at 20 Hz. Similarly, a 30 Ω headphone will require 250 µF. CAUTION: As with all headphone applications, listening to loud sounds can cause permanent hearing loss. +5V – 5V CH1OUT CH2OUT DGND AGND SSM2160 SSM2135-A SSM2135-B +5V –5V R 1* 500Ω R 1* 500Ω C2 100pF R 2 6kΩ 150Ω 150Ω R 2 6kΩ C2 100pF +5V – 5V 50kΩ 50kΩ 15µF* 15µF* LEFT HEADPHONE 600Ω RIGHT HEADPHONE 600Ω *SEE TEXT FOR ALTERNATE VALUES 13Figure 26. Headphone Output Amplifier Configuration EVALUATION BOARD FOR THE SSM2160 The following information is to be used with the SSM2160 evaluation board, which simplifies connecting the part into existing systems. Audio signals are fed in and out via standard RCA-type audio connectors. A stereo headphone driver socket is provided for the convenience of listening to Channels 1 and 2. Microsoft Windows software is available for controlling the serial data bus of the SSM2160 via the parallel port driver (LPT) of an IBM-compatible PC. The software may be downloaded from the Analog Devices Internet web site at http://WWW.ANALOG.COM, or by requesting a diskette from Analog Audio marketing by faxing (408)727-1550. The demo board comes complete with the necessary parallel port cable and telephone type plug that mates with the evaluation board. Power Supplies The demo board should be connected to ± 6 V supplies for initial evaluation. If other supply voltages are planned, they can be subsequently changed. The power configuration on the evaluation board is per Figure 14. Signal Inputs and Outputs Input load impedances are approximately 10 k Ω , so the load on the sources is relatively light. DC blocking capacitors are provided on the evaluation board. The load impedance connected to the outputs must be no less than 10 k Ω and no more than 50 pF shunt capacitance. This enables driving short lengths of shielded or twisted wire cable. If heavier loads must be driven, use an external buffer as shown in Figure 25. Note that 50 Ω isolation resistors are placed in series with each SSM2160 output and may be jumpered if desired. Digital Interface The interconnecting cable provided has a DB25 male connector for the parallel port of the PC and an RJ14 plug that connects to the evaluation board. This cable is all that is required for the computer interface. Software Installation If installing the software from a diskette, and using Windows version 3.1 or later, select the RUN command from the FILE menu of the Program Manager. In the command line, type a:\\setup and press return. If you downloaded the software to
–14– REV. 0 your hard disk from the Analog Devices website to, say, C:\\SSM2160, on the command line type C:\\SSM2160\\SETUP and press Return. The software will be automatically installed and a SSM2160 start-up icon will be displayed. Double-click the icon to start the application. Under the menu item “Port,” select the parallel port that is assigned to the connector used on your PC if different from the default LPT1. Windows Control Panel The control panel contains all the functions required to control the SSM2160, and each feature will be described below. A mouse is needed to operate the various controls. It is possible to overload the VCA (Voltage Controlled Amplifier) by incor- rect input levels, master and control settings. If you have not read the sections of the data sheet regarding control planning, do so now. While no damage will occur to the SSM2160, the results will be unpredictable. Master Volume The master volume fader controls the 7-bit word that deter- mines the attenuation level. There are 128 levels (2 7) that range from zero dB attenuation through –127 dB attenuation. To change the level, simply click the up or down arrows or click in the space directly above or below the fader “knob,” or “drag” the knob up or down to its desired position. (Drag refers to placing the screen cursor arrowhead on the control, pressing and holding the left mouse button while moving the arrow to the desired position.) Master Mute Below the master volume fader is the Master Mute button. Click this button to mute all channels. Clicking it again will unmute all channels. The application defaults to MUTE when started. Mute reduces outputs to approximately –95 dB below inputs up to 0 dBu. Channel Volume Each of the channel fader controls can be set to one of 32 levels of gain, from 0 dB to +31 dB. See master volume above for details. Channel Mute Same function as Master Mute but on a channel basis. Due to the design limitations, muting an individual channel results in an increased distortion level of the unmuted channels. Users must determine if this condition is acceptable in their application. Channel Balance The channel balance fader adjusts all channels over their range without affecting the master volume setting. Relative channel differences will be maintained until the top or the bottom of the range is reached. The master volume fader does the same function as this fader, which was made available for evaluation convenience. Fades Both master and channel fades can be achieved by pressing the “MEM 1” button when levels are at a desired starting position and the “MEM 2” button at the desired ending position. “Fade” controls individual channels and “Master Fade,” the master volume. “Fade Time” sets timing from 0.1 (fastest) to 9.9 (slowest). Press “Fade” to commence operation. If “Fade” is pressed again, a fade back to the starting point will occur. The “Jump” button causes a direct jump to the opposite memory position. Halt “Halt” is a software interrupt in case of a problem, or to stop a long fade time. Update Data currently on display is resent to the SSM2160. This is useful when parts are being substituted in the evaluation board, or when the interface cable is changed. Should you have any questions regarding the evaluation board or the SSM2160, please contact the Analog Audio group applications specialist at (408)562-7520.
–15–REV. 0 SSM2160 20-Lead SOL (R-20) SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45° 20 11 101 0.5118 (13.00) 0.4961 (12.60) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 24-Lead Plastic DI P (N-24) 11 2 13 0.280 (7.11) 0.240 (6.10) PIN 1 1.275 (32.30) 1.125 (28.60) 0.150 (3.81) MIN0.200 (5.05) 0.125 (3.18) SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) SSM2161 20-Lead Plastic DIP (N-20) 11 0 1.060 (26.90) 0.925 (23.50) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) BSC 0.160 (4.06) 0.115 (2.93) 0.060 (1.52) 0.015 (0.38) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 24-Lead SOL (R-24) 24 13 121 0.6141 (15.60) 0.5985 (15.20) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45° OUTLINE DIMENSIONS Dimensions shown in inches and (mm).
–16– C2214–6–10/96PRINTED IN U.S.A.