SSM2030GM

SSM2030GM SSC | Alldatasheet

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www.SiliconStandard.com 1 of 11 Simple drive requirement Lower gate charge Fast switching characteristics

DESCRIPTION

Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM2030GM is in an SO-8 package, which is widely preferred for commercial and industrial surface mount applications. This device is suitable for low voltage applications requiring complementary N and P MOSFETs. N-CH BV DSS 20V RDS(ON) 30mΩ ID 6A P-CH BVDSS -20V RDS(ON) 50mΩ ID -5A S1 G1 S1 G1 SO-8 Pb-free; RoHS compliant. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Units N-channel P-channel VDS Drain-Source Voltage 20 -20 V VGS Gate-Source Voltage ±8 ±8 V ID @ TA=25°C Continuous Drain Current3 +6 -5 A ID @ TA=70°C Continuous Drain Current3 +4.8 -4 A IDM Pulsed Drain Current1,2 +20 -20 A PD @ TA=25°C Total Power Dissipation 2.0 W Linear Derating Factor 0.016 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Symbol Value Unit Rthj-amb Thermal Resistance Junction-ambient Max. 62.5 °C/W Parameter SSM2030GM 2/10/2005 Rev.2.01 THERMAL DATA N- and P-channel Enhancement-mode Power MOSFETs

www.SiliconStandard.com 2 of 11 2/10/2005 Rev.2.01 Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=250uA 20 - - V Δ BVDSS/ ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA - 0.037 - V/°C RDS(ON) Static Drain-Source On-Resistance V GS=4.5V, ID=6A - - 30 mΩ VGS=2.5V, ID=5.2A - - 45 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 0.5 - 1.2 V gfs Forward Transconductance VDS=10V, ID=6A - 18.5 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=20V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=16V, VGS=0V - - 25 uA IGSS Gate-Source Leakage VGS=±8V - - nA Qg Total Gate Charge2 ID=6A - 9 - nC Qgs Gate-Source Charge VDS=10V - 1.8 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 4.2 - nC td(on) Turn-on Delay Time2 VDS=10V - - 29 ns tr Rise Time ID=1A - - 65 ns td(off) Turn-off Delay Time R G=6Ω, VGS=4.5V - - 60 ns tf Fall Time R D=10Ω --50 ns Ciss Input Capacitance VGS=0V - 300 - pF Coss Output Capacitance VDS=8V - 255 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 115 - pF Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=1.2V - - 1.7 A ISM Pulsed Source Current ( Body Diode )1 --2 0 A VSD Forward On Voltage2 Tj=25°C, IS=1.7A, VGS=0V - 0.75 1.2 V Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. ±100 SSM2030GM N-channelELECTRICAL CHARACTERISTICS @ T = 25 C (unless otherwise specified)j o SOURCE-DRAIN DIODE

www.SiliconStandard.com 3 of 11 Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=250uA -20 - - V Δ BVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA - -0.037 - V/°C RDS(ON) Static Drain-Source On-Resistance V GS=-4.5V, ID=-2.2A - - 50 mΩ VGS=-2.5V, ID=-1.8A - - 80 mΩ VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250uA -0.5 - -1 V gfs Forward Transconductance VDS=-10V, ID=-2.2A - 2.5 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=-20V, VGS=0V - - -1 uA Drain-Source Leakage Current (Tj=70oC) VDS=-16V, VGS=0V - - -25 uA IGSS Gate-Source Leakage VGS=- - nA Qg Total Gate Charge2 ID=-2.2A - 11.5 - nC Qgs Gate-Source Charge VDS=-6V - 3.2 - nC Qgd Gate-Drain ("Miller") Charge VGS=-4.5V - 1.5 - nC td(on) Turn-on Delay Time2 VDS=-10V - - 10 ns tr Rise Time ID=-2.2A - - 25 ns td(off) Turn-off Delay Time R G=6Ω ,VGS=-4.5V - - 50 ns tf Fall Time R D=4.5Ω --3 0 ns Ciss Input Capacitance VGS=0V - 940 - pF Coss Output Capacitance VDS=-15V - 440 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 130 - pF Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=-1.2V - - -1.8 A ISM Pulsed Source Current ( Body Diode )1 - - -20 A VSD Forward On Voltage2 Tj=25°C, IS=-1.8A, VGS=0V - -0.75 -1.2 V Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10sec. ± 8V ±100 SSM2030GM 2/10/2005 Rev.2.01 P-channel ELECTRICAL CHARACTERISTICS @ T = 25 C (unless otherwise specified)j o SOURCE-DRAIN DIODE

www.SiliconStandard.com 4 of 11 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 0123456 VDS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 oC V G =4.5V V G =2.5V V G =3.5V V G =3.0V V G =2.0V 0123456 VDS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 oC V G =2.5V V G =3.0V V G =3.5V V G =4.5V V G =2.0V 2345 V GS (V) RDSON (mΩ ) Id=6A T c =25°C 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -50 0 50 100 150 T j , Junction Temperature ( oC) Normalized RDS(ON) I D =6A V G =4.5V SSM2030GM 2/10/2005 Rev.2.01 N-channel

www.SiliconStandard.com 5 of 11 Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 25 50 75 100 125 150 T c , Case Temperature ( oC) ID , Drain Current (A) 0 50 100 150 T c ,Case Temperature ( oC) PD (W) 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (Rthja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 SINGLE PULSE 0.1 100 0.1 1 10 100 V DS (V) ID (A) T c =25 oC Single Pulse 10us 1ms 10ms 100ms SSM2030GM 2/10/2005 Rev.2.01 N-channel

www.SiliconStandard.com 6 of 11 Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 100 1000 1 5 9 13 17 21 25 29 V DS (V) C (pF) f=1.0MHz Ciss Coss Crss 024681 01 2 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =6A V DS =10V 0.01 0.10 1.00 10.00 100.00 V SD (V) IS(A) T j =25 oC T j =150 oC 0.5 1.5 -50 0 50 100 150 T j ,Junction Temperature ( oC) VGS(th) (V) SSM2030GM 2/10/2005 Rev.2.01 N-channel

www.SiliconStandard.com 7 of 11 Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG 4.5V QGS QGD QG Charge 0.5x RATED VDS TO THE OSCILLOSCOPE 4..5V D G S VDS VGS RG RD 0.5 x RATED VDS TO THE OSCILLOSCOPE D G S VDS VGS I D I G 1~ 3 mA SSM2030GM 2/10/2005 Rev.2.01 N-channel

www.SiliconStandard.com 8 of 11 SSM2030GM Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 0.6 0.8 1.2 1.4 1.6 1.8 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) V G = -4.5V I D =-2.2A 0123456 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T C =25 o C V G =-4.5V V G =-4.0V V G =-3.5V V G =-3.0V V G =-2.5V 0123456 -V DS , Drain-to-Source Voltage (V) -ID , Drain Current (A) T C =150 o C V G =-4.5V V G =-3.0V V G =-3.5V V G =-4.0V V G =-2.5V 100 2345 -V GS (V) RDSON (mΩ ) Id=-2.2A T c =25°C 2/10/2005 Rev.2.01 P-channel

www.SiliconStandard.com 9 of 11 SSM2030GM Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 0.001 0.01 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) Normalized Thermal Response (Rthja) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 SINGLE PULSE 25 50 75 100 125 150 T c , Case Temperature ( o C) -ID , Drain Current (A) 0.5 1.5 2.5 0 50 100 150 T c ,Case Temperature ( o C) PD (W) 0.1 100 0.1 1 10 100 -V DS (V) -ID (A) T c =25 o C Single Pulse 1ms 10ms 100ms 2/10/2005 Rev.2.012/10/2005 Rev.2.01 P-channel

www.SiliconStandard.com 10 of 11 SSM2030GM Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 0.01 0.10 1.00 10.00 100.00 -V SD (V) -IS(A) T j =25 o C T j =150 o C 100 1000 10000 1 5 9 1 31 72 12 52 9 -V DS (V) C (pF) f=1.0MHz Ciss Coss Crss 0.2 0.4 0.6 0.8 -50 0 50 100 150 T j ,Junction Temperature ( o C) -VGS(th) (V) 0 2 4 6 8 10 12 14 Q G , Total Gate Charge (nC) -VGS , Gate to Source Voltage (V) I D =-2.2A V DS =-6V 2/10/2005 Rev.2.01 P-channel

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 11 of 11 SSM2030GM td(on) tr td(off) tf VDS VGS 10% 90% 0.5 x RATED VDS TO THE OSCILLOSCOPE -4.5 V D G S VDS VGS RG RD Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform Q VG -4.5V QGS QGD QG Charge 0.3 x RATED VDS TO THE OSCILLOSCOPED G S VDS VGS IDI G -1~-3mA 2/10/2005 Rev.2.01 P-channel