SSM04N70BGF-A SSC | Alldatasheet
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www.SiliconStandard.com 1 of 5 N-channel Enhancement-mode Power MOSFET BVDSS 650V RDS(ON) 2.4Ω ID 4A The SSM04N70BGF-A achieves fast switching performance with low gate charge without a complex drive circuit. It is suitable for high voltage applications such as AC/DC Pb-free; RoHS-compliant TO-220FM PRODUCT SUMMARY DESCRIPTION Notes: 1. Pulse width must be limited to avoid exceeding the safe operating area. 2. Pulse width <300us, duty cycle <2%. 3. Starting Tj = 25°C, VDD=50V , L=25mH , RG=25Ω, I AS= 4A. converters, SMPS and general off-line switching circuits. The SSM04N70BGF-A is in TO-220FM for through-hole mounting where a small footprint is required on the board, G D S TO-220FM (suffix I) and/or an external heatsink is to be attached. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Units VDS VGS ID IDM PD W/°C EAS Single pulse avalanche energy3 TSTG TJ Symbol Parameter Value Units RΘ JC Maximum thermal resistance, junction-case 3.8 °C/W RΘ JA Maximum thermal resistance, junction-ambient 65 °C/W Drain-source voltage 650 V Gate-source voltage ±30 V Continuous drain current, TC = 25°C 4 A TC = 100°C 2.5 A Pulsed drain current1 15 A Total power dissipation, TC = 25°C 33 W -55 to 150 °C Operating junction temperature range -55 to 150 °C Linear derating factor 0.26 100 mJ THERMAL CHARACTERISTICS Storage temperature range SSM04N70BGF-A 9/12/2006 Rev.3.1 IAR Avalanche current 4 A EAR Repetitive avalanche energy 4 mJ
ELECTRICAL CHARACTERISTICS (at Tj = 25°C, unless otherwise specified) Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-source breakdown voltage V GS=0V, ID= 1mA 650 - - V Δ BVDSS/ ΔTj Breakdown voltage temperature coefficient Reference to 25°C, ID=1mA - 0.6 - V/°C RDS(ON) Static drain-source on-resistance V GS=10V, ID=2A - - 2.4 Ω VGS(th) Gate threshold voltage VDS=VGS, ID=250uA 2 - 4 V gfs Forward transconductance V DS=20V, ID=1A - 2.5 - S IDSS Drain-source leakage current VDS=600V, VGS=0V - - 10 uA VDS=480V ,VGS=0V, Tj = 150°C - - 100 uA IGSS Gate-source leakage current VGS=±30V - - ±100 nA Qg Total gate charge 2 ID=4A - 16.7 - nC Qgs Gate-source charge VDS=480V - 4.1 - nC Qgd Gate-drain ("Miller") charge V GS=10V - 4.9 - nC td(on) Turn-on delay time 2 VDS=300V - 11 - ns tr Rise time ID=4A - 8.3 - ns td(off) Turn-off delay time R G=10Ω , V GS=10V - 23.8 - ns tf Fall time R D=75Ω - 8.2 - ns Ciss Input capacitance VGS=0V - 950 - pF Coss Output capacitance VDS=25V - 65 - pF Crss Reverse transfer capacitance f=1.0MHz - 6 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward voltage 2 IS= 4A, VGS=0V - - 1.5 V IS Continuous source current (body diode) VD=VG=0V , VS=1.3V - - 4 A I SM Pulsed source current (body diode)1 - - 15 A www.SiliconStandard.com 2 of 5 SSM04N70BGF-A 9/12/2006 Rev.3.1
www.SiliconStandard.com 3 of 5 SSM04N70BGF-A 9/12/2006 Rev.3.1 Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. Normalized BVDSS vs. Junction Fig 4. Normalized On-Resistance Temperature vs. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature 0.8 0.9 1.1 1.2 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized BVDSS (V) -50 0 50 100 150 T j , Junction Temperature ( o C ) Normalized RDS(ON) I D =2A V G =10V 0.6 1.2 1.8 0369 1 2 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 o C V G =3.5V 10V 6.0V 5.0V 4.5V 4.0V 0.5 1.5 2.5 02468 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 o C V G =4.0V 10V 6.0V 5.0V 4.5V 0.1 100 V SD (V) IS (A) T j = 25 o CT j =150 o C -50 0 50 100 150 T j , Junction Temperature ( o C ) VGS(th) (V)
www.SiliconStandard.com 4 of 5 SSM04N70BGF-A 9/12/2006 Rev.3.1 Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedan c Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG 10V QGS QGD QG Charge 0.01 0.1 100 1 10 100 1000 10000 V DS (V) ID (A) T c =25 o C Single Pulse 10us 100us 1ms 10ms 100ms 0.01 0.1 t , Pulse Width (s) Normalized Thermal Response (Rthjc) PDM Duty factor = t/T Peak Tj = PDM x Rthjc + TC t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 0 5 10 15 20 25 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =4A V DS =320V V DS =400V V DS =480V 100 10000 1 6 11 16 21 26 31 V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss
www.SiliconStandard.com 5 of 5 PHYSICAL DIMENSIONS - TO-220FM PART MARKING - TO-220FM PACKING: Moisture sensitivity level MSL3 1000pcs in tubes packed inside a 04N70BF-A YWWSSS DATE/LOT CODE: Y = last digit of the year WW = work week (01 -> 52) SSS = lot code sequence SSM04N70BGF-A 9/12/2006 Rev.3.1 PART NUMBER: 04N70BF-A = SSM04N70BGF-A moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 1. All dimensions are in m illimeters. 2. Dimensions do not include m old protrusions. Millimeters MIN NOM MAX A 4.25 4.45 4.65 A1 2.30 2.50 2.70 b 0.60 0.70 0.80 b1 1.00 1.20 1.40 c 0.40 0.50 0.60 c1 2.30 2.50 2.70 c2 2.60 2.80 3.00 E 9.70 10.00 10.30 E1 6.70 7.00 7.30 e ---- 2.54 ---- L 13.00 14.00 15.00 L1 11.70 12.00 12.30 L3 14.90 15.20 15.50 L4 16.70 17.00 17.30 φ ---- 3.20 ---- SYMBOLS A c L E φ b e E A c L b e