SSM03N70GH SSC | Alldatasheet

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N-CHANNEL ENHANCEMENT MODE POWER MOSFET 09/06/2007 Rev.1.00 www.SiliconStandard.com 1 SSM03N70GH/GJ PRODUCT SUMMARY Repetitive Avalanche Rated Fast Switching Speed Simple Drive Requirement

DESCRIPTION

The TO-252 package is universally preferred for all commercial- Industrial surface mount applications and suited for AC/DC converters. The through-hole version (SSM03N70GH/GJ) is available for low-profile applications. ABSOLUTE MAXIMUM RATINGS BVDSS 600V RDS(ON) 3.6Ω ID 3.3AG D S G D S TO-252(H) G D S TO-251(J) Symbol Units VDS Drain-Source Voltage V VGS Gate-Source Voltage V ID@TC=25℃ Continuous Drain Current, VGS @ 10V A ID@TC=100℃ Continuous Drain Current, VGS @ 10V A IDM Pulsed Drain Current1 A PD@TC=25℃ Total Power Dissipation W W/℃ EAS Single Pulse Avalanche Energy2 mJ IAR Avalanche Current A EAR Repetitive Avalanche Energy mJ TSTG ℃ TJ Operating Junction Temperature Range ℃ THERMAL DATA Symbol Value Units Rthj-c Thermal Resistance Junction-case Max. 2.8 ℃/W Rthj-a Thermal Resistance Junction-ambient Max. 110 ℃/W Parameter 3.3 Parameter -55 to 150 ±30 3.3 Storage Temperature Range Linear Derating Factor -55 to 150 0.36 13.2 RoHS-compliant

09/06/2007 Rev.1.00 www.SiliconStandard.com 2 SSM03N70GH/GJ

ELECTRICAL CHARACTERISTICS

@ TJ=25oC ( unless otherwise specified ) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=250uA 600 - - V ∆BVDSS/∆Tj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA - 0.6 - V/℃ RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=1.6A - - 3.6 Ω VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 2 - 4 V gfs Forward Transconductance VDS=10V, ID=1.6A - 2 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=600V, VGS=0V - - 10 uA Drain-Source Leakage Current (Tj=150oC) VDS=480V, VGS=0V - - 100 uA IGSS Gate-Source Leakage VGS=±30V - - ±100 nA Qg Total Gate Charge3 ID=3.3A - 11.4 - nC Qgs Gate-Source Charge VDS=480V - 3.1 - nC Qgd Gate-Drain ("Miller") Charge VGS=10V - 4.2 - nC td(on) Turn-on Delay Time3 VDD=300V - 8.4 - ns tr Rise Time ID=3.3A - 6 - ns td(off) Turn-off Delay Time RG=10Ω,VGS=10V - 17.7 - ns tf Fall Time RD=91Ω - 5.9 - ns Ciss Input Capacitance VGS=0V - 600 - pF Coss Output Capacitance VDS=25V - 45 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 4 - pF SOURCE-DRAIN DIODE Symbol Parameter Test Conditions Min. Typ. Max. Units VSD Forward On Voltage3 IS=3A, VGS=0V - - 1.5 V trr Reverse Recovery Time2 IS=3A, VGS=0V, - 422 - ns Qrr Reverse Recovery Charge dI/dt=100A/µs - 2580 - nC Notes: 1.Pulse width limited by safe operating area. 2.Starting Tj=25oC , VDD=50V , L=15mH , RG=25Ω , IAS=3A. 3.Pulse width <300us , duty cycle <2%.

09/06/2007 Rev.1.00 www.SiliconStandard.com 3 SSM03N70GH/GJ Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. Normalized BVDSS v.s. Junction Fig 4. Normalized On-Resistance Temperature v.s. Junction Temperature Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature 0.1 0.5 0.9 1.3 1.7 2.1 2.5 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) I D =1.6A V G =10V 0.8 0.9 1.0 1.1 1.2 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized BVDSS (V) 0 5 10 15 20 25 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 o C 5.0V 4.5V V G =4.0V 10V 6.0V 0 5 10 15 20 25 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 o C V G =3.5V 4.5V 4.0V 10V 5.0V 0.01 0.1 100 V SD , Source-to-Drain Voltage (V) IS (A) T j = 25 o CT j = 150 o C -50 0 50 100 150 T j , Junction Temperature ( o C) VGS(th) (V)

09/06/2007 Rev.1.00 www.SiliconStandard.com 4 SSM03N70GH/GJ Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform 0.01 0.1 100 1 10 100 1000 10000 V DS , Drain-to-Source Voltage (V) ID (A) T c =25 o C Single Plude 10us 100us 1ms 10ms 100ms 0.01 0.1 t , Pulse Width (s) Normalized Thermal Response (Rthjc) PDM Duty factor = t/T Peak Tj = PDM x Rthjc + TC t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 Single Pulse 04 8 12 16 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =3.3A V DS =480V 100 10000 1 5 9 131 72 1 252 9 V DS , Drain-to-Source Voltage (V) C (pF) f=1.0MHz C iss C oss C rss td(on) tr td(off) tf VDS VGS 10% 90% Q VG 10V QGS QGD QG Charge

09/06/2007 Rev.1.00 www.SiliconStandard.com 5 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.