SSI1N50B | DigiCamel IC Datasheet

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SSW1N50B FAIRCHILD | Alldatasheet

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Features

1.5A, 520V, R DS(on) = 5.3Ω @VGS = 10 V Low gate charge ( typical 8.3 nC) Low Crss ( typical 5.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability Absolute Maximum Ratings TC = 25°C unless otherwise noted Thermal Characteristics * When mounted on the minimum pad size recommended (PCB Mount) Symbol Parameter SSW1N50B / SSI1N50B Units VDSS Drain-Source Voltage 520 V ID Drain Current - Continuous (TC = 25°C) 1.5 A - Continuous (TC = 100°C) 0.97 A IDM Drain Current - Pulsed (Note 1) 5.0 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 100 mJ IAR Avalanche Current (Note 1) 1.5 A EAR Repetitive Avalanche Energy (Note 1) 3.6 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns PD Power Dissipation (TA = 25°C) * 3.13 W Power Dissipation (TC = 25°C) 36 W - Derate above 25°C 0.29 W/°C TJ, Tstg Operating and Storage Temperature Range -55 to +150 °C TL Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 °C Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 3.44 °C /W RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C /W RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C /W

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Rev. C, May 2002 SSW1N50B / SSI1N50B ©2002 Fairchild Semiconductor Corporation Electrical Characteristics TC = 25°C unless otherwise noted Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 80mH, IAS = 1.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 1.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 520 -- -- V ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.54 -- V/°C IDSS Zero Gate Voltage Drain Current VDS = 520 V, VGS = 0 V -- -- 10 µA VDS = 400 V, TC = 125°C -- -- 100 µA IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.75 A -- 4.1 5.3 Ω gFS Forward Transconductance VDS = 40 V, ID = 0.75 A (Note4) -- 1.8 -- S Dynamic Characteristics Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 260 340 pF Coss Output Capacitance -- 25 33 pF Crss Reverse Transfer Capacitance -- 5.5 7.2 pF Switching Characteristics td(on) Turn-On Delay Time VDD = 250 V, ID = 1.5 A, RG = 25 Ω (Note4, 5) -- 14 40 ns tr Turn-On Rise Time -- 40 90 ns td(off) Turn-Off Delay Time -- 35 80 ns tf Turn-Off Fall Time -- 35 80 ns Qg Total Gate Charge VDS = 400 V, ID = 1.5 A, VGS = 10 V (Note4, 5) -- 8.3 11 nC Qgs Gate-Source Charge -- 1.5 -- nC Qgd Gate-Drain Charge -- 3.4 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 1.5 A ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 5.0 A VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.5 A -- -- 1.4 V trr Reverse Recovery Time VGS = 0 V, IS = 1.5 A, dIF / dt = 100 A/µs (Note4) -- 230 -- ns Qrr Reverse Recovery Charge -- 0.94 -- µC

Rev. C, May 2002 SSW1N50B / SSI1N50B ©2002 Fairchild Semiconductor Corporation Charge VGS 10V Qg Qgs Qgd 3mA VGS DUT VDS 300nF 50KΩ 200nF12V Same Type as DUT Charge VGS 10V Qg Qgs Qgd 3mA VGS DUT VDS 300nF 50KΩ 200nF12V Same Type as DUT VGS VDS 10% 90% td(on) tr t on t off td(off) tf VDD 10V VDS RL DUT RG VGS VGS VDS 10% 90% td(on) tr t on t off td(off) tf VDD 10V VDS RL DUT RG VGS EAS =L I AS 2----2 BVDSS -V DD BVDSS VDD VDS BVDSS t p VDD IAS VDS (t) ID (t) Time 10V DUT RG L I D t p EAS =L I AS 2----2 1EAS =L I AS 2----2 1----2 BVDSS -V DD BVDSS VDD VDS BVDSS t p VDD IAS VDS (t) ID (t) Time 10V DUT RG LL I DI D t p Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms

©2002 Fairchild Semiconductor Corporation Rev. C, May 2002 SSW1N50B / SSI1N50B Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT VDS Driver RG Same Type as DUT VGS dv/dt controlled by RG I SD controlled by pulse period VDD L I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width DUT VDS Driver RG Same Type as DUT VGS dv/dt controlled by RG I SD controlled by pulse period VDD LL I SD 10V VGS ( Driver ) I SD ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop VSD IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width

Rev. C, May 2002©2002 Fairchild Semiconductor Corporation SSW1N50B / SSI1N50B Dimensions in Millimeters Package Dimensions 10.00 ±0.20 10.00 ±0.20 (8.00) (4.40) 0.80 ±0.10 (2XR0.45) 0.10 ±0.15 2.40 ±0.20 2.54 ±0.30 15.30 ±0.30 9.20 ±0.20 4.90 ±0.20 1.40 ±0.20 2.00 ±0.10 (0.75) (1.75) (7.20) 0°~3° 1.20 ±0.20 9.20 ±0.20 15.30 ±0.30 4.90 ±0.20 (0.40) 2.54 TYP 2.54 TYP 1.30+0.10 –0.05 0.50+0.10 –0.05 D2-PAK Dimensions in Millimeters

©2002 Fairchild Semiconductor Corporation Rev. C, May 2002 SSW1N50B / SSI1N50B Package Dimensions (Continued) 9.90 ±0.20 2.40 ±0.20 4.50 ±0.20 (45 0.80 ±0.10 10.00 ±0.20 2.54 TYP2.54 TYP 13.08 ±0.20 9.20 ±0.20 1.20 ±0.20 10.08 ±0.20 MAX13.40 MAX 3.00 (0.40) (1.46) (0.94) 1.30+0.10 –0.05 0.50+0.10 –0.05 I2-PAK Dimensions in Millimeters

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Product Information

SSI1N50B specifications and overview.

Summary

520V N-Channel MOSFET

Description

520V N-Channel MOSFET

Source title SSI1N50B Datasheet(PDF) - Fairchild Semiconductor

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