SSH22N50A FAIRCHILD | Alldatasheet

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BV DSS = 500 V R DS(on) = 0.25Ω ID = 22 A 500 13.4 ±30 2151 27.8 3.5 278 2.22 - 55 to +150 300 0.45 0.24 ♦ Avalanche Rugged Technology ♦ Rugged Gate Oxide Technology ♦ Lower Input Capacitance ♦ Improved Gate Charge ♦ Extended Safe Operating Area ♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V ♦ Lower RDS(ON) : 0.197Ω (Typ.) /G24/G47 /G59 /G44/G51/G46 /G48/G47 /G33 /G52/G5A /G48 /G55 /G30/G32/G36/G29/G28 /G37 Thermal Resistance Junction-to-Case Case-to-Sink Junction-to-Ambient R θJC R θCS R θJA °C/W Characteristic Max. UnitsSymbol Typ.

FEATURES

Continuous Drain Current (TC =25°C) Continuous Drain Current (TC =100°C) Drain Current-Pulsed (1) Gate-to-Source Voltage Single Pulsed Avalanche Energy (2) Avalanche Current (1) Repetitive Avalanche Energy (1) Peak Diode Recovery dv/dt (3) Total Power Dissipation (TC =25°C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds Characteristic Value UnitsSymbol IDM VGS EAS IAR EAR dv/dt ID PD TJ , TSTG TL A V mJ A mJ V/ns W W/°C A VDSS V TO-3P 1.Gate 2. Drain 3. Source ©1999 Fairchild Semiconductor Corporation Rev. B

2.0 0.69 465 215 150 182 79.6 4.0 100 -100 100 0.25 5120 535 250 310 236 17.31 3940 528 8.35 1.4 Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature (2) L=8mH, IAS =22A, VDD =50V, RG =27Ω , Starting TJ =25°C (3) ISD ≤ 22A, di/dt ≤ 300A/µs, VDD ≤ BVDSS , Starting TJ =25°C (4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2% (5) Essentially Independent of Operating Temperature /G31/G10 /G26/G2B /G24/G31 /G31/G28/G2F /G33 /G32/G3A/G28/G35 /G30/G32/G36 /G29/G28/G37 Electrical Characteristics (TC =25°C unless otherwise specified) Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse CharacteristicSymbol Max. UnitsTyp.Min. Test Condition Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain ( Miller) Charge gfs C iss C oss C rss td(on) tr td(off) tf Q g Q gs Q gd BVDSS ΔBV/ΔTJ VGS(th) R DS(on) IGSS IDSS V V/°C V nA µA Ω Ω pF ns nC V GS =0V,ID =250µA ID =250µA See Fig 7 VDS =5V,ID =250µA VGS =30V VGS =-30V VDS =500V VDS =400V,TC =125°C VGS =10V,ID =11A (4) VDS =50V,ID =11A (4) VDD =250V,ID =22A, R G =5.3Ω See Fig 13 (4) (5) VDS =400V,VGS =10V, ID =22A See Fig 6 & Fig 12 (4) (5) Drain-to-Source Leakage Current VGS =0V,VDS =25V,f =1MHz See Fig 5 Source-Drain Diode Ratings and Characteristics Continuous Source Current Pulsed-Source Current (1) Diode Forward Voltage (4) Reverse Recovery Time Reverse Recovery Charge I S ISM VSD trr Q rr CharacteristicSymbol Max. Units Typ.Min. Test Condition A V ns µC Integral reverse pn-diode in the MOSFET T J=25°C,IS=22A,VGS =0V TJ=25°C,IF=22A diF/dt=100A/µs (4)

@ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC VGS Top : 1 5 V 1 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V ID , Drain Current [A] VDS , Drain-Source Voltage [V] 24681 010-1 100 101 25 oC 150 oC - 55 oC @ Notes : 1. VGS = 0 V 2. VDS = 50 V 3. 250 µs Pulse Test ID , Drain Current [A] VGS , Gate-Source Voltage [V] 01 53 04 56 07 59 00.00 0.15 0.30 0.45 0.60 @ Note : TJ = 25 oC VGS = 20 V VGS = 10 V RDS(on) , [Ω ] Drain-Source On-Resistance ID , Drain Current [A] 100 101 150 oC 25 oC @ Notes : 1. VGS = 0 V 2. 250 µs Pulse Test IDR , Reverse Drain Current [A] VSD , Source-Drain Voltage [V] 100 1010 2000 4000 6000 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd @ Notes : 1. VGS = 0 V 2. f = 1 MHzC rss C oss C iss Capacitance [pF] VDS , Drain-Source Voltage [V] 05 0 1 0 01 5 02 0 00 VDS = 400 V VDS = 250 V VDS = 100 V @ Notes : ID = 22.0 A VGS , Gate-Source Voltage [V] QG , Total Gate Charge [nC] /G31/G10 /G26/G2B /G24/G31 /G31/G28/G2F /G33 /G32/G3A/G28/G35 /G30/G32/G36 /G29/G28/G37 Fig 1. Output Characteristics Fig 2. Transfer Characteristics Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current

-75 -50 -25 0 25 50 75 100 125 150 1750.8 0.9 1.0 1.1 1.2 @ Notes : 1. VGS = 0 V 2. ID = 250 µA BVDSS , (Normalized) Drain-Source Breakdown Voltage TJ , Junction Temperature [oC] -75- 50- 25 0 25 50 75 1001 251 501 750.0 0.5 1.0 1.5 2.0 2.5 3.0 @ Notes : 1. VGS = 10 V 2. ID = 11.0 A RDS(on) , (Normalized) Drain-Source On-Resistance TJ , Junction Temperature [oC] 100 101 102 10310-1 100 101 102 DC 10 µs 100 µs 1 ms 10 ms @ Notes : 1. TC = 25 oC 2. TJ = 150 oC 3. Single Pulse Operation in This Area is Limited by R DS(on) ID , Drain Current [A] VDS , Drain-Source Voltage [V] 25 50 75 10 01 2 51 5 00 25ID , Drain Current [A] Tc , Case Temperature [oC] 10-5 10-4 10-3 10-2 10-1 100 101 10-2 10-1 single pulse 0.2 0.1 0.01 0.02 0.05 D=0.5 @ Notes : 1. Zθ JC(t)=0.45 oC/W Max. 2. Duty Factor, D=t1/t2 3. TJM-TC=PDM*Zθ JC(t) Z θJC(t) , Thermal Response t1 , Square Wave Pulse Duration [sec] /G31/G10 /G26/G2B /G24/G31 /G31/G28/G2F /G33 /G32/G3A/G28/G35 /G30/G32/G36 /G29/G28/G37 Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature Fig 11. Thermal Response PDM

/G31/G10 /G26/G2B /G24/G31 /G31/G28/G2F /G33 /G32/G3A/G28/G35 /G30/G32/G36 /G29/G28/G37 Fig 12. Gate Charge Test Circuit & Waveform Fig 13. Resistive Switching Test Circuit & Waveforms Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms EAS =L L IAS 2----2 BV DSS -- VDD BV DSS V in V out 10% 90% td(on) tr t on t off td(off) tf Charge V GS 10V Q g Q gs Q gd Vary tp to obtain required peak ID 10V V DDC LL V DS ID R G t p DUT BV DSS t p V DD IAS V DS (t) ID (t) Time V DD ( 0.5 rated VDS ) 10V V out V in R L DUT R G 3mA V GS Current Sampling (IG ) Resistor Current Sampling (ID ) Resistor DUT V DS 300nF 50kΩ 200nF12V Same Type as DUT Current Regulator R 1 R 2

/G31/G10 /G26/G2B /G24/G31 /G31/G28/G2F /G33 /G32/G3A/G28/G35 /G30/G32/G36 /G29/G28/G37 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT V DS L I S DriverV GS R G Same Type as DUT V GS dv/dt controlled by R G IS controlled by Duty Factor D V DD 10V V GS ( Driver ) I S ( DUT ) V DS ( DUT ) V DD Body Diode Forward Voltage Drop V f IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width

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