SSFP9N80 GOOD-ARK | Alldatasheet

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Technical content

T Power MOSFET Extremely high dv/dt capability Low Gate Charge Qg results in Simple Drive Requirement 100% avalanche tested Gate charge minimized Very low intrinsic capacitances Very good manufacturing repeatability

Description

StarMOS is a new generation of high voltage N–Channel enhancement mode power MOSFETs. This new technology minimises the JFET effect, increases packing density and reduces the on-resistance. StarMOS also achieves faster switching speeds through optimised gate layout with planar stripe DMOS technology. Application Switching application Absolute Maximum Ratings Parameter Max. Units I D @Tc=25ْC Continuous Drain Current,V GS @10V 7.5 I D @Tc=100ْC Continuous Drain Current,V GS @10V 4.7 I DM Pulsed Drain Current A P D C =25ْC Power Dissipation 150 W Linear Derating Factor 1.2 W/ْC V GS Gate-to-Source Voltage ±20 V E AS Single Pulse Avalanche Energy mJ I AR Avalanche Current 7.5 A E AR Repetitive Avalanche Energy 350 mJ dv/dt Peak Diode Recovery dv/dt 4.5 V/ns T J T STG Operating Junction and Storage Temperature Range –55 to +150 Soldering Temperature, for 10 seconds 300(1.6mm from case) Mounting Torque,6-32 or M3 screw

10 Ibf

in(1.1N Thermal Resistance Parameter Min. Typ. Max. Units R θJC Junction-to-case 0.83 R θCS Case-to-Sink,Flat,Greased Surface 0.5 R θJA Junction-to-Ambient 62.5 ْC/W Pin1–Gate Pin2–Drain Pin1–Source V DSS = 800V I D25 = 7.5A R DS(ON) = 1.2Ω

T Power MOSFET Electrical Characteristics @T J =25 ْC(unless otherwise specified) Parameter Min. Typ. Max. Units Test Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 800 — V V GS =0V,I D 250μA V (BR)DSS T J Breakdown Voltage Temp.Coefficient — 0.5 — V/ْC Reference to 25ْC,I D =1mA R DS(on) Static Drain-to-Source On-resistance — 0.9 1.2 Ω V GS =10V,I D =3.75A V GS(th) Gate Threshold Voltage 3.0 — 5.0 V V DS GS D =100μA g fs Forward Transconductance — 7.5 — S V DS =15V,I D =3.75A — — V DS =800V,V GS =0V I DSS Drain-to-Source Leakage current — — μA V DS =640V,V GS =0V,T J =150ْC Gate-to-Source Forward leakage — — V GS =20V I GSS Gate-to-Source Reverse leakage — — -10 nA V GS =-20V Q g Total Gate Charge — 60 Q gs Gate-to-Source charge — 12 Q gd Gate-to-Drain("Miller") charge — 35 nC I D = 7 . 5 A V DS =640V V GS =10V t d(on) Turn-on Delay Time — 26 t r Rise Time — 19 t d(off) Turn-Off Delay Time — 58 t f Fall Time — 18 nS V DD =400V I D = 3 . 7 7 A R G =4.7Ω V GS = 1 0 V L D Internal Drain Inductance — 4.5 L S Internal Source Inductance — 7.5 nH Between lead, 6mm(0.25in.) from package and center of die contact C iss Input Capacitance — 1900 — C oss Output Capacitance — 180 — C rss Reverse Transfer Capacitance — 38 pF V GS = 0 V V DS = 2 5 V f =1.0MH Z Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Test Conditions I S Continuous Source Current . (Body Diode) 7.5 I SM Pulsed Source Current . (Body Diode) ① A MOSFET symbol showing the integral reverse p-n junction diode. V SD Diode Forward Voltage 1.6 V T J =25ْC,I S =7.5A,V GS =0V ④ t rr Reverse Recovery Time 690 — nS Q rr Reverse Recovery Charge 6.4 — nC T J =25ْC,I F =7.5A di/dt=100A/μs ④ t on Forward Turn-on Time Intrinsic turn-on time is negligible (turn-on is dominated by Ls + L D Notes: ① Repetitive rating;pulse width limited by ③ I SD ≤7.5A,di/dt≤300A/μS,V DD (BR)DSS max.junction temperature(see figure 11) TJ ≤25ْC L = 25mH, IAS = 7.5A, VDD = 50V, ④ Pulse width ≤300μS; duty cycle≤2% RG = 25Ω, S t a r t i n g T J = 2 5 ° C