SSC2117 SECOS | Alldatasheet
Document overview
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Technical content
Features
- Low Temperature Coefficient * Over-Temperature Shutdown * Very Low Dropout Voltage * Noise Reduction Bypass Capacitor * Short Circuit Current Fold-back * Guaranteed 750mA output * Current Limiting * Portable Electronics
Applications
- PC Peripherals * Wireless Devices * Battery Powered Widgets * Instrumentation The SSC2117 is stable with an output capacitance of 4.7mF or greater.
Description
The SSC2117 positive,linear regulators feature low quiescent current (45mA typ.) with low dropout voltage, making them ideal for battery applications. Output voltage are set at the factory and trimmed to 1.5% accuracy.These rugged devices have both Thermal Shutdown and Current Fold-back to prevent device failure under the "Worst" of operating conditions. 01-Jun-2002 Rev. A Page 1 of 7 http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual RoHS Compliant Product Typical Application Circuit Functional Block Diagram A 5.80 6.20 M 0.10 0.25 B 4.80 5.00 H 0.35 0.49 C 3.80 4.00 L 1.35 1.75 D 0C 8 C J 0.375 REF. E 0.40 0.90 K 45C F 0.19 0.25 G 1.27 TYP . Millimeter Millimeter SSC2117 * Power-Saving Shutdown Mode
Over Temperature Hystersis Output Voltage Temperature Coefficient Short Circuit Current Output Voltage Noise VIN OTS OTH 750 C o C o ppm/ mA dB uVrms C o VIN=VOUT(T)+1V,VO<0.4V f=100Hz f=1kHz f=10kHz Io=100mA Co=4.7uF f=10Hz~100kHz, Io=10mA -0.4 0.4 4.0V V (T)OUT REGLINELine Regulation I 45 0.02 0.1 A V =V (T)+2V,Io=0mA -0.15 -0.1
0.15 Io=1mA
VIN=VOUT(T)+1 to VOUT(T)+2 VOUT(T)< 2.0V 2.0V VOUT(T)<4.0V Power Supply Rejection VEH IEH ISD _EN Input Threshold 2 0.5 2 _ uA V VEN=VIN,VIN=2.7V VIN=5V,Vo=0V,VEN<VELShutdown Supply Current VEL _ VIN 0.4 VIN=2.7V to 7V EN Input Bias Current IEL _ to 7V VEN=0V,VIN=2.7V to 7V uA Quiescent Current Q 1000 u IN OUT Vo=V mV 650 500 OUT Parameter Symbol Max.Typ. ConditionMin. Unit Output Voltage Output Current Current Limit Dropout Voltage VOUT IO ILIM VDROPOUT -1.5% 750 V mA VIN=VOUT(T)+2V,1o=1mA VO>1.2V_ (E) VOUT (T) 1.5% mA Load Regulation REGLOAD 0.2 VIN=VOUT(T)+2V,Io=1mA~ 750mA VOUT(T)=1.5V _ Io=750mA (E)-2% Electrical Characteristics Ta=25 unless otherwise noted o C 750 _ VO>1.2V VOUT(T)=1.8V VOUT(T) 2.0V (ceramic) CO=4.7uF ADJ Input Bias Current Min. Load Current ADJ Reference Voltage IADJ _ _1 uA ILOAD VREF _ 70_ 1.221 1.240 1.260 uA V VIN=2.5V http://www.SeCoSGmbH.com/ o C)Power Dissipation ( Input Voltage Output Current Output Voltage Operating Ambient Temperature Junction Temperature Parameter Symbol Ratings Unit V mA V C mW VIN IOUT Tj Max. PD/(VIN-VO) -40~+125 Gnd-0.3 to VIN+0.3 810 -40~+85 o Max. Junction Temperature T=100 EDS Classification VOUT Topr Tj PD 150 B C o C o Absolute Maximum Ratings Elektronische Bauelemente Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 7 SSC2117 750mA CMOS Positive Voltage Regulator (VIN=VOUT(T)+2V,VEN=VIN,CIN=1uF,COUT=4.7uF) Note 1: VOUT (E) =Effective Output Voltage (i.e. the output voltage when "VOUT (T) +2.0V" is provided at the VIN pin while maintaining a certain IOUT value). 2: VOUT (T) =Specified Output Voltage 3: VIN (MIN) =VOUT+VDROPOUT
01-Jun-2002 Rev. A Page 3 of 7 ht tp://www.SeCoSGmbH.com/ A ny changing of specification will not be informed individual Elektronische Bauelemente SSC2117-AD Part Number Marking Output Voltage Part Number Marking Output Voltage 7AAD2 AdjustableXXXX Detailed Description The SSC2117 of COMS regulators contain a PMOS pass transistor,voltage reference, error amplifier,over-current protection and thermal shutdown.The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits become active when the junction temperature exceeds140 C, or the current exceeds 2.2A. During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops below 120 C.The SSC2117 behaves like a current source when the load reaches 2.2A. However, if the load impedance drops below 0.3ohms, the current drops back to 600mA to prevent excessive power dissipation. Normal operation is restored when the load resistance exceeds of 0.75ohms. o o External Capacitors The SSC2117 is stable with an output capacitance to ground of 4.7uF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1uF ceramic capacitor with a 10uF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the input and ground to stabilize VIN. The input capacitor should be at least 0.1uF to have a beneficial effect. All capacitors should be placed in closed proximity to the pins. A "Quiet" ground termination is desirable. This can be achieved with a "Star" connection. Enable When EN pin is pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent current is less than 2uA. This pin behaves much like an electronic switch. 100K resistor is necessary between VEN source and EN pin when VEN is high than VIN. (Note: There is no internal pull-up for EN pin. It can not be floating.) Ω Adjustable Version The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to 5.0V. Vadj is trimmed to 1.24V and Vout is given by the equation: VOUT=Vadj*(1+R1/R2) Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will reduce stability. In general, R1 and R2 in the 10's of k will produce adequate stability, given reasonable layout precautions. To improve stability characteristics, keep parasitic on the ADJ pin to min., and lower R1 and R2 values. Ω Ordering Information(contd.) 750mA CMOS Positive Voltage Regulator SSC2117
01-Jun-2002 Rev. A Page 4 of 7 http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual SSC2117 750mA CMOS Positive Voltage Regulator Characteristics Curve
http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 5 of 7 SSC2117 750mA CMOS Positive Voltage Regulator
01-Jun-2002 Rev. A Page 6 of 7 ht tp://www.SeCoSGmbH.com/ A ny changing of specification will not be informed individual Elektronische Bauelemente SSC2117 750mA CMOS Positive Voltage Regulator
01-Jun-2002 Rev. A Page 7of 7 Elektronische Bauelemente ht tp://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual External Resistor Divider Table R1(k ) 1 2 5 10 20 R1(k ) 1 2 5 10 20 VOUT R2(k )=(1.24*R1(k ))/(VOUT-1.24) VOUT R2(k )=(1.242*R1(k ))/(VOUT-1.242) Note: Small load (greater than 2mA) is necessary as R1 or R2 is larger than 50k . Otherwise, output voltage probably can not be pulled down to 0V on disable mode. Ω Ω Ω Ω Ω Ω Ω SSC2117 750mA CMOS Positive Voltage Regulator