SS812-23CV

SS811 SSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

www.SiliconStandard.com 1 of 8 SS811, SS812 Rev.1.01 4/06/2004 Reset Circuits with Manual Reset Input

FEATURES

Ultra-low supply current of 1µA (typ.) Guaranteed reset valid to Vcc=0.9V Available in two output yypes: Push-pull active -low (SS811) Push-pull active -high (SS812) Power-on reset pulse width minimum 140ms 4.4V, and 4.6V Tight voltage threshold tolerance: 1.5% Low profile package: SOT-23-5

APPLICATIONS

l Critical Microprocessor Monitoring

DESCRIPTION

The SS811 and SS812 are low-power microprocessor (µP ) supervisory circuits used to monitor power supplies in µP and digital systems. They improve circuit reliability and reduce cost by eliminating external components. The SS811 and SS812 also offer a manual reset input. These devices perform as valid singles in applications with Vcc ranging from 6.0V down to 0.9V. The reset signal lasts for a minimum period of 140ms whenever the VCC supply voltage falls below a preset threshold. Both the SS811 and SS812 were designed with a reset comparator to help identify invalid signals lasting less than 140ms. The only difference between the SS811 and the SS812 is that one has an active -low RESET output and the other has an active -high RESET output . A low supply current (1µA) makes the SS811 and SS812 ideal for portable equipment. The devices are available in a SOT-23-5 package. TYPICAL APPLICATION CIRCUIT VCC VCC GND GND µP RESET INPUT RESET (RESET) MR VCC SS811 (SS812) Pushbutton Switch

www.SiliconStandard.com 2 of 8 SS811, SS812 Rev.1.01 4/06/2004 ORDERING INFORMATION PIN CONFIGURATION SS811-XXCXXX SS812-XXCXXX (A dditional voltage versions with a unit of 0.1V within the voltage range from 1.5V to 5.5V for this product line may be available on demand with prior consultation with SSC.) Example: SS811 -31C VTR à 3.1V version in SOT- 23- 5 package, shipped in tape and reel. SOT- 23- 5 TOP VIEW 1: G ND 2: NC 3: RESET (RESET) 4: MR 5: VCC Packing type TR: T ape and reel Package type V: SOT- 23- 5 Reset Threshold Voltage 23: 2.3V 26: 2.6V 29: 2.9V 31: 3.1V 40: 4.0V 44: 4.4V 46: 4.6V 3 2 1 4 5 SOT -23-5 Marking Part No. Marking Part No. Marking SS811-23CV BQ23 SS812-23CV BR23 SS811-26CV BQ26 SS812-26CV BR26 SS811-29CV BQ29 SS812-29CV BR29 SS811-31CV BQ31 SS812-31CV BR31 SS811-40CV BQ40 SS812-40CV BR40 SS811-44CV BQ44 SS812-44CV BR44 SS811-46CV BQ46 SS812-46CV BR46

www.SiliconStandard.com 3 of 8 SS811, SS812 Rev.1.01 4/06/2004 ABSOLUTE MAXIMUM RATINGS VCC -0.3V ~6.5V RESET, RESET -0.3V ~ (VCC+0.3V) Input Current (VCC, MR ) 20mA Output Current (RESET or RESET ) 20mA Continuous Power Dissipation (TA = +70°C) 320mW Operating Junction Temperature Range -40°C ~ 85°C Storage Temperature Range - 65°C ~ 150°C Lead Temperature (Soldering) 10 sec 260°C Note1: Any stress beyond the Absolute Maximum Ratings above may cause permanent damage to the device. TEST CIRCUIT VCC

5 GND

www.SiliconStandard.com 4 of 8 SS811, SS812 Rev.1.01 4/06/2004

ELECTRICAL CHARACTERISTICS

(Typical values are at T A=25° C, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Operating Voltage Range V CC 0.9 6 V Supply Current I CC V CC = VTH +0.1V 1 3 µA TA=+25°C 2.265 2.3 2.335 SS811-23 TA= -40°C to +85°C 2.254 2.346 TA=+25°C 2.561 2.6 2.639 SS811-26 TA= -40°C to +85°C 2.548 2.652 TA=+25°C 2.857 2.9 2.944 SS811-29 TA= -40°C to +85°C 2.842 2.958 TA=+25°C 3.054 3.1 3.147 SS811-31 TA= -40°C to +85°C 3.038 3.162 TA=+25°C 3.940 4.0 4.060 SS811-40 TA= -40°C to +85°C 3.920 4.080 TA=+25°C 4.334 4.4 4.466 SS811-44 TA= -40°C to +85°C 4.312 4.488 TA=+25°C 4.531 4.6 4.669 Reset Threshold V TH SS811-46 TA=-40°C to +85°C 4.508 4.692 V VCC to Reset Delay T RD V CC=VTH to (VTH –0.1V), V TH=3.1V 20 µS TA=+25°C 140 230 560 Reset Active Timeout Period TRP VCC = VTH(MAX) TA= -40°C to +85°C 100 1030 mS MR to Reset Propagation Delay TMD Vcc=6V 0.5 µS VIH 0.7V CC MR Input Threshold VIL 0.25V CC V MR Pull-Up Resistance 10 20 30 KΩ VOH V CC=VTH+0.1V, ISOURCE =1mA 0.8V CC RESET Output Voltage VOL V CC=VTH - 0.1V, ISINK =1mA 0.2Vcc V VOH V CC=VTH+0.1V, ISOURCE =1mA 0.8V CC RESET Output Voltage VOL V CC=VTH - 0.1V, ISINK =1mA 0.2Vcc V Note2: RESET output is for the SS811; RESET output is for the SS812. Note3: Specifications for operating temperature ranges from -40°C to 85°C, are guaranteed by Statistical Quality Controls (SQC), with no production testing.

www.SiliconStandard.com 5 of 8 SS811, SS812 Rev.1.01 4/06/2004 TYPICAL PERFORMANCE CHARACTERISTICS -40 -20 0 20 40 60 80 100 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 VTH=2.3V VTH=3.1V VTH=4.6V Supply Current (µA) Temperature (°C) Fig 1 Supply Current vs. Temperature Power -Down Reset Delay (µs) Fig 2 Power-Down Reset Delay vs. Temperature -60 -40 -20 0 20 40 60 80 100 100 110 120 VOD=200mV VOD=100mV VOD=50mV Temperature (°C) VTH=2.3V VOD=VTH-VCC Power -Down Reset Delay (µs) Temperature (°C) Fig 3 Power-Down Reset Delay vs. Temperature -60 -40 -20 0 20 40 60 80 100 100 120 140 160 180 200 220 240 VOD=200mV VOD=100mV VOD=50mV VTH=3.1V VOD=VTH-VCC Power -Down Reset Delay (µs) Temperature (°C) Fig 4 Power-Down Reset Delay vs. Temperature -60 -40 -20 0 20 40 60 80 100 100 200 300 400 VOD=200mV VOD=100mV VOD=50mV VTH=4.6V VOD=VTH-VCC Normalized Reset Threshold (V) Temperature (°C) Fig 5 Normalized Reset Threshold vs. Temperature -40 -20 0 20 40 60 80 100 0.985 0.990 0.995 1.000 1.005 1.010 1.015 VTH=3.1V VTH=2.3V VTH=4.6V Power -Up Reset Timeout (ms) Temperature (°C) Fig 6 Power-Up Reset Timeout vs. Temperature -60 -40 -20 0 20 40 60 80 100 100 200 300 400 500 600 VTH=2.3V VTH=3.1V VTH=4.6V

www.SiliconStandard.com 6 of 8 SS811, SS812 Rev.1.01 4/06/2004 BLOCK DIAGRAM RPULL_UP 20K MR GND RESET (RESET) Reset Generator - Bandgap VCC PIN DESCRIPTIONS GND Pin : Ground. RESET Pin (SS811) : Active low output pin. RESET Output remains low while Vcc is below reset threshold. RESET Pin (SS812) : Active high output pin. RESET output remains high while Vcc is below reset threshold. MR Pin : Logic low manual reset input. This active -low input has an internal 20k Ω pull-up resistor. It can be driven by a TTL or CMOS, or shorted to ground with a switch. Leave open when unused. Vcc Pin : Supply voltage. DETAILED DESCRIPTIONS OF TECHNICAL TERMS RESET OUTPUT The microprocessor will be activated at a valid reset state. These µ P supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. RESET is guaranteed to be a logic low for VTH>VCC>0.9V. Once VCC exceeds the reset threshold, an internal timer keeps RESET low for the reset timeout period; after this interval, RESET goes high. If a brownout condition occurs (VCC drops below the reset threshold), RESET goes low. Any time VCC goes below the reset threshold, the internal timer resets to zero, and RESET goes low. The internal timer is activated after VCC returns above the reset threshold, and RESET remains low for the reset timeout period. The manual reset input ( MR ) can also initiate a reset. The SS812 has an active-high RESET output that is the inverse of the SS811’s RESET output.

www.SiliconStandard.com 7 of 8 SS811, SS812 Rev.1.01 4/06/2004 MANUAL RESET INPUT Many microprocessor-based products require manual reset capability, allowing operators, test technicians, or external logic circuitry to initiate a reset. Logic low on MR asserts reset. Reset will remain asserted for the Reset Active Timeout Period (t RP) after MR returns high. This input has an internal 20KO pull-up resistor, so it can be floating if it is not used. MR can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Another alternative is to connect a normal switch from MR to GND to create a manual reset function. C onnecting a 0.1µF capacitor from MR to ground can provide noise immunity to prevent noise caused by long cables of MR or noisy environment. BENEFITS OF HIGHLY A CCURATE RESET THRESHOLD The SS811/812 with specified voltage as 5V±10% or 3V ±10% are ideal for systems using a 5V ±5% or 3V±5% power supply. The reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range of the system ICs. The pre-trimmed thresholds reduce the range over which an undesirable reset may occur.

APPLICATION INFORMATION

NEGATIVE-GOING VCC TRANSIENTS In addition to issuing a reset to the microprocessor during power-up, power-down, and brownout conditions, the SS811 series are relatively resistant to short-duration negative-going VCC transient. ENSURING A VALID RESET OUTPUT DOWN TO VCC=0 When VCC falls below 0.9V, the SS811 RESET output no longer sinks current; it becomes an open circuit. In this case, high-impedance CMOS logic inputs connected to RESET can drift to undetermined voltages. Therefore, the SS811/2 is perfect for most CMOS applications with VCC down to 0.9V. However in applications where RESET must be valid down to 0V, adding a pull-down resistor to RESET causes any leakage currents to flow to ground, holding RESET low. INTERFACING TO MICROPROCESSORS WITH BIDIRECTIONAL RESET PINS Microprocessors with bidirectional res et pins may have contention with the SS811/812 reset outputs. If the SS811 RESET output is asserted high and the microprocessor wants to pull it low, indeterminate logic levels may occur. To correct such cases, connect a resistor between the SS811 RESET (or SS812 RESET) output and the microprocessor reset I/O. Buffer the reset output to other system components.

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 8 of 8 SS811, SS812 Rev.1.01 4/06/2004 PHYSICAL DIMENSIONS SOT-23-5 (unit: mm) SYMBOL MIN MAX A 1.00 1.30 A1 — 0.10 A2 0.70 0.90 b 0.35 0.50 C 0.10 0.25 D 2.70 3.10 E 1.40 1.80 e 1.90 (TYP) H 2.60 3.00 L 0.37 — E e D H AA2 b L θ 1 C θ 1 1° 9°