SS6526-1COTB

SS6526 SSC | Alldatasheet

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Dual USB High-Side Power Switch 10/23/2007 Rev.1.00 www.SiliconStandard.com 1 „ FEATURES

• 110mΩ (5V Input) High-Side MOSFET Switch. rements for rol their e at upstream port from dropping excessively. z 500mA Continuous Load Current per Channel. z 110µA Typical On-State Supply Current. z 1µA Typical Off-State Supply Current. z Current-Limit / Short Circuit Protection. z Thermal Shutdown Protection under Overcurrent Condition. z Undervoltage Lockout Ensures that Switch is off at Start Up. z Output can be Forced Higher than Input (Off-State). z Open-Drain Fault Flag. z Slow Turn ON and Fast Turn OFF. z Enable Active-High or Active-Low. „ APPLICATIONS z USB Power Management. z Hot Plug-In Power Supplies. z Battery-Charger Circuit.

DESCRIPTION

The SS6526 is a dual high-side power switch for self-powered and bus-powered Universal Serial Bus (USB) applications. Both high-side switches are MOSFET with 110m Ω R DS(ON), which meets USB voltage drop requi maximum transmission wire length. Multi-purpose open-drain fault flag output indicates over-current limiting, thermal shutdown, or undervoltage lockout for each channel. Output current is typically limited to 1A, and the thermal shutdown functions of the power switches independently cont channel under overcurrent condition. Guaranteed minimum output rise time limits inrush current during hot plug-in as well as minimizing EMI and prevents the voltag Pb-free; RoHS-compliant SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 2 „ TYPICAL APPLICATION CIRCUIT GND VBUS OVERCURRENT IN OUTA GND CTLA FLGA FLGB CTLB OUTB AIC1526USB Controller GND ON/OFF 4.50V to 5.25V Upstream VBUS 100mA max DATA GND VBUS 0.01µF 33µF DATA 0.01µF 33µF DATA 0.1µF 10K 10K 33µF 5.0V VCC Ferrite Bead OVERCURRENT VIN ON/ GND VBUS SS6722 OUTIN GND + 1µF CIN 10µF COUT * 3 3µF, 16V Tantalum, or 10 0µF, 10V Electrolytic Bold line indicate high- current traces Two-Port Self-Powered Hub „ ORDERING INFORMATION PACKING TYPE TR: TAPE & REEL TB: TUBE PACKAGING TYPE N: DIP-8 S: SOP-8 O: MSOP-8 C: Commercial G: Lead Free Commercial CONTROL POLARITY 0: Active Low 1: Active High Example: SS6526-0CSTR Æ Active Low Version, in SOP-8 Package & Taping & Reel Packing Type (CN is not available in TR packing) SS6526-1PSTR Æ Active High Version, in Lead Free SOP-8 Package & Taping & Reel Packing Type PIN CONFIGURATION DIP-8 SOP-8 TOP VIEW GND OUTA IN OUTB FLGB FLGA CTLB CTLA 1 OUTB OUTA IN GND FLGB FLGA CTLB CTLA 1 MSOP-8 TOP VIEW SS6526 - XXXXX SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 3 „ ABSOLUTE MAXIMUM RATINGS Supply Voltage (VIN) 7.0V Fault Flag Voltage (VFLG) 7.0V Fault Flag Current (IFLG) 50mA Control Input (VCTL) -0.3V ~7V Operating Temperature Range -40°C~85°C Junction Temperature 125°C Storage Temperature Range -65°C ~ 150°C Lead Temperature (Soldering, 10sec) 260°C Thermal Resistance, ǀJA (Junction to Ambient) DIP-8 100°C/W (Assume no Ambient Airflow, no Heatsink) SOP-8 160°C/W MSOP-8 180°C/W Thermal Resistance, ǀJC (Junction to Case) DIP-8……… …… ………… …… ………..60 °C /W Absolute Maximum Ratings are tho se values beyond which the life of a dev ice may be impaired. „ TEST CIRCUIT 10Ω SS6526 0.1µF OFF ON VCC +5V 10K R1 CTLA OUT A FLGA IN FLGB GND CTLB OUT B OFF ON 10Ω 10K R2 SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 4 „ ELECTRICAL CHARACTERISTICS (VIN= 5V, TA=25°C, unless otherwise specified.) (Note 1) PARAMETERS CONDITIONS MIN. TYP . MAX. UNIT Supply Current VCTL =Logic “0”, OUT=Open VCTL =Logic “1”, OUT=Open 0.75 110 160 µA Control Input Voltage VCTL =Logic “0” VCTL =Logic “1” 2.4 0.8 V Control Input Current VCTL =Logic “0” VCTL =Logic “1” 0.01 0.01 µA Control Input Capacitance 1 pF Output MOSFET Resistance 110 150 mΩ Output Turn-On Rise Delay RL = 10Ω each Output 100 µS Output Turn-On Rise Time RL = 10Ω each Output 1000 2500 µS Output Turn-Off Delay RL = 10Ω each Output 0.8 20 µS Output Turn-Off Fall Time RL = 10Ω each Output 0.7 20 µS Output Leakage Current 10 µA Current Limit Threshold 0.6 1.0 1.25 A Over Temperature Shutdown Threshold TJ Increasing TJ Decreasing 135 125 Error Flag Output Resistance VIN = 5V, IL =10 mA VIN = 3.3V, IL =10mA Ω Error Flag Off Current VFLG = 5V 0.01 1 µA UVLO Threshold VIN Increasing VIN Decreasing 2.6 2.4 V Note 1: Specifications are production tested at T A=25°C. Specifications over the -40 °C to 85 °C operating temperature range are assured by de sign, characterization and correlation with Statistical Quality Controls (SQC). SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 5 „ TYPICAL PERFORMANCE CHARACTERISTICS Fig. 1 ON Resistance vs. Supply Voltage ON Resistance (m Ω) Supply Voltage (V) 104 106 108 110 112 114 116 118 RL=47Ω TA=25°C Temperature (°C) Fig. 2 Output On Resistance vs. Temperature -40 -20 0 20 40 60 80 10080 100 110 120 130 140 150ON Resistance (m Ω) RL=47Ω TA=25°C Fig. 3 UVLO Threshold Voltage vs. Temperature Temperature (°C) Threshold Voltage (V) -40 -20 0 20 40 60 80 100 2.0 2.2 2.4 2.6 2.8 3.0 Rising Falling Fig. 4 ON-State Supply Current vs. Supply Voltage Supply Voltage (V) 34 56 7 100 120 140 160 Both Switches ON Supply Current (µA) -40 -20 0 20 40 60 80 10080 100 110 120 130 Both Switches ON Fig. 5 ON State Current vs. Temperature Temperature (°C) Supply Current (µA) Fig. 6 OFF-State Current vs. Temperature Temperature (°C) Supply Current (µA) -40 -20 0 204 0 608 0 1000 0.02 0.04 0.06 0.08 0.10 Both Switches OFF SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 6 „ TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Fig. 7 OFF-State Current vs. Supply Voltage Supply Voltage (V) 34 5 6 7 0.02 0.04 0.06 0.08 0.10 Both Switches OFF Supply Current (µA) Fig. 8 Control Threshold vs. Supply Voltage Supply Voltage (V) Enable voltage 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 VEN Rising VEN Falling Time (mS) Fig. 9 Turn-On, Turn-Off Characteristics Control (V) Output (V) RL=47Ω FLG IOUT Fig. 10 Current Limit Response VOUT SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 7 „ BLOCK DIAGRAM CTLB FLGB FLGA CTLA OUTA Charge Pump Thermal Shutdown Charge Pump Driver UVLO Current Limit Driver IN Power N-MOSFET Current Limit OUTB Power N-MOSFET CS CS „ PIN DESCRIPTIONS PIN 1: CTLA - Controls the turn-on/turn-off of channel A MOSFET with TTL as a control input. Active high for SS6526-1 a nd active lo w for SS6526-0. PIN 2: FLGA - An active-low and open-drained fault flag output for channel A. FLGA is an indicator for current limit when CTLA is active. In normal mode operation (CTLA or/and CLTB is active), it also can indicate thermal shutdown or undervoltage. PIN 3: FLGB - An active-low and open-drained fault flag output for channel B. FLGB is an indicator for current limit when CTLB is active. In normal mode operation (CTLB o r / a n d C L T A i s a c t i v e ) , i t a l s o can indicate thermal shutdown or undervoltage. PIN 4: CTLB - Controls the turn-on/turn-off of channel B MOSFET with TTL as a control input. Active High for SS6526-1 a nd ac tive lo w for SS6526-0. PIN 5: OUTB - Channel B MOSFET switch output. PIN 6: GND - Chip power ground. PIN 7: IN - Power supply input. PIN 8: OUTA - Channel A MOSFET switch output. SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 8 „ APPLICATION INFORMATION z Error Flag An error Flag is an open-drained output of an N-channel MOSFET. FLG output is pulled low to signal the following fault conditions: input undervoltage, output current limit, and thermal shutdown. z Current Limit The current limit threshold is preset internally. It protects the output MOSFET switches from damage resulting from undesirable short circuit conditions or excess inrush current, which is often encountered during hot plug-in. The low limit of the current limit threshold of the SS6526 allows a minimum current of 0.6A through the MOSFET switches. The error flag signals when any current limit conditions occur. z Thermal Shutdown When temperature of SS6526 exceeds 135 °C for any reasons, the thermal shutdown function turns both MOSFET switches off and signals the error flag. A hysteresis of 10 °C prevents the MOSFETs from turning back on until the chip temperature drops below 125 °C. However, if thermal shutdown is triggered by chip temperature rise resulti ng from overcurrent fault condition of either one of the MOSFET switches, the thermal shutdown function will only turn off the switch that is in overcurrent condition and the other switch can still remain its normal operation. In other words, the thermal shutdown function of the two switches is independent of each other in the case of overcurrent fault. z Supply Filtering A 0.1µF to 1µF bypass capacitor from IN to GND, located near the device, is strongly recommended to control supply transients. Without a bypass capacitor, an output short may cause sufficient ringing on the input (from supply lead inductance) to damage internal control circuitry. z Transient Requirements USB supports dynamic attachment (hot plug-in) of peripherals. A current surge is caused by the input capacitance of down stream device. Ferrite beads are recommended in series with all power and ground connector pins. Ferrite beads reduce EMI and limit the inrush current during hot-attachment by filtering high-frequency signals. z Short Circuit Transient Bulk capacitance provides the short-term transient current needed during a hot-attachment event. A 33µF/16V tantalum or a 100µF/10V electrolytic capacitor mounted close to downstream connector each port should provide transient drop protection. z Printed Circuit Layout The power circuitry of USB printed circuit boards requires a customized layout to maximize thermal dissipation and to minimize voltage drop and EMI. SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 9 „ APPLICATION CIRCUIT CTLA1 FLGA2 FLGB3 CTLB4 OUTB 5 GND 6 IN 7 OUTA 8 AIC1526 0.1uF 4.7uF USB Controller 33uF Bus Powered Hub Vbus GND USB Host Cable Cable Vbus GND Downstream USB Device Fig. 11 Soft Start (Single Channel) CTLA1 FLGA2 FLGB3 CTLB4 OUTB 5 GND 6 IN 7 OUTA 8 SS6526 0.1uF4.7uF USB Controller 33uF Vbus GND USB Host Cable 33uF USB Device USB Device USB Peripheral Fig. 12 Inrush Current-Limit Application SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 10 „ PHYSICAL DIMENSIONS (unit: mm) h θ L D e H E C B 0.500.25 0.40 1.27

1.27 BSC

4.80 5.80 3.80 0.33 0.19 0.10 5.00 6.20 4.00 0.51 0.25 0.25 S Y M B O L A SOP-8 MILLIMETERS 1.35 MIN. 1.75 MAX. A θ L VIEW B 0.25 BASE METAL GAUGE PLANE WITH PLATING B C D e AA H E h X 45° SEE VIEW B z SOP-8 SEATING PLANE Note: 1.Refer to JEDEC MS-012AA. 2.Dimension “D” does not include mo ld flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3.Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash or protrusion shall not exceed 10 mil per side. 4.Controlling dimension is millim eter, converted in ch dimensions are not necessarily exact. SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 11 z DIP-8 GAUGE PLANE 0.38 A A1 A2 L A A e eB eA D E D WITH PLATING SECTION A-A BASE METAL C

2.54 BSCe

L eB eA 2.92

7.62 BSC

3.81 10.92 D 9.01 E 7.62 6.10 0.13 c b 0.20 1.14 0.36 10.16 8.26 7.11 0.35 1.78 0.56 MILLIMETERS MIN. S Y M B O L A 0.38 2.92 MAX. 4.95 5.33 DIP-8 Note: 1.Refer to JEDEC MS-001BA. 2.Dimension D, D1 a nd E1 do not include mold flash o r protrusions. Mold flash or protrusion shall not exceed 10 mil. 3.Controlling dimension is millim eter, converted in ch dimensions are not necessarily exact. SS6526

10/23/2007 Rev.1.00 www.SiliconStandard.com 12 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. z MSOP-8 A A1 A2 θVIEW B L 0.25 SECTION A-A BASE METAL WITH PLATING b c E D A e A SEE VIEW B e θ L c E D b

0.65 BSC

0.40 0.70

4.90 BSC

0.13 2.90 2.90 0.75 0.25 0.05 0.23 3.10 3.10 0.95 0.40 0.15 S Y M B O L A MSOP-8 MILLIMETERS MIN. 1.10 MAX. Note: 1. Refer to JEDEC MO-187AA. 2. Dimension “D” does not include mo ld flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protr usions. Inter-lead flash and protrusions shall not excee d 10 mil pe r side. 4. Controlling dimension is millim eter, converted inch dimensions are not necessarily exact.