SS432G SSC | Alldatasheet
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Technical content
www.SiliconStandard.com 1 of 7 Vref Ref Cathode Anode Cathode Reference. Anode SOT-89 (Top view) Cathode Anode Reference SS432G Adjustable Precision Shunt Regulator PIN CONFIGURATION BLOCK DIAGRAM TO-92 (Top view) SYMBOL The SS432G is a low-voltage three-terminal adjustable shunt regulator with guaranteed thermal stability over the applicable temperature range. The output voltage can be set to any value between VREF (approximately 1.24V) and 12V using two external resistors (see application circuit). This device has a typical output impedance of 0.25 ohms. Active output circuitry provides very sharp turn-on characteristics, making this device an excellent alternative to Zener diodes in many applications. The SS432G is characterized for operation from 0°C to 105°C, and four package options ( SOT-23-3, SOT-23-5, SOT-89, TO-92) allow the designer the opportunity to select the proper package for the application.
DESCRIPTION
Low voltage operation (1.24V) Adjustable output voltage from VO = V REF to 12V Wide operating current range from 55µ A to 100mA Low dynamic output impedance 0.25Ω typ. ESD rating is 6kV (per MIL-STD 883D) Linear Regulators Adjustable Supplies Switching Power Supplies Battery Operated Computers Instrumentation
FEATURES
APPLICATIONS
6/22/2006 Rev.3.01 Cathode Reference Anode Pb-free, RoHS compliant. SOT-23-3 (Top view) SOT-23-5 Cathode Reference Anode 1 5 3 4 N/C Anode Cathode Reference N/C Package type: GN = SOT-23-3, RoHS compliant GT = TO-92, RoHS compliant GG = SOT-89, RoHS compliant Example: SS432GNB TR -> SS432G in RoHS-compliant SOT-23-3 shipped on tape and reel GV = SOT-23-5, RoHS compliant
ORDERING INFORMATION
www.SiliconStandard.com 2 of 7 SS432/G Parameter Symbol Maximum Units Cathode Voltage VKA 12 V Continuous Cathode Current IKA 150 mA Reference Current IREF 3 mA Operating Junction Temperature T j 150 °C Storage Temperature Range T STG -45 to +150 °C Thermal Resistance θJA 160 °C/W Lead Temperature (Soldering - std.lead finish) TLEAD 260°C/10 sec. PARAMETER SYMBOL TEST CIRCUIT TEST CONDITIONS MIN TYP MAX /G12/G13/G11/G0A/G06 1% Vref 1Reference voltage VKA = Vref IKA = 10mA 1.228 1.240 1.252 V Deviation of reference voltage over full temperature range VI(dev) 1 TA = full range /G03 VKA = Vref, IKA = 10mA 4 12 mV Ratio of change in reference voltage to the change in cathode voltage ΔVref Δ VKA
2 I KA = 10mA, Δ
VKA = Vref to 12V -1.5 -2.7 mV/V Reference current Iref 2 IKA = 10mA, R1 = 10kΩ , R2 = ∞ 0.15 0.5 µA Deviation of reference current over full temperature range II(dev) 2 IKA = 10mA, R1 = 10kW, R2 = ∞ /G03 TA = full range 0.05 0.30 µA Minimum cathode current for regulation Imin 1 VKA = Vref 55 80 µA Off-state cathode current Ioff 3 VKA = 12V, Vref = 0 0.001 0.1 µA Dynamic impedance |ZKA| 1 IKA = 100µA to 100mA, V KA = Vref ‹ f ≤ 1kHz 0.25 0.4 Ω ABSOLUTE MAXIMUM RATINGS over ambient temp. range. ELECTRICAL CHARACTERISTICS (TA =25°C) 6/22/2006 Rev.3.01
www.SiliconStandard.com 3 of 7 SS432G 6/22/2006 Rev.3.01 TYPICAL PEFORMANCE CHARACTERISTICS CATHODE CURRENT Vs. CATHODE VOLTAGE Cathode Current (mA) Cathode Voltage (V) CATHODE CURRENT Vs. CATHODE VOLTAGE Cathode Current (µA) Cathode Voltage (V) REFERENCE VOLTAGE Vs. JUNCTION TEMPERATURE /G11/G07/G12/G07/G0A/G07/G0B/G13/G07/G08/G14/G05/G15/G03/G02/G16/G07/G08/G0C/G0D/G14/G0F/G08 /G1C/G20/G21/G22/G12/G23/G14/G21/G01/G04/G16/G24/G25/G16/G26/G11/G12/G20/G26/G16/G01/G19/G01/G01/G02/G1A/G01 REFERENCE INPUT CURRENT Vs. JUNCTION TEMPERATURE /G11/G07/G12/G07/G0A/G07/G0B/G13/G07/G08/G01/G09/G0A/G0A/G07/G0B/G03/G08/G0C/G0B/G0E/G0F/G08 /G1C/G20/G21/G22/G12/G23/G14/G21/G01/G04/G16/G24/G25/G16/G26/G11/G12/G20/G26/G16/G01/G19/G01/G01/G02/G1A/G01 /G01/G02/G03/G03 /G01/G04/G05 /G01/G05/G03 /G01/G06/G05 /G03 /G06/G05 /G05/G03 /G04/G05 /G02/G03/G03 /G02/G06/G05 /G02/G05/G03 /G01/G06/G01/G02/G03/G02/G06 V KA= Vref TA = 25°C /G01/G02/G03/G03 /G01/G04/G03/G03 /G03 /G04/G03/G03 /G02/G03/G03 /G05/G03/G03 /G06/G03/G03 /G07/G03/G03 /G01 /G04/G03/G04/G02 VKA = Vref TA = 25°C /G02/G06/G03/G03 /G02/G06/G02/G03 /G02/G06/G06/G03 /G02/G06/G07/G03 /G02/G06/G08/G03 /G02/G06/G05/G03 /G02/G06/G09/G03 /G01/G06/G03/G03/G06/G03/G08/G03/G09/G03/G0A/G03/G02/G03/G03/G02/G06/G03 /G01/G02/G03/G04/G05/G06/G07/G08 /G01/G02/G03/G09/G05µ/G09/G08 /G01 /G02/G01/G01 /G03/G01/G01 /G04/G01/G01 /G05/G01/G01 /G06/G01/G01/G01 /G07/G02/G01/G01/G02/G01/G03/G01/G04/G01/G05/G01/G06/G01/G01/G06/G02/G01 /G0A/G04/G08/G03/G08/G04/G05/G0B/G08 /G0A/G0C/G08/G03/G08/G09 /G01/G0D/G07/G03/G04/G05/G06/G07
www.SiliconStandard.com 4 of 7 SS432G /G01 /G0D/G01/G02/G03 /G01/G02/G03/G04/G05 /G0E/G0D /G01/G0E/G0D /G0A/G01/G02 /G0A/G0B/G0C/G0D /G0E/G0F/G10/G11/G12 /G0E/G01/G02 /G0E/G0B/G0C/G0D /G0E/G0F /G0E/G10 /G0D/G01/G02/G11/G0D/G01/G02/G03/G04/G12/G0F/G13/G04/G0E/G0F/G14/G0E/G10/G04/G15/G04/G13/G04/G16/G01/G02/G03/G04/G17/G04/G0E/G0F /G01/G01/G02/G03/G04/G05 /G01/G02 /G01/G02/G03/G03 /G02/G03/G04/G05/G01/G06/G07/G08/G09/G0A/G07/G05/G01/G0B/G0C/G01 /G0D/G0A/G08/G04/G0E/G01/G0D/G08/G03/G0F/G01 /G02/G03/G04/G05/G01/G06/G07/G08/G09/G0A/G07/G05/G01/G10/G0C/G01 /G0D/G0A/G08/G04/G04/G11/G01/G0D/G08/G03/G0F/G01 /G02/G03/G04/G05/G01/G06/G07/G08/G09/G0A/G07/G05/G01/G12/G0C/G01 /G13/G0F/G0F/G01/G14/G05/G15/G05/G03/G01/G06/G0A/G08/G08/G03/G16/G05/G01
APPLICATION INFORMATION
VDEV = VMAX-VMIN VMIN TEMPERATURE Deviation of reference input voltage, V DEV, is defined as the maximum variation of the reference input voltage over the full temperature range. The average temperature coefficient of the reference in- put voltage, α VREF is defined as: T1 T2 25°C)(atV V T1 T2 610 25°C) (atV V-V C ppmV REF DEV REF MINMAX REF =°Δ Where: T2− T1=full temperature change. α VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV= 12.0mV, VREF= 1240mV, T2− T1= 105°C, slope is negative. 92ppm/°CV 105°C 610 1240 mV 12.0mV REF − = Note 4. The dynamic output impedance, Rz, is de- fined as: RZ = Z ZV IΔ Δ When the device is programmed with two external r e- sistors, R1 and R2, (see Fig. 2), the dynamic output impedance of the overall circuit, is defined as: [ ] R11RzI Vzr +≅Δ 6/22/2006 Rev.3.01
www.SiliconStandard.com 5 of 7 R1A R2A R2B R1B VIN Output turns ON when Low Limit <VIN < High Limit + VBE SS432 SS432 R4 R5 Low Limit≅ VREF ( 1+ R1B/ R2B )+ VBE High Limit ≅ VREF ( 1+ R1A/ R2A ) Over-Voltage/Under-Voltage Protection Circuit RCL IOUT VIN SS432 R VIN S SS432 IOUT=VREF/ RCL IOUT=VREF /RS Current Limiter or Current Source Constant-Current Sink VOUT VIN SS432 RIN VIN VOUT FUSE SS432 VOUT ≅ (1+R1/R2) x VREF VLIMIT ≅ (1+R1/R2) x VREF Higher Current Shunt Regulator Crow Bar APPLICATION EXAMPLES SS432G 6/22/2006 Rev.3.01
www.SiliconStandard.com 6 of 7 SS432G PHYSICAL DIMENSIONS SOT-23-3 6/22/2006 Rev.3.01 SYMBOL MIN NOM MAX A 0.88 1.10 1.30 A1 0.00 ---- 0.10 D1 0.30 0.40 0.51 e 1.70 2.00 2.30 D 2.80 2.90 3.04 E 2.10 2.50 2.90 E1 1.20 1.40 1.60 Units : mm Dimensions do not include mold protrusions. D E e A SOT-23-5
www.SiliconStandard.com 7 of 7 SS432G PHYSICAL DIMENSIONS SOT-89 /G01/G02 /G03/G02 /G04/G02 /G05/G02 /G02/G02/G02/G06/G02 /G07/G02 /G08/G02 /G09/G02 Units: mm. /G02/G03/G04/G05/G06/G07/G01/G04/G08/G09/G01/G04/G0A/G0B/G01 /G0A/G01/G0C/G0D/G0C/G0E/G01/G0C/G0D/G0F/G0E/G01 /G05/G01/G0C/G0D/G0E/G10/G01/G0C/G0D/G11/G10/G01 /G12/G01/G13/G0D/G10/G0E/G01/G13/G0D/G14/G0E/G01 /G15/G01/G11/G0D/G0C/G0E/G01/G11/G0D/G0F/G0E/G01 /G16/G01/G0E/G0D/G17/G13/G01/G0E/G0D/G0C/G0F/G01 /G18/G01/G13/G0D/G0C/G19/G01/G13/G0D/G10/G11/G01 /G1A/G01/G11/G0D/G1B/G0F/G01/G17/G0D/G0E/G0C/G01 /G1C/G01/G13/G0D/G0C/G0E/G01/G13/G0D/G0F/G0E/G01 /G08/G01/G0E/G0D/G17/G10/G01/G0E/G0D/G0C/G13/G01 /G01 /G01 /G01 /G02 /G03 SEATING PLANE /G0A /G0B /G0B/G0C Symbol Min Nom Max /G09/G0B/G0C/G0D/G0E/G0B/G0C/G0E/G0F/G0B/G0C/G0F/G0F /G09/G10/G10/G0C/G11/G11/G10/G0C/G0B/G10/G0C/G0B/G12 /G13/G14/G15/G0C/G0B/G16/G14 /G17/G10/G0D/G0C/G11/G12/G0D/G0C/G0E/G11/G0D/G0C/G12/G16 /G17/G0D/G0C/G10/G0D/G0D/G0C/G11/G18/G0D/G0C/G0D/G0E /G19/G0D/G0C/G0B/G11/G0D/G0C/G0E/G12/G0D/G0C/G16/G0B /G1A/G14/G10/G0C/G11/G12/G14 /G06/G10/G11/G0C/G18/G16/G10/G0B/G0C/G0D/G18/G10/G0D/G0C/G15/G15 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. PHYSICAL DIMENSIONS TO-92