SS30

SS30 ONSEMI | Alldatasheet

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D0110 SY 20080710-S00004 No.A1878-1/7 http://onsemi.com Semiconductor Components Industries, LLC, 2013 May, 2013 SS30 Overview The SS30 is a 3 phase all wave sensor-less motor driver for notebook PC fans. Feature

• Direct PWM 3 phase all wave sensor-less motor driver Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Power supply voltage V CC max 6.5 V Pre-drive voltage (gate voltage) VG max 10 V Output pin current I OUT max 0.7 A PWM input pin withstand voltage V PWM max V CC V FG output pin withstand voltage V FG max 6.0 V FG output current I FG max 5.0 mA 1/2FG output pin withstand voltage V 1/2FG max 6.0 V 1/2FG output current I 1/2FG max 5.0 mA RD output pin withstand voltage V RD max 6.0 V RD output current I RD max 5.0 mA Power dissipation 1 Pd max1 Independent IC 0.2 W Power dissipation 2 Pd max2 Mounted on specified board *1 1.05 W Operating temperature Topr *2 -30 to +95 °C Storage temperature Tstg -55 to +150 °C *1 : When mounted on 40.0mm×50.0mm×0.8mm glass epoxy 4 Layer 2S2P board *2 : Tj max = 150°C. Use the IC in the range where the temperature of the chip does not exceed Tj = 150°C during operation. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Power supply voltage V CC 2.2 to 6.0 V Bi-CMOS IC For Notebook PC Fan Motor Driver Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Oper ating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

No.A1878-2/7 Electrical Characteristics Ta = 25°C, VCC = 5V, unless specifically noted Ratings Parameter Symbol Conditions min typ max Unit Power supply current 1 I CC1 PWM pin = V CC 1.8 2.5 mA Power supply current 2 I CC2 PWM pin = 0V 20 50 μA Charge pump output Output voltage VG 9.8 V Output block Source Ron (H) I O = 0.5A, VG = 9.5V 0.6 1.0 Ω Sink Ron (L) I O = 0.5A, VCC = 5.0V 0.6 1.0 Ω Source + sink Ron (H+L) I O = 0.5A, VCC = 5V, VG = 9.5V 1.2 2 Ω Startup oscillation pin OSC pin charge current I OSC1 -2.5 μA OSC pin discharge current I OSC2 2.5 μA PWM input pin PWM pin high-level input voltage V PWMH V CC×0.8 V CC V PWM pin low-level input voltage V PWML 0 V CC×0.2 V PWM pin current I PWM PWM pin = 0V -50 μA PWM pin input frequency f PWM 20 25 50 kHz FG, 1/2FG, RD output pin FG, 1/2FG, RD output pin low-level voltage VFG V1/2FG VRD When IO = 0.5mA 0.1 0.2 V Current limiter circuit Limiter voltage V Rf RF = 1 Ω 0.225 0.25 0.275 V Constraint protection circuit Constraint protection detection time R DT1 0.5 1.0 s Constraint protection release time R DT2 5 s Thermal protection circuit Thermal protection circuit operating temperature TSD Design target * 150 180 °C Temperature hysteresis width ΔTSD Design target 30 °C * : Design target value and no measurement is made. The thermal protection circuit is incorporated to protect the IC from burnout or thermal destruction. Since it operates outside the IC's guaranteed operating range, the customer's thermal design should be performed so that the thermal protection circuit will not be activated when the fan is running under normal operating conditions. Package Dimensions unit : mm (typ) 3368 SANYO : VCT20(3.0X3.0) 0.4 3.0 3.0 0.8 (0.035) TOP VIEW SIDE VIEW SIDE VIEW BOTTOM VIEW 0.25 0.5 (0.5) (C0.17) (0.125) (0.13) Pd max - Ta 0.8 0.6 0.4 0.2 1.2 -30 -20 80 0.46 956020 25 400 100 1.0 1.05 Ambient temperature, Ta - C Allowable power dissipation, Pd max - W Specified circuit board : 40.0×50.0×0.8mm3 glass epoxy board 4 layer

No.A1878-3/7 Pin Assignment Application Circuit Example Top view 6 7 8 VO UO VCC COM COMIN FIL OSC SGND 109 WO RF CPC CP VG PWM FG FR SS30 SUBGND RD 1/2FR VM 17181920 6 7 8 VO UO VCC COM COMIN FIL OSC SGND 109 WO RF CPC CP VG PWM FG FR SS30 SUBGND RD 1/2FR VM 17181920 VCC 1000pF 2200pF PWM Control Signal f=20k to 50kHz PWM

No.A1878-4/7 Block Diagram Pin Functions Pin No. Pin name Function Equivalent circuit 1 VM Power supply for the IC and motor. It is short-circuited and uses it with power supply small signal pin VCC (pin 2). A capacitor must be connected between this pin and ground. UO VO WO Output pins. Connect the motor coil. 16 RF Output current detection. The drive current is detected by connecting a resistor between this pin and ground. 171820 2 V CC Power supply for the IC and motor. A capacitor must be connected between this pin and ground. 3 COM Motor middle point connection. 4 COMIN Motor position detection comparator filter pin. It is short-circuited and uses it with motor power supply pin VM (pin 1). A capacitor must be connected between this pin and the FIL pin (pin 5). 5 FIL Motor position detection comparator filter pin. A capacitor must be connected between this pin and the COMIN pin (pin 4). WOVO VG UO 4 5 Continued on next page. VCC WO VO UO RF COM COMIN FIL OSC VG CP CPC SUBGND FG PWM FR LOCK PROTECT LOGIC CURRENT LIMITTER PRE DRIVE MOSC 1/N TSD SELECTOR OSC CHARGE PUMP VREF VG SENSORLESS LOGIC SGND VM RD 1/2FG

No.A1878-5/7 Continued from preceding page. Pin No. Pin name Function Equivalent circuit 6 OSC Motor startup frequency setting. A capacitor must be connected between this pin and ground. The startup frequency is adjusted by controlling the charge/discharge current (±2.5μA) and the capacitance of the capacitor. VCC VCC 7 SGND Ground for IC. It is short-circuited and uses it with pin SUBGND (pin 19). 8 F/R Motor rotation direction switching. A high-level input causes current to flow into the motor in the order of U, V, and W and a low-level input in the order of U, W, and V. Changing the order of current application turns the motor in the opposite direction. VCC Reverse signal Forward signal Forward/reverse switching signal 9 1/2FG FG pulse output. This pin outputs 1/2 Hall sensor system equivalent pulse signal. 10 FG FG pulse output. This pin outputs a Hall sensor system equivalent pulse signal. 11 RD Motor lock detection output pin. When the motor is locked, "H" is output. 109 11 12 PWM PWM signal input. A high-level input turns on the output transistors. A low-level input turns off the output transistors and motor stops. The motor speed is set by controlling the duty cycle of the input PWM signal. The motor runs at full speed when this pin is held open. VCC 13 VG Charge pump step-up output. A capacitor must be connected between this pin and ground. 14 CP Charge pump step-up pulse output pin. A capacitor must be connected between this pin and the CPC pin (pin 15). 15 CPC Charge pump step-up pin. A capacitor must be connected between this pin and the CP pin (pin 14). VCC 14 15 19 SUBGND SUBGND pin for IC. It is short-circuited and uses it with pin SGND (pin 7).

No.A1878-6/7 SS30 Functional Description and Notes on External Components Read the following notes before designing driver circuits using the SS30 to design a system with fully satisfactory characteristics. 1. Output drive circuit and speed control methods The SS30 adopts the synchronous commutation PWM drive method to minimize power loss in the output circuits. Low on-resistance DMOS devices (total high and low side on-resistance of output block: 1.2Ω, typical) are used as the output transistors. The speed control of the driver is performed with an externally input PWM signal. PWM controls the speed by performing switching in accordance with the duty cycle that is input to the PWM pin (pin 12). The output transistor is on when a high-level voltage is input to the PWM pin, and off when a low-level voltage is input. When the motor is used with the PWM pin open, the built-in resistor causes the PWM pin to change to high-level voltage and the motor speed rises to full speed. When the PWM pin is fixed at low-level voltage, the motor decelerates, and after the motor stops it enters “Power Saving Mode. 2. Soft Switching Circuit This IC adopts variable duty soft switching to minimize the motor drive noise. 3. Current limiter circuit The current limiter circuit limits the output current peak value to a level determined by the equation I = VRF/RF (VRF = 0.25V typical). The current limiter circuit detects the peak current of the output transistors at the RF pin (pin 16) and turns off the transistor of the PWM phase. 4. OSC circuit The OSC pin (pin 6) is an oscillation pin provided for sensor-less motor startup commutation. When a capacitor is connected between the OSC pin and ground, the OSC pin starts self-oscillation, and this becomes the startup frequency. The oscillator frequency can be adjusted by changing the value of the external capacitor (i.e. reducing the value of the capacitor increases the startup frequency). It is necessary to select a value of the capacitor that provides the optimal startup characteristics. Please confirm the operation when starting without fail, and adjust the constant again when you change the characteristic of the motor shape change and the motor (coil resistance, number of rolling lines, and magnetization, etc.). 5. Position Detector Comparator Circuit for Rotor The position detection comparator circuit for the rotor is a comparator for detecting rotor positional information with the back EMF signal generated when the motor rotates. The IC determines the timing at which the output block applies current to the motor based on the position information obtained here. Insert a capacitor (between 1,000 and 10,000pF: Reference value) between the COMIN pin (pin 4) and FIL (pin 5) to prevent any motor startup miss-operation that is caused by the comparator input noise. Please confirm the operation when starting without fail, and adjust the constant again when you change the motor shape change and the motor characteristic (coil resistance, number of rolling lines, and magnetization, etc.) as well as the capacitor of the OSC pin. 6. FG, 1/2FG Output Circuit The FG pin (pin 10) and the 1/2FG pin (pin9) is the FG output pin. The FG pin outputs the pulse of one hall corresponding, and the 1/2FG pin outputs the pulse of 1/2 hall corresponding. Please use the pull-up resistor putting it because the FG pin and the 1/2FG pin are the open drain output compositions. Please connect the power supply where the pull-up resistor is connected with the power supply on the side where the FG signal is input. I will recommend about 10kΩ as resistance of the pull-up resistor. 7. RD (Lock detection) Output Circuit The RD pin and (pin 11) are the RD output pin. Please use the pull-up resistor putting it because the RD pin is an open drain output composition. Please connect the power supply where the pull-up resistor is connected with the power supply on the side where the RD signal is input. About 10kΩ is recommended as resistance of the pull-up resistor.

PS No.A1878-7/7 8. Charge Pump Circuit The SS30 n-channel DMOS output structure allows it to provide a charge pump based voltage step-up circuit. A voltage 2 times the VCC voltage can be acquired by inserting capacitors (recommended value: 0.1μF or larger) between the CP pin (pin 14) and CPC pin (pin 15). Note that this circuit is designed so that the stepped-up voltage (VG) is clamped at about 9.5VDC. A larger capacitor must be used between the VG pin (pin 12) and ground if the ripple on the stepped-up voltage (VG) results in VG exceeding 10V (VG max). Observe the following points if the VG voltage is supplied from external circuits. (1) The VG voltage supplied from the external circuits must not exceed the absolute maximum rating VG max. (2) The capacitors between the CP pin (pin 14) and CPC pin (pin 15) are not required. (3) Observe the correct sequence when turning the power supply on. Apply the VG voltage after first turning the VCC voltage on, and cancel the VG voltage application before turning the VCC off. (4) There is an IC-internal diode between the VCC and VG pins. Therefore, supply voltages such that VCC > VG must never be applied to this IC. 9. Notes on PCB Pattern Design The SS30 is a system driver IC implemented using the Bi-CMOS process; the IC chip includes bipolar circuits, MOS logic circuits, and MOS drive circuits. As a result, extreme care is required with respect to the pattern layout when designing application circuits. (1) SGND/SUBGND and VCC/VM wiring layout Please connect the SGND pin and the SUBGND pin by the beeline. Please connect the VCC pin and the VM pin by the beeline similarly. Insert a capacitor (recommended value: 1μF or larger) as near as possible to the pin between the power pin VCC (pin 1)/VM (pin 2) and SGND pin (pin 7). (2) Positioning the external components The external components that are connected to SGND (pin 7) must be connected with lines that are as short as possible. External components connected between IC pins must be placed as near to the pins as possible. ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s techn ical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC productsfor any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, anddistributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture oft h e part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.