SRV05-4MR6 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Protects 4 I/O Lines
  • Low Working V oltage: 5 V
  • Low Clamping V oltage
  • Low Capacitance (<5 pF) for High Speed Interfaces
  • Transient Protection for High Speed Lines to: IEC61000−4−2 (ESD) ±15 kV (air), ±8 kV (contact) IEC61000−4−4 (EFT) 40 A IEC61000−4−5 (Lightning) 12 A
  • TSOP−6 is Footprint Compatible with SOT−23 6 Lead, SC−59 6 Lead and SC−74
  • UL Flammability Rating of 94 V−0
  • This is a Pb−Free Device Typical Applications
  • High Speed Communication Line Protection
  • USB 1.1 and 2.0 Power and Data Line Protection
  • Digital Video Interface (DVI)
  • Monitors and Flat Panel Displays MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Power Dissipation 8 x 20 /C0109s @ TA = 25°C (Note 1) Ppk 300 W Operating Junction Temperature Range TJ −55 to +125 °C Storage Temperature Range Tstg −55 to +150 °C Lead Solder Temperature − Maximum (10 Seconds) TL 260 °C Human Body Model (HBM) Machine Model (MM) IEC 61000−4−2 Air (ESD) IEC 61000−4−2 Contact (ESD) ESD 16000 400 15000 8000 V IEC 61000−4−4 (5/50 ns) EFT 40 A IEC 61000−4−5 (8 x 20 /C0109s) − 12 A Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Non −repetitive current pulse per Figure 5 (Pin 5 to Pin 2) See Application Note AND8308/D for further description of survivability specs. LOW CAPACITANCE TVS ARRAY

300 WATTS PEAK POWER

6 VOLTS

ORDERING INFORMATION

TSOP−6 CASE 318G PLASTIC PIN CONFIGURATION AND SCHEMATIC

6 I/O

4 I/O

http://onsemi.com 63 = Specific Device Code M = Date Code /C0071= Pb−Free Package SRV05−4MR6T1G TSOP −6 (Pb−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. M /C0071 /C0071 *Date Code orientation may vary depending upon manufacturing location. (Note: Microdot may be in either location)

SRV05−4MR6 http://onsemi.com APPLICATIONS INFORMATION The new SRV05−4MR6 is a low capacitance TVS diode array designed to protect sensitive electronics such as communications systems, computers, and computer peripherals against damage due to ESD events or transient overvoltage conditions. Because of its low capacitance, it can be used in high speed I/O data lines. The integrated design of the SRV05 −4MR6 offers surge rated, low capacitance steering diodes and a TVS diode integrated in a single package (TSOP−6). If a transient condition occurs, the steering diodes will drive the transient to the positive rail of the power supply or to ground. The TVS device protects the power line against overvoltage conditions to avoid damage to the power supply and any downstream components. SRV05−4MR6 Configuration Options The SRV05−4MR6 is able to protect up to four data lines against transient overvoltage conditions by driving them to a fixed reference point for clamping purposes. The steering diodes will be forward biased whenever the voltage on the protected line exceeds the reference voltage (Vf or V CC + Vf). The diodes will force the transient current to bypass the sensitive circuit. Data lines are connected at pins 1, 3, 4 and 6. The negative reference is connected at pin 2. These pins must be connected directly to ground by using a ground plane to minimize the PCB’s ground inductance. It is very important to reduce the PCB trace lengths as much as possible to minimize parasitic inductances. Option 1 Protection of four data lines and the power supply using V CC as reference. I/O 1 I/O 2 I/O 3 I/O 4 VCC For this configuration, connect pin 5 directly to the positive supply rail (VCC), the data lines are referenced to the supply voltage. The internal TVS diode prevents overvoltage on the supply rail. Biasing of the steering diodes reduces their capacitance. Option 2 Protection of four data lines with bias and power supply isolation resistor. VCC 10 k I/O 1 I/O 2 I/O 3 I/O 4 The SRV05−4MR6 can be isolated from the power supply by connecting a series resistor between pin 5 and V CC. A 10 k/C0087 resistor is recommended for this application. This will maintain a bias on the internal TVS and steering diodes, reducing their capacitance. Option 3 Protection of four data lines using the internal TVS diode as reference. I/O 1 I/O 2 I/O 3 I/O 4 NC In applications lacking a positive supply reference or those cases in which a fully isolated power supply is required, the internal TVS can be used as the reference. For these applications, pin 5 is not connected. In this configuration, the steering diodes will conduct whenever the voltage on the protected line exceeds the working voltage of the TVS plus one diode drop (Vc = Vf + V TVS). ESD Protection of Power Supply Lines When using diodes for data line protection, referencing to a supply rail provides advantages. Biasing the diodes reduces their capacitance and minimizes signal distortion. Implementing this topology with discrete devices does have disadvantages. This configuration is shown below:

Figure 11. TI/E1 Interface Protection

SRV05−4MR6 http://onsemi.com PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE T 456 D e b E A0.05 (0.002) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. c L HE DIM A MIN NOM MAX MIN MILLIMETERS 0.90 1.00 1.10 0.035 INCHES A1 0.01 0.06 0.10 0.001 b 0.25 0.38 0.50 0.010 c 0.10 0.18 0.26 0.004 D 2.90 3.00 3.10 0.114 E 1.30 1.50 1.70 0.051 e 0.85 0.95 1.05 0.034 L 0.20 0.40 0.60 0.008 0.039 0.043 0.002 0.004 0.014 0.020 0.007 0.010 0.118 0.122 0.059 0.067 0.037 0.041 0.016 0.024 NOM MAX − −0° 10° 0° 10° /C0113 /C0113 0.95 0.037 1.9 0.075 0.95 0.037 /C0466mm inches/C0467SCALE 10:1 1.0 0.039 2.4 0.094 0.7 0.028 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. SRV05−4MR6/D PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative