SRDA05-4.TBT

SRDA05-4.TBT SAMTEC | Alldatasheet

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Technical content

1 www.semtech.com PROTECTION PRODUCTS - RailClamp®®®®® SRDA05-4 and SRDA12-4 Low Capacitance TVS Diode Array Description Features Circuit Diagram Schematic and PIN Configuration Revision 8/21/07 RailClamps are surge rated diode arrays designed to protect high speed data interfaces. The SRDA series has been specifically designed to protect sensitive components which are connected to data and trans- mission lines from overvoltage caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. The unique design incorporates surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient current to ground via the internal low voltage TVS. The TVS diode clamps the transient voltage to a safe level. The low capaci- tance array configuration allows the user to protect up to four high-speed data lines. The SRDA05-4 may be used to protect lines operating up to 5 volts while the SRDA12-4 may be used on lines operating up to 12 volts. These devices are in a 8-pin SOIC package. They are available with a SnPb or RoHS/WEEE compliant matte tin lead finish. The high surge capability (Ipp=25A, tp=8/20μs) means it can be used in high threat environments in applications such as CO/CPE equip- ment, telecommunication lines, and video lines.

Applications

Mechanical Characteristics ‹ USB Power and Data Line Protection ‹ T1/E1 secondary IC Side Protection ‹ T3/E3 secondary IC Side Protection ‹ HDSL, SDSL secondary IC Side Protection ‹ Video Line Protection ‹ Microcontroller Input Protection ‹ Base stations ‹ I2C Bus Protection ‹ Transient protection for high-speed data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 24A (8/20 μs) ‹ Array of surge rated diodes with internal TVS diode ‹ Protects four I/O lines ‹ Low capacitance (<15pF) for high-speed interfaces ‹ Low operating and clamping voltages ‹ Solid-state technology ‹ JEDEC SOIC-8 package ‹ Lead Finish: SnPb or Matte Sn ‹ Molding compound flammability rating: UL 94V-0 ‹ Marking : Part number, date code, logo ‹ Packaging : Tape and Reel per EIA 481 I/O 3 I/O 4 REF 2 REF 2 I/O 1 I/O 2 REF 1 REF 1 S0-8 (Top View) REF1 I/O 1 I/O 2 I/O 3 I/O 4 REF2

2© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 4-50ADRS retemaraPl obmySs noitidnoCm uminiMl acipyTm umixaMs tinU egatloVffO-dnatSesreveRV MWR 5V egatloVnwodkaerBesreveRV RB It Am1=6 V tnerruCegakaeLesreveRI R V MWR C°52=T,V5=0 1A μ egatloVgnipmalCV C I PP t,A1= p sμ02/8=8 .9V egatloVgnipmalCV C I PP t,A01= p sμ02/8=2 1V egatloVgnipmalCV C I PP t,A52= p sμ02/8=0 2V tnerruCesluPkaePI PP tp sμ02/8=5 2A ecnaticapaCnoitcnuJC j dnasnipO/IneewteB dnuorG VR zHM1=f,V0= 85 1F p snipO/IneewteB VR zHM1=f,V0= 4F p Absolute Maximum Rating gnitaRl obmySe ulaVs tinU t(rewoPesluPkaeP p )sμ02/8=P kp 005s ttaW I(egatloVdrawroFkaeP F t,A1= p )sμ02/8=V PF 5.1V erutarepmeTgniredloSdaeLT L ).ces01(062C ° erutarepmeTgnitarepOT J 521+ot55-C ° erutarepmeTegarotST GTS 051+ot55-C ° Electrical Characteristics (T=25 oC)

3© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 4-21ADRS retemaraPl obmySs noitidnoCm uminiMl acipyTm umixaMs tinU egatloVffO-dnatSesreveRV MWR 21V egatloVnwodkaerBesreveRV RB It Am1=3 .31V tnerruCegakaeLesreveRI R V MWR C°52=T,V21=1 A μ egatloVgnipmalCV C I PP t,A1= p sμ02/8=7 1V egatloVgnipmalCV C I PP t,A01= p sμ02/8=0 2V egatloVgnipmalCV C I PP t,A02= p sμ02/8=5 2V tnerruCesluPkaePI PP tp sμ02/8=0 2A ecnaticapaCnoitcnuJC j dnasnipO/IneewteB dnuorG VR zHM1=f,V0= 85 1F p snipO/IneewteB VR zHM1=f,V0= 4F p Electrical Characteristics (continued)

4© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 0.01 0.1 0.1 1 10 100 1000 Pulse Duration - tp (µs) Peak Pulse Power - Ppk (kW) 100 110 0 25 50 75 100 125 150 Ambient Temperature - T A (oC) % of Rated Power or IPP Clamping Voltage vs. Peak Pulse Current 100 110 0 5 10 15 20 25 30 Time (µs) Percent of IPP e-t td = I PP /2 Wa v e f o r m Parameters: tr = 8µs td = 20µs Pulse Waveform 0 5 10 15 20 25 30 Peak Pulse Current - I PP (A) Clamping Voltage - VC (V) SRDA05-4 SRDA3.3-4 Waveform Parameters: tr = 8µs td = 20µs SRDA12-4 Variation of Capacitance vs. Reverse Voltage Forward Voltage vs. Forward Current 0 5 10 15 20 25 30 35 40 45 50 Forward Current - I F (A) Forward Voltage - VF (V) Waveform Parameters: tr = 8μs td = 20μs 0.88 0.9 0.92 0.94 0.96 0.98 1.02 1.04 00 . 511 . 522 . 533 . 5 Reverse Voltage - VR (V) Cj (VR) / Cj (VR=0)

5© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Device Connection Options for Protection of Four High-Speed Lines The SRDA TVS is designed to protect four data lines from transient overvoltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode V F) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 4, 6 and 7. The negative reference is connected at pins 5 and 8. These pins should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic induc- tance. The positive reference is connected at pins 2 and 3. The options for connecting the positive reference are as follows: 1. To protect data lines and the power line, connect pins 2 & 3 directly to the positive supply rail (V CC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SRDA can be isolated from the power supply by adding a series resistor between pins 2 and 3 and V CC. A value of 10k Ω is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pins 2 and 3 are not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). Data Line and Power Supply Protection Using Vcc as reference Data Line Protection with Bias and Power Supply Isolation Resistor Data Line Protection Using Internal TVS Diode as Reference ESD Protection With RailClamps RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where dis- crete diodes or diode arrays are configured for rail-to- rail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the V F drop of the diode. For negative events, the bottom diode will be biased Applications Information

7© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Applications Information (continued) the power supply connection. During an ESD event, the current will be directed through the integrated TVS diode to ground. The total clamping voltage seen by the protected IC due to this path will be: V C = V F(RailClamp) + V TVS This is given in the data sheet as the rated clamping voltage of the device. For an SRDA05-4 the typical clamping voltage is <16V at I PP =30A. The diodes internal to the RailClamp are low capacitance, fast switching devices that are rated to handle high tran- sient currents and maintain excellent forward voltage characteristics. Using the RailClamp does not negate the need for good board layout. All other inductive paths must be consid- ered. The connection between the positive supply and the SRDA and from the ground plane to the SRDA must be kept as short as possible. The path between the SRDA and the protected line must also be mini- mized. The protected lines should be routed directly to the SRDA. Placement of the SRDA on the PC board is also critical for effective ESD protection. The device should be placed as close as possible to the input connector. The reason for this is twofold. First, inductance resists change in current flow. If a signifi- cant inductance exists between the connector and the TVS, the ESD current will be directed elsewhere (lower resistance path) in the system. Second, the effects of radiated emissions and transient coupling can cause upset to other areas of the board even if there is no direct path to the connector. By placing the TVS close to the connector it will divert the ESD current immedi- ately and absorb the ESD energy before it can be coupled into nearby traces.

8© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 T1/E1 Interface Protection Universal Serial Bus ESD Protection Typical Applications SRDA05-4 LC01-6 LC01-6 1 4

9© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Applications Information - Spice Model SRDA05-4 & SRDA12-4 Spice Model sretemaraPecipS4-21ADRS&4-50ADRS retemaraPt inU) DRCL(1D) DRCL(2D 4-50ADRS )SVT(3D 4-21ADRS )SVT(3D SIp mA1 1-E290.22 1-E651.24 1-E4.14 1-E34.1 VBt loV0 860 420 7.65 1 JVt loV2 6.04 6.06 5.8 7. SRm hO0 81.05 51.06 5.00 4.0 VBIp mA3 -E0.13 -E0.13 -E0.13 -E0.1 OJCd araF2 1-E2.52 1-E2.62 1-E7032 1-E17 M- -8 50.08 50.07 42.06 42.0 GEV e1 1.11 1.11 1.11 1.1 Pin 1 Pin 3 Pin 8 0.6 nH

10© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Land Pattern - SO-8 Outline Drawing - SO-8 bxN 2X N/2 TIPS SEATING aaa C E/22X N A D bbb C A-B D ccc C e/2 SEE DETAIL A SIDE VIEW A B C De DETAIL A c L (L1) 01 0.25 GAGE PLANE h h H PLANE 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. -B- CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS AND TO BE DETERMINED AT DATUM PLANE NOTES: 2. -A- -H- REFERENCE JEDEC STD MS-012, VARIATION AA.4. .050 BSC .236 BSC .010 .150 .189 .154 .193 .012 - 0.25

1.27 BSC

6.00 BSC

3.90 4.90 .157 .197 3.80 4.80 .020 0.31 4.00 5.00 0.51 (.041) .004 .008 .028 .016 .007 .049 .004 .053 8° 0° 0.20 0.10 - 8° 0.40 0.17 1.25 0.10 .041 .010 .069 .065 .010 1.35 (1.04) 0.72 1.04 0.25 - 1.75 1.65 0.25 N bbb aaa ccc A b D E L h e c DIM MIN MILLIMETERS NOM DIMENSIONS INCHES MIN MAX MAX NOM E (.205) (5.20) ZG Y P (C) 3.00.118 1.27.050 0.60.024 2.20.087 7.40.291 X INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: REFERENCE IPC-SM-782A, RLP NO. 300A.2.

11© 2007 Semtech Corp. www.semtech.com PROTECTION PRODUCTSPROTECTION PRODUCTS SRDA05-4 and SRDA12-4 Contact Information Semtech Corporation Protection Products Division

200 Flynn Road, Camarillo, CA 93012

Phone: (805)498-2111 FAX (805)498-3804

Ordering Information

Note: Lead-free devices are RoHS/WEEE Compliant SC YYWW SRDA05-4 PHIL Marking Diagram Note: YYWW = Date Code Tape and Reel Specification Device Orientation in Tape epaT htdiW )xaM(,BD 1 DE F K )XAM( P0 P2 P) XAM(TW mm21m m2.8 mm1.0+5.1 mm0.0- mm5.10 1.±057.1 mm 50.0±5.5 mm mm5.4 1.0±0.4 mm 1.0±0.4 mm 50.0±0.2 mm mm4.0 mm0.21 3.0± 0A0 B0 K Pin 1 Location User Direction of feed rebmuNtraPh siniFdaeL repytQ leeR eziSleeR BT.4-50ADRSb PnS0 05h cnI7 TBT.4-50ADRSn SettaM0 05h cnI7 BT.4-21ADRSb PnS0 05h cnI7 TBT.4-21ADRSn SettaM0 05h cnI7 SC YYWW SRDA12-4 PHIL