SRC4192

SRC4192 BURR-BROWN | Alldatasheet

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SRC4192 (1) SRC4193 (1) 192kHz Stereo Asynchronous Sample Rate Converters

DESCRIPTION

The SRC4192 and SRC4193 are asynchronous sample rate converters designed for professional and broadcast audio applications. The SRC4192 and SRC4193 combine a wide input-to-output sampling ratio with outstanding dynamic range and ultra low distortion. Input and output serial ports support standard audio formats, as well as a Time Division Multi- plexed (TDM) mode. Flexible audio interfaces allow the SRC4192 and SRC4193 to connect to a wide range of audio data converters, digital audio receivers and transmitters, and digital signal processors. The SRC4192 is a standalone pin programmed device, with control pins for mode, data format, mute, bypass, and low group delay functions. The SRC4193 is a software-controlled device featuring a serial peripheral interface (SPI) port, which is utilized to program all functions via internal control registers. The SRC4192 and SRC4193 may be operated from a single +3.3V power supply. A separate digital I/O supply (V IO) operates over the +1.65V to +3.6V supply range, allowing greater flexibility when interfacing to current and future gen- eration signal processors and logic devices. Both the SRC4192 and SRC4193 are available in a 28-lead SSOP package.

FEATURES

G AUTOMATIC SENSING OF THE INPUT-TO- OUTPUT SAMPLING RATIO G WIDE INPUT-TO-OUTPUT SAMPLING RANGE: 16:1 to 1:16 G SUPPORTS INPUT & OUTPUT SAMPLING RATES UP TO 212kHz G DYNAMIC RANGE: 144dB (-60dbFS input, BW = 20Hz to fS /2, A-Weighted) G THD+N: -140dB (0dbFS input, BW = 20Hz to fS /2) G ATTENUATES SAMPLING AND REFERENCE CLOCK JITTER G HIGH PERFORMANCE, LINEAR PHASE DIGITAL FILTERING WITH BETTER THAN 140dB OF STOP BAND ATTENUATION G FLEXIBLE AUDIO SERIAL PORTS: Master or Slave Mode Operation Supports I 2S, Left Justified, Right Justified, and TDM Data Formats Supports 16, 18, 20, or 24-Bit Audio Data TDM Mode allows daisy chaining of up to eight devices G SUPPORTS 24-, 20-, 18-, or 16-BIT INPUT AND OUTPUT DATA All output data is dithered from the internal 28-Bit data path G LOW GROUP DELAY OPTION FOR INTERPO- LATION FILTER G DIRECT DOWNSAMPLING OPTION FOR DECIMATION FILTER (SRC4193 ONLY) G SPI PORT PROVIDES ACCESS TO INTERNAL CONTROL REGISTERS (SRC4193 ONLY) G SOFT MUTE FUNCTION G BYPASS MODE G PROGRAMMABLE DIGITAL OUTPUT ATTENUATION (SRC4193 ONLY) 256 steps: 0dB to –127.5dB, 0.5dB/step

APPLICATIONS

G DIGITAL AUDIO WORKSTATIONS G AUDIO DISTRIBUTION SYSTEMS G BROADCAST STUDIO EQUIPMENT G HIGH-END A/V RECEIVERS G GENERAL DIGITAL AUDIO PROCESSING www.ti.com PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SBFS022A – JULY 2003 All trademarks are the property of their respective owners. G POWER DOWN MODE G OPERATES FROM A SINGLE +3.3 VOLT POWER SUPPLY G SMALL 28-LEAD SSOP PACKAGE G PIN COMPATIBLE WITH THE AD1896 (SRC4192 ONLY) (2) (1) Patents Pending. (2) Refer to the Applications Information section of this data sheet for details. SRC4192 SRC4193

SRC4192, SRC4193 SBFS022A www.ti.com NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may de- grade device reliability. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those specified is not implied.PIN CONFIGURATION (SRC4192) SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR (1) RANGE MARKING NUMBER MEDIA, QUANTITY SRC4192 SSOP-28 DB –45 °C to +85°C SRC4192I SRC4192IDB Rails, 50 " """ " SRC4192IDBR Tape and Reel, 2000 SRC4193 SSOP-28 DB –45 °C to +85°C SRC4193I SRC4193IDB Rails, 50 " """ " SRC4193IDBR Tape and Reel, 2000 NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com. PACKAGE/ORDERING INFORMATION ABSOLUTE MAXIMUM RATINGS (1) Top View LGRP RCKI NC SDIN BCKI LRCKI VIO DGND BYPAS IFMT0 IFMT1 IFMT2 RST MUTE MODE2 MODE1 MODE0 BCKO LRCKO SDOUT VDD DGND TDMI OFMT0 OFMT1 OWL0 OWL1 RDY SRC4192 PIN# NAME DESCRIPTION

1 LGRP Low Group Delay Control Input (Active High)

2 RCKI Reference Clock Input

3 N.C. No Connection

4 SDIN Audio Serial Data Input

5 BCKI Input Port Bit Clock I/O

6 LRCKI Input Port Left/Right Word Clock I/O

IO Digital I/O Supply, +1.65V to VDD

8 DGND Digital Ground

9 BYPAS ASRC Bypass Control Input (Active High)

10 IFMT0 Input Port Data Format Control Input

11 IFMT1 Input Port Data Format Control Input

12 IFMT2 Input Port Data Format Control Input

13 RST Reset Input (Active Low)

14 MUTE Output Mute Control Input (Active High)

15 RDY ASRC Ready Status Output (Active Low)

16 OWL1 Output Port Data Word Length Control Input

17 OWL0 Output Port Data Word Length Control Input

18 OFMT1 Output Port Data Format Control Input

19 OFMT0 Output Port Data Format Control Input

20 TDMI TDM Data Input (Connect to DGND when not in use)

21 DGND Digital Ground

DD Digital Core Supply, +3.3V

23 SDOUT Audio Serial Data Output

24 LRCKO Output Port Left/Right Word Clock I/O

25 BCKO Output Port Bit Clock I/O

26 MODE0 Serial Port Mode Control Input

27 MODE1 Serial Port Mode Control Input

28 MODE2 Serial Port Mode Control Input

PIN DESCRIPTIONS (SRC4192) ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

SRC4192, SRC4193 SBFS022A www.ti.com PIN# NAME DESCRIPTION

1 RCKI Reference Clock Input

2 N.C. No Connection 3 N.C. No Connection IO Digital I/O Supply, +1.65V to VDD 10 N.C. No Connection 11 N.C. No Connection 12 N.C. No Connection

16 RATIO Input-to-Output Ratio Flag Output

Low output denotes Output rate lower than Input rate. High output denotes Output rate higher than Input rate. 17 N.C. No Connection 18 N.C. No Connection 19 N.C. No Connection DD Digital Core Supply, +3.3V

26 CS SPI Port Chip Select Input (Active Low)

27 CCLK SPI Port Data Clock Input

28 CDATA SPI Port Serial Data Input

PIN CONFIGURATION (SRC4193) Top View RCKI NC NC SDIN BCKI LRCKI VIO DGND BYPAS NC NC NC RST MUTE CDATA CCLK CS BCKO LRCKO SDOUT V DD DGND TDMI NC NC NC RATIO RDY SRC4193 PIN DESCRIPTIONS (SRC4193)

SRC4192, SRC4193 SBFS022A www.ti.com SRC4192, SRC4193 PARAMETER CONDITION MIN TYP MAX UNITS DYNAMIC PERFORMANCE (1) Resolution 24 Bits Input Sampling Frequency f SIN 4 212 kHz Output Sampling Frequency f SOUT 4 212 kHz Input: Output Sampling Ratio Upsampling 1:16 Downsampling 16:1 Dynamic Range BW = 20Hz to f SOUT /2, –60dBFS Input fIN = 1kHz, Unweighted (add 3dB to spec for A-weighted result) 44.1kHz; 48kHz 140 dB 48kHz; 44.1kHz 140 dB 48kHz; 96kHz 140 dB 44.1kHz; 192kHz 138 dB 96kHz; 48kHz 141 dB 192kHz; 12kHz 141 dB 192kHz; 32kHz 141 dB 192kHz; 48kHz 141 dB 32kHz; 48kHz 140 dB 12kHz; 192kHz 138 dB Total Harmonic Distortion + Noise BW = 20Hz to f SOUT /2, 0dBFS Input fIN = 1kHz, Unweighted 44.1kHz; 48kHz –140 dB 48kHz; 44.1kHz –140 dB 48kHz; 96kHz –140 dB 44.1kHz; 192kHz –137 dB 96kHz; 48kHz –140 dB 192kHz; 12kHz –140 dB 192kHz; 32kHz –141 dB 192kHz; 48kHz –141 dB 32kHz; 48kHz –140 dB 12kHz; 192kHz –137 dB Interchannel Gain Mismatch 0d B Interchannel Phase Deviation 0 Degrees Digital Attenuation SRC4193 Only Minimum 0d B Maximum –127.5 dB Step Size 0.5 dB Mute Attenuation 24-Bit Word Length, A-weighted –144 dB DIGITAL INTERPOLATION FILTER CHARACTERISTICS Passband 0.4535 x f SIN Hz Passband Ripple ±0.007 dB Transition Band 0.4535 x fSIN 0.5465 x fSIN Hz Stop Band 0.5465 x fSIN Hz Stop Band Attenuation –144 dB Normal Group Delay (LGRP = 0) Decimation Filter On (DFLT = 0) 102.53125/f SIN Seconds Normal Group Delay (LGRP = 0) Decimation Filter Off (DFLT = 1) 102/f SIN Seconds Low Group Delay (LGRP = 1) Decimation Filter On (DFLT = 0) 70.53125/f SIN Seconds Low Group Delay (LGRP = 1) Decimation Filter Off (DFLT = 1) 70/f SIN Seconds DIGITAL DECIMATION FILTER CHARACTERISTICS Passband 0.4535 x f SOUT Hz Passband Ripple ±0.008 dB Transition Band 0.4535 x fSOUT 0.5465 x fSOUT Hz Stop Band 0.5465 x fSOUT Hz Stop Band Attenuation –143 dB Group Delay Decimation Filter DFLT = 0 for SRC4193 36.46875/f SOUT Seconds Direct Down-Sampling SRC4193 Only, DFLT = 1 0 Seconds DIGITAL I/O CHARACTERISTICS High-Level Input Voltage V IH 0.7 x VIO VIO V Low Level Input Voltage V IL 0 0.3 x V IO V High-Level Input Current I IH 0.5 10 µA Low-Level Input Current I IL 0.5 10 µA High-Level Output Voltage V OH IO = –4mA 0.8 x V IO VIO V Low-Level Output Voltage V OL IO = +4mA 0 0.2 x V IO V Input Capacitance C IN 3p F

ELECTRICAL CHARACTERISTICS

All parameters specified with TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted.

SRC4192, SRC4193 SBFS022A www.ti.com SWITCHING CHARACTERISTICS Reference Clock Timing RCKI Frequency(2), (3) 128 x fSMIN 50 MHz RCKI Period t RCKIP 20 1/(128 x f SMIN )n s RCKI Pulsewidth High t RCKIH 0.4 x tRCKIP ns RCKI Pulsewidth Low t RCKIL 0.4 x tRCKIP ns Reset Timing RST Pulse Width Low t RSTL 500 ns Delay Following RST Rising Edge SRC4193 Only 500 µs Input Serial Port Timing LRCKI to BCKI Setup Time t LRIS 10 ns BCKI Pulsewidth High t SIH 10 ns BCKI Pulsewidth Low t SIL 10 ns SDIN Data Setup Time t LDIS 10 ns SDIN Data Hold Time t LDIH 10 ns Output Serial Port Timing SDOUT Data Delay Time t DOPD 10 ns SDOUT Data Hold Time t DOH 2n s BCKO Pulsewidth High t SOH 10 ns BCKO Pulsewidth Low t SOL 5n s TDM Mode Timing LRCKO Setup Time t LROS 10 ns LRCKO Hold Time t LROH 10 ns TDMI Data Setup Time t TDMS 10 ns TDMI Data Hold Time t TDMH 10 ns SPI Timing CCLK Frequency 25 MHz CDATA Setup Time t CDS 12 ns CDATA Hold Time t CDH 8n s CS Falling to CCLK Rising t CSCR 15 ns CCLK Falling to CS Rising t CFCS 12 ns POWER SUPPLIES Operating Voltage VDD 3.0 +3.3 3.6 V VIO 1.65 +3.3 3.6 V Supply Current V DD = +3.3V, VIO = +3.3V IDD , Power Down RST = 0, No Clocks 100 µA IDD , Power Down (SRC4193 only) PDN Bit = 0, No Clocks 5 mA IDD , Dynamic f SIN = fsOUT = 192kHz 66 mA IIO, Power Down RST = 0, No Clocks 100 µA IIO, Power Down (SRC4193 only) PDN Bit = 0, No Clocks 21 µA IIO, Dynamic f SIN = fSOUT = 192kHz 2 mA Total Power Dissipation V DD = +3.3V, VIO = +3.3V PD , Power Down RST = 0, No Clocks 660 µW PD , Power Down (SRC4193) PDN Bit = 0, No Clocks 16.6 mW PD , Dynamic f SIN = fSOUT = 192kHz 225 mW ELECTRICAL CHARACTERISTICS (Cont.) All parameters specified with TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. SRC4192, SRC4193 PARAMETER CONDITION MIN TYP MAX UNITS NOTES: (1) Dynamic performance measured with an Audio Precision System Two Cascade or Cascade Plus. (2) fSMIN = min (fSIN, fSOUT ). (3) fSMAX = max (fSIN, fSOUT ).

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (12kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (12kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (32kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (32kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (44.1kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (44.1kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (44.1kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (44.1kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (44.1kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (44.1kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (48kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (48kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (48kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (48kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (48kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (48kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (96kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (96kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (96kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (96kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (96kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (96kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (192kHz:12kHz) 01 k 2 k 3 k 4 k 6 k 5k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (192kHz:12kHz) 01 k 2 k 3 k 4 k 6 k 5k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (192kHz:32kHz) 0 2.5 5k 7.5k 10k 16k 15k12.5k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (192kHz:32kHz) 0 2.5k 5k 7.5k 10k 16k 15k12.5k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (192kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (192kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (192kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (192kHz:48kHz) 0 10k 20k 24k 40k30k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 1kHz INPUT TONE at 0dBFS (192kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 –180 dBFS FFT with 1kHz INPUT TONE at –60dBFS (192kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 20kHz INPUT TONE at 0dBFS (44.1kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 20kHz INPUT TONE at 0dBFS (48kHz:44.1kHz) 0 5k 10k 22k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 20kHz INPUT TONE at 0dBFS (48kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 20kHz INPUT TONE at 0dBFS (48kHz:96kHz) 0 10k 20k 48k 40k30k Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 20kHz INPUT TONE at 0dBFS (96kHz:48kHz) 0 5k 10k 24k 20k15k Frequency (Hz) –20 –40 –60 –80 –100 –120 –140 –160 –180 dBFS FFT with 80kHz INPUT TONE at 0dBFS (192kHz:192kHz) 0 20k 40k 96k 80k60k Frequency (Hz) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (44.1kHz:48kHz) Input Amplitude (dBFS) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (48kHz:44.1kHz) Input Amplitude (dBFS) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (48kHz:96kHz) Input Amplitude (dBFS) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (96kHz:48kHz) Input Amplitude (dBFS)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (44.1kHz:192kHz) Input Amplitude (dBFS) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT AMPLITUDE fIN = 1kHz (192kHz:48kHz) Input Amplitude (dBFS) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT FREQUENCY, 0dBFS INPUT (44.1kHz:48kHz) 0 5k 20k 15k10k Input Frequency (Hz) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT FREQUENCY, 0dBFS INPUT (48kHz:44.1kHz) 0 5k 20k 15k10k Input Frequency (Hz) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT FREQUENCY, 0dBFS INPUT (48kHz:96kHz) 0 5k 20k 15k10k Input Frequency (Hz) –120 –125 –130 –135 –140 –145 –150 –155 –160 Total Harmonic Distortion+Noise (dB) THD+N vs INPUT FREQUENCY, 0dBFS INPUT (96kHz:48kHz) 0 5k 20k 15k10k Input Frequency (Hz)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (44.1kHz:48kHz) Input Amplitude (dBFS) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (48kHz:44.1kHz) Input Amplitude (dBFS) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (48kHz:48kHz) Input Amplitude (dBFS) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (48kHz:96kHz) Input Amplitude (dBFS) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (96kHz:48kHz) Input Amplitude (dBFS) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (44.1kHz:192kHz) Input Amplitude (dBFS)

SRC4192, SRC4193 SBFS022A www.ti.com TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VDD = +3.3V, and VIO = +3.3V, unless otherwise noted. –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 dBFS FREQUENCY RESPONE with 0dBFS INPUT 0 10k 20k 30k 40k 60k 50k Frequency (Hz) 192kHz:32kHz 192kHz:48kHz 192kHz:96kHz –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 Output Amplitude (dBFS) LINEARITY with fIN = 200Hz (192kHz:44.1kHz) Input Amplitude (dBFS) –0.004 –0.009 –0.014 –0.019 –0.024 –0.029 –0.034 –0.039 –0.044 –0.049 dBFS PASS BAND RIPPLE (48k:48k) 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 22k 20k Frequency (Hz) –0.01 –0.02 –0.03 –0.04 –0.05 (dBFS) PASS BAND RIPPLE (192k:48k) 0 5k 10k 15k 22k 20k Input Amplitude (dBFS)

S, the output sampling frequency. Table 3 illustrates data format selection for the output port. used to select the data format and word length. channel is said to track the Left channel attenuation setting. muted when the rate estimator is in transition. output for an LED or host device. used to access the on-chip control registers of the SRC4193. protocol for writing control registers via the serial control port.

01 I 2S

TABLE 2. Output Port Data Format Selection. control bit should be set to 0.

six least significant bits contain the control register address. Set CS = 1 here to write one register or buffer location.Keep CS = 0 to enable auto-increment mode. Byte 1: All 8 bits are Don’t Care. Set to 0 or 1. Bytes 2 through N: Register Data. All Bytes are written MSB first. FIGURE 8. SPI Port Protocol. FIGURE 9. SPI Port Timing. always enabled for the SPI port.

1. Register 0 is reserved for factory use and defaults to all

and should not be used in customer applications.

1 PDN TRACK 0 MUTE BYPAS MODE2 MODE1 MODE0

3 OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0

4 AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0

5 AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0

TABLE 4. The SRC4193 Control Register Map.

SRC4192, SRC4193 SBFS022A www.ti.com Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) PDN TRACK 0 MUTE BYPAS MODE2 MODE1 MODE0 CONTROL REGISTER DEFINITIONS (SRC4193 ONLY) This section contains detailed descriptions for each control register. Reset defaults are also defined for each register bit. Register 1: System Control Register MODE[2:0] Audio Serial Port Mode MODE2 MODE1 MODE0 Audio Serial Port Mode 0 0 0 Both Serial Ports are in Slave Mode (Default) 0 0 1 Output Serial Port is Master with RCKI = 128fs 0 1 0 Output Serial Port is Master with RCKI = 512fs 0 1 1 Output Serial Port is Master with RCKI = 256fs 1 0 0 Both Serial Ports are in Slave Mode 1 0 1 Input Serial Port is Master with RCKI = 128fs 1 1 0 Input Serial Port is Master with RCKI = 512fs 1 1 1 Input Serial Port is Master with RCKI = 256fs BYPAS Bypass Mode This bit is logically OR’d with the BYPAS input (pin 9) BYPAS Function 0 Bypass Mode Disabled with normal ASRC operation. (Default)

1 Bypass Mode Enabled with data routed directly from the input port to the output port,

bypassing the ARSC function. MUTE Output Soft Mute This bit is logically OR’d with the MUTE input (pin 14) MUTE Output Mute Function

0 Soft Mute Disabled (Default)

1 Soft Mute Enabled with data attenuated to all 0’s

TRACK Digital Attenuation Tracking TRACK Attenuation Tracking 0 Tracking Off: Attenuation for the Left and Right channels is controlled independently. (Default) 1 Tracking On: Left channel attenuation setting is used for both channels. PDN Power Down Setting this bit to 0 will set the SRC4193 to the power-down state. All other register settings are preserved and the SPI port remains active. (Default) Setting this bit to 1 will power up the SRC4193 using the current register settings.

SRC4192, SRC4193 SBFS022A www.ti.com Register 2: Filter Control Register LGRP Low Group Delay This bit is used to select the number of input audio samples to be stored in the data buffer before the ASRC starts processing the audio data. LGRP Group Delay 0 Normal Delay, 64 samples. (Default) 1 Low Delay, 32 samples. DFLT Decimation Filtering / Direct Down-Sampling The DFLT bit is used to enable or disable the direct down-sampling function. DFLT Decimation Filter Operation

0 Decimation Filter Enabled (Default)

(Must be used when fsOUT is less than fsIN) 1 Direct Down-Sampling enabled without filtering. (May be enabled when fsOUT is equal to or greater than fsIN) Register 3: Audio Data Format Register Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) 0 0 0 0 0 0 DFLT LGRP IFMT[2:0] Input Port Data Format IFMT2 IFMT1 IFMT0 Input Format 0 0 0 24-Bit Left Justified (Default) 0 0 1 24-Bit I 0 1 0 - Not Used - 0 1 1 - Not Used - 1 0 0 Right Justified, 16-Bit Data 1 0 1 Right Justified, 18-Bit Data 1 1 0 Right Justified, 20-Bit Data 1 1 1 Right Justified, 24-Bit Data OFMT[1:0] Output Port Data Format OFMT1 OFMT0 Output Format 0 0 Left Justified (Default) 01 I 1 0 TDM 1 1 Right Justified OWL[1:0] Output Port Data Word Length OWL1 OWL0 Output Word Length 0 0 24-Bits (Default) 0 1 20-Bits 1 0 18-Bits 1 1 16-Bits Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0

Register defaults to 00HEX , or 0dB (unity gain). Register defaults to 00HEX , or 0dB (unity gain). FIGURE 10. Typical Connection Diagram for the SRC4192.

SRC4192, SRC4193 SBFS022A www.ti.com PIN COMPATIBILITY WITH THE ANALOG DEVICES AD1896 (SRC4192 ONLY) The SRC4192 is pin-and function-compatible with the AD1896 when observing the guidelines indicated in the following paragraphs. Power Supplies. To ensure compatibility, the VDD_IO and VDD_CORE supplies of the AD1896 must be set to +3.3V, while the V IO and VDD supplies of the SRC4192 must be set to +3.3V. Crystal Oscillator. The SRC4192 does not have an on-chip crystal oscillator. An external reference clock is required at the RCKI input (pin 2). Reference Clock Frequency. The reference clock input frequency for the SRC4192 must be no higher than 30 MHz, in order to match the master clock frequency specification of the AD1896. In addition, the SRC4192 does not support the 768f S reference clock rate. Master Mode Maximum Sampling Frequency. When the input or output ports are set to Master mode, the maximum sampling frequency must be limited to 96kHz in order to support the AD1896 specification. This is despite the fact that the SRC4192 supports a maximum sampling frequency of 212kHz in Master mode. The user should consider building an option into his or her design to support the higher sampling frequency of the SRC4192. Matched Phase Mode. Due to the internal architecture of the SRC4192, it does not require or support the matched phase mode of the AD1896. Given multiple SRC4192 de- vices, if all reference clock (RCKI) inputs are driven from the same clock source, the devices will be phase matched.

SRC4192, SRC4193 SBFS022A www.ti.com DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–8° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 PACKAGE DRAWING

ORDERABLE DEVICE STATUS(1) PACKAGE TYPE PACKAGE DRAWING PINS PACKAGE QTY SRC4192IDB ACTIVE SSOP DB 28 50 SRC4192IDBR ACTIVE SSOP DB 28 2000 SRC4193IDB ACTIVE SSOP DB 28 50 SRC4193IDBR ACTIVE SSOP DB 28 2000 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. PACKAGE OPTION ADDENDUM www.ti.com 3-Oct-2003

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