SRC4184

SRC4184 BURR-BROWN | Alldatasheet

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Technical content

FEATURES

/C0068AUTOMATIC SENSING OF INPUT-TO-OUTPUT SAMPLING RATIO /C0068WIDE INPUT-TO-OUTPUT SAMPLING RANGE: 16:1 to 1:16 /C0068SUPPORTS INPUT AND OUTPUT SAMPLING RATES UP TO 212kHz /C0068DYNAMIC RANGE: 128dB (−60dbFS Input, BW = 20Hz to fs/2, A-Weighted) /C0068THD+N: −125dB (0dbFS Input, BW = 20Hz to fs/2) /C0068HIGH-PERFORMANCE, LINEAR PHASE DIGITAL FILTERING /C0068FLEXIBLE AUDIO SERIAL PORTS: − Master or Slave Mode Operation − Supports I 2S, Left-Justified, Right-Justified, and TDM Data Formats − TDM Mode Allows Daisy-Chaining of Up to Four Devices /C0068SUPPORTS 24-, 20-, 18-, or 16-BIT INPUT AND OUTPUT DATA: − All Output Data is Dithered from the Internal 28-Bit Data Path /C0068SERIAL PERIPHERAL INTERFACE (SPI)  PORT SUPPORTS REGISTER READ AND WRITE OPERATIONS IN SOFTWARE MODE /C0068BYPASS MODE: − Routes Input Port Data Directly to the Output Port /C0068FOUR GROUP DELAY OPTIONS FOR THE INTERPOLATION FILTER /C0068DIRECT DOWNSAMPLING OPTION FOR THE DECIMATION FILTER /C0068DIGITAL DE-EMPHASIS FILTER: − User-Selectable for 32kHz, 44.1kHz, and 48kHz Sampling Rates /C0068SOFT MUTE FUNCTION /C0068PROGRAMMABLE DIGITAL OUTPUT ATTENUATION (SOFTWARE MODE ONLY): − 256 Steps: 0dB to −127.5dB with 0.5dB Steps /C0068INPUT-TO-OUTPUT SAMPLING RATIO READBACK (SOFTWARE MODE ONLY) /C0068POWER-DOWN MODES /C0068SUPPORTS OPERATION FROM A SINGLE +1.8V OR +3.3V POWER SUPPLY /C0068AVAILABLE IN A TQFP-64 PACKAGE

APPLICATIONS

/C0068DIGITAL MIXING CONSOLES /C0068DIGITAL AUDIO WORKSTATIONS /C0068AUDIO DISTRIBUTION SYSTEMS /C0068BROADCAST STUDIO EQUIPMENT /C0068GENERAL DIGITAL AUDIO PROCESSING

DESCRIPTION

The SRC4184 is a four-channel, asynchronous sample rate converter (ASRC), designed for professional and broadcast audio applications. The SRC4184 combines a wide input-to-output sampling ratio with outstanding dynamic range and ultra low distortion. The input and output serial ports support the most common audio data formats, as well as a time division multiplexed (TDM) format. This allows the SRC4184 to interface to a wide range of audio data converters, digital audio receivers and transmitters, and digital signal processors. The SRC4184 may be operated in Hardware mode as a standalone pin-programmed device, with dedicated control pins for serial port mode, audio data format, soft mute, bypass, and digital filtering functions. Alternatively, the SRC4184 may be operated in Software mode, where a four-wire serial peripheral interface (SPI) port provides access to internal control and status registers. The SRC4184 operates from either a +1.8V core supply or a +3.3V core supply. When operating from +3.3V, the +1.8V required by the core logic is derived from an internal voltage regulator. The SRC4184 also requires a digital I/O supply, which operates from +1.65V to +3.6V. The SRC4184 is available in a TQFP-64 package. Patents pending. SRC4184 SBFS026A − JUNE 2004 − REVISED JULY 2004 4-Channel, Asynchronous Sample Rate Converter /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 www.ti.com Copyright  2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) Core Supply Voltage (1)Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.

ELECTRICAL CHARACTERISTICS

All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. SRC4184 PARAMETER CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Resolution 24 Bits Input Sampling Frequency, fsIN 4 212 kHz Output Sampling Frequency, fsOUT 4 212 kHz INPUT/OUTPUT SAMPLING RATIO Upsampling 1:16 Downsampling 16:1 DYNAMIC RANGE BW = 20Hz to fsOUT /2, −60dBFS Input fIN = 1kHz, A-Weighted 44.1kHz:48kHz 128 dB 48kHz:44.1kHz 128 dB 48kHz:96kHz 128 dB 44.1kHz:192kHz 128 dB 96kHz:48kHz 128 dB 192kHz:12kHz 128 dB 192kHz:32kHz 128 dB 192kHz:48kHz 128 dB 32kHz:48kHz 128 dB 12kHz:192kHz 128 dB TOTAL HARMONIC DISTORTION + NOISE BW = 20Hz to fsOUT /2, −60dBFS Input fIN = 1kHz, Unweighted 44.1kHz:48kHz −125 dB 48kHz:44.1kHz −125 dB 48kHz:96kHz −125 dB 44.1kHz:192kHz −125 dB 96kHz:48kHz −125 dB 192kHz:12kHz −125 dB 192kHz:32kHz −125 dB 192kHz:48kHz −125 dB 32kHz:48kHz −125 dB 12kHz:192kHz −125 dB Interchannel Gain Mismatch 0 dB Interchannel Phase Deviation 0 degrees (1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system. (2)fsMIN = min (fsIN, fsOUT ). (3)fsMAX = max (fsIN, fsOUT ). (4)Power-supply current for power-down modes is measured without loading. (5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. SRC4184 PARAMETER UNITSMAXTYPMINCONDITIONS DIGITAL ATTENUATION Software Mode Only Minimum 0 dB Maximum −127.5 dB Step Size 0.5 dB Mute Attenuation 24-Bit Word Length −128 dB DIGITAL INTERPOLATION FILTER CHARACTERISTICS Passband 0.4535 × fsIN Hz Passband Ripple ±0.007 dB Transition Band 0.4535 × fsIN 0.5465 × fsIN Hz Stop Band 0.5465 × fsIN Hz Stop Band Attenuation −128 dB Group Delay (64 sample buffer) Decimation Filter Enabled 102.53125/fsIN seconds Group Delay (64 sample buffer) Direct Downsampling Enabled 102/fsIN seconds Group Delay (32 sample buffer) Decimation Filter Enabled 70.53125/fsIN seconds Group Delay (32 sample buffer) Direct Downsampling Enabled 70/fsIN seconds Group Delay (16 sample buffer) Decimation Filter Enabled 54.53125/fsIN seconds Group Delay (16 sample buffer) Direct Downsampling Enabled 54/fsIN seconds Group Delay (8 sample buffer) Decimation Filter Enabled 46.53125/fsIN seconds Group Delay (8 sample buffer) Direct Downsampling Enabled 46/fsIN seconds DIGITAL DECIMATION FILTER CHARACTERISTICS Passband 0.4535 × fsOUT Hz Passband Ripple ±0.008 dB Transition Band 0.4535 × fsOUT 0.5465 × fsOUT Hz Stop Band 0.5465 × fsOUT Hz Stop Band Attenuation −128 dB Group Delay Decimation Filter Decimation Filter Enabled 36.46875/fsOUT seconds Direct Downsampling Direct Downsampling Enabled 0 seconds DIGITAL DE-EMPHASIS De-Emphasis Error for fs = 32kHz, 44.1kHz, or 48kHz De-Emphasis Enabled 0.001 dB DIGITAL I/O CHARACTERISTICS High-Level Input Voltage VIH 0.7 × VIO VIO V Low-Level Input Voltage VIL 0 0.3 × VIO V High-Level Input Current IIH 0.5 10 µA Low-Level Input Current IIL 0.5 10 µA High-Level Output Voltage VOH IO = −4mA 0.8 × VIO VIO V Low-Level Output Voltage VOL IO = +4mA 0 0.2 × VIO V Input Capacitance C IN 3 pF SWITCHING CHARACTERISTICS Reference Clock Timing RCKI Frequency(2)(3) 128 × fsMIN 50 MHz RCKI Period tRCKIP 20 1/(128 × fsMIN) ns RCKI Pulsewidth High tRCKIH 0.4 × tRCKIP ns RCKI Pulsewidth Low tRCKIL 0.4 × tRCKIP ns Reset Timing RST Pulsewidth Low tRSTL 500 ns Delay Following RST Rising Edge Software Mode Only 500 µs Input Serial Port Timing LRCKI to BCKI Setup Time tLRIS 10 ns BCKI Pulsewidth High tSIH 10 ns BCKI Pulsewidth Low tSIL 10 ns SDIN Data Setup Time tLDIS 10 ns SDIN Data Hold Time tLDIH 10 ns (1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system. (2)fsMIN = min (fsIN, fsOUT ). (3)fsMAX = max (fsIN, fsOUT ). (4)Power-supply current for power-down modes is measured without loading. (5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. SRC4184 PARAMETER UNITSMAXTYPMINCONDITIONS SWITCHING CHARACTERISTICS (continued) Output Serial Port Timing SDOUT Data Delay Time tDOPD 10 ns SDOUT Data Hold Time tDOH 2 ns BCKO Pulsewidth High tSOH 10 ns BCKO Pulsewidth Low tSOL 5 ns TDM Mode Timing LRCKO Setup Time tLROS 10 ns LRCKO Hold Time tLROH 10 ns TDMI Data Setup Time tTDMS 10 ns TDMI Data Hold Time tTDMH 10 ns SPI Timing CCLK Frequency 25 MHz CDATA Setup Time tCDS 12 ns CDATA Hold Time tCDH 8 ns CS Falling to CCLK Rising tCSCR 15 ns CCLK Falling to CS Rising tCFCS 12 ns CCLK Falling to CDOUT Data Valid tCFDO 5 ns CS Rising to CDOUT High Impedance tCSZ 5 ns POWER SUPPLIES (4, 5) Operating Voltage VDD18 REGEN = 0 +1.65 +1.8 +2.0 V VDD33 REGEN = 1 +3.0 +3.3 +3.6 V Supply Current VDD18 = +1.8V, VIO = +1.8V, REGEN = 0 IDD, Hard Power-Down RST = 0, No Clocks 100 µA IDD, Soft Power-Down PDN Bit = 0, No Clocks 100 µA IDD, Dynamic fsIN = 96kHz, fsOUT = 192kHz 80 mA IIO, Hard Power-Down RST = 0, No Clocks 100 µA IIO, Soft Power-Down PDN Bit = 0, No Clocks 100 µA IIO, Dynamic fsIN = 96kHz, fsOUT = 192kHz 6 mA Total Power Dissipation VDD18 = +1.8V, VIO = +1.8V, REGEN = 0 PD , Hard Power-Down RST = 0, No Clocks 1 mW PD , Soft Power-Down PDN Bit = 0, No Clocks 360 µW PD , Dynamic fsIN = fsOUT = 192kHz 155 mW Supply Current VDD33 = +3.3V, VIO = +3.3V, REGEN = 1 IDD, Hard Power-Down RST = 0, No Clocks 100 µA IDD, Soft Power-Down PDN Bit = 0, No Clocks 6 mA IDD, Dynamic fsIN = 96kHz, fsOUT = 192kHz 90 mA IIO, Hard Power-Down RST = 0, No Clocks 100 µA IIO, Soft Power-Down PDN Bit = 0, No Clocks 100 µA IIO, Dynamic fsIN = 96kHz, fsOUT = 192kHz 6 mA Total Power Dissipation VDD33 = +3.3V, VIO = +3.3V, REGEN = 1 PD , Hard Power-Down RST = 0, No Clocks 1 mW PD , Soft Power-Down PDN Bit = 0, No Clocks 21 mW PD , Dynamic fsIN = fsOUT = 192kHz 320 mW (1)Dynamic performance is measured with an Audio Precision System Two Cascade or Cascade Plus test system. (2)fsMIN = min (fsIN, fsOUT ). (3)fsMAX = max (fsIN, fsOUT ). (4)Power-supply current for power-down modes is measured without loading. (5)Dynamic current is measured with active loading and the excercized output pins equal to ±2mA.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com PIN CONFIGURATION Top View TQFP IFMTB0 IFMTB1 IFMTB2 OFMTB0 OFMTB1 OWLB0 OWLB1 BYPB LGRPB0 LGRPB1 DDNB DEMB0 DEMB1 (CDOUT) MODEB0 (CS) MODEB1 (CCLK) MODEB2 (CDIN) SDOUTA BCKOA LRCKOA TDMIA BCKIA LRCKIA SDINA DGND V IO SDINB LRCKIB BCKIB TDMIB LRCKOB BCKOB SDOUTB RATIOA RDYA MUTEA RCKIA RST H/S DGND VDD33 VDD33 REGEN VDD18 VDD18 RCKIB MUTEB RDYB RATIOB IFMTA0 IFMTA1 IFMTA2 OFMTA0 OFMTA1 OWLA0 OWLA1 BYPA LGRPA0 LGRPA1 DDNA DEMA0 DEMA1 MODEA0 MODEA1 MODEA2 64 63 62 61 60 59 58 57 56 55 54 17 18 19 20 21 22 23 24 25 26 27 29 30 31 32 52 51 50 49 SRC4184

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com PIN DESCRIPTIONS PIN # NAME I/O DESCRIPTION

1 IFMTA0 Input SRC A Audio Input Data Format(1)

2 IFMTA1 Input SRC A Audio Input Data Format(1)

3 IFMTA2 Input SRC A Audio Input Data Format(1)

4 OFMTA0 Input SRC A Audio Output Data Format(1)

5 OFMTA1 Input SRC A Audio Output Data Format(1)

6 OWLA0 Input SRC A Audio Output Data Word Length(1)

7 OWLA1 Input SRC A Audio Output Data Word Length(1)

8 BYPA Input SRC A Bypass Mode (Active High)

9 LGRPA0 Input SRC A Low Group Delay Mode(1)

10 LGRPA1 Input SRC A Low Group Delay Mode(1)

11 DDNA Input SRC A Direct Downsampling Mode (Active High)(1)

12 DEMA0 Input SRC A Digital De-Emphasis Filter Mode(1)

13 DEMA1 Input SRC A Digital De-Emphasis Filter Mode(1)

14 MODEA0 Input SRC A Serial Port Mode(1)

15 MODEA1 Input SRC A Serial Port Mode(1)

16 MODEA2 Input SRC A Serial Port Mode(1)

17 RATIOA Output SRC A Ratio Flag

18 RDYA Output SRC A Ready Flag (Active Low)

19 MUTEA Input SRC A Output Soft Mute

20 RCKIA Input SRC A Reference Clock

21 RST Input Reset and Power-Down (Active Low)

22 H/S Input Control Mode (0 = Software, 1 = Hardware)

23 DGND Ground Digital Ground

24, 25 VDD33 Power Core Supply, +3.3V. Required when REGEN is high. When REGEN is low, VDD33 must be left unconnected.

26 REGEN Input Voltage Regulator Enable (Active High)

27, 28 VDD18 Power Core Supply, +1.8V. Required when REGEN is low. When REGEN is high, VDD18 must be left unconnected.

29 RCKIB Input SRC B Reference Clock

30 MUTEB Input SRC B Output Soft Mute

31 RDYB Output SRC B Ready Flag (Active Low)

32 RATIOB Output SRC B Ratio Flag

33 MODEB2 or CDIN Input SRC B Serial Port Mode(1) or SPI Port Serial Data Input(2)

34 MODEB1 or CCLK Input SRC B Serial Port Mode(1) or SPI Port Data Clock(2)

35 MODEB0 or CS Input SRC B Serial Port Mode(1) or SPI Port Chip Select (Active Low)(2)

36 DEMB1 or CDOUT I/O SRC B Digital De-Emphasis Filter Mode(1) or SPI Port Serial Data Output(2)

37 DEMB0 Input SRC B Digital De-Emphasis Filter Mode(1)

38 DDNB Input SRC B Direct Downsampling Mode (Active High)(1)

39 LGRPB1 Input SRC B Low Group Delay Mode(1)

40 LGRPB0 Input SRC B Low Group Delay Mode(1)

41 BYPB Input SRC B Bypass Mode (Active High)

42 OWLB1 Input SRC B Audio Output Data Word Length(1)

43 OWLB0 Input SRC B Audio Output Data Word Length(1)

44 OFMTB1 Input SRC B Audio Output Data Format(1)

45 OFMTB0 Input SRC B Audio Output Data Format(1)

46 IFMTB2 Input SRC B Audio Input Data Format(1)

47 IFMTB1 Input SRC B Audio Input Data Format(1)

48 IFMTB0 Input SRC B Audio Input Data Format(1)

49 SDOUTB Output SRC B Audio Output Data

50 BCKOB I/O SRC B Audio Output Bit Clock

51 LRCKOB I/O SRC B Audio Output Left/Right or Word Clock

52 TDMIB Input SRC B TDM Input Data (TDM Format Only)

53 BCKIB I/O SRC B Audio Input Bit Clock

54 LRCKIB I/O SRC B Audio Input Left/Right or Word Clock

55 SDINB Input SRC B Audio Input Data

56 VIO Power Digital I/O Supply, +1.65V to +3.6V

57 DGND Ground Digital Ground

58 SDINA Input SRC A Audio Input Data

59 LRCKIA I/O SRC A Audio Input Left/Right or Word Clock

60 BCKIA I/O SRC A Audio Input Bit Clock

61 TDMIA Input SRC A TDM Input Data (TDM Format Only)

62 LRCKOA I/O SRC A Audio Output Left/Right or Word Clock

63 BCKOA I/O SRC A Audio Output Bit Clock

64 SDOUTA Output SRC A Audio Output Data

(1)Disabled in Software control mode. (2)Disabled in Hardware control mode.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:32kHz (asynchronous) fIN = 1kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:44.1kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:48kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:32kHz (asynchronous) fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:44.1kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 32kHz:48kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:32kHz fIN = 1kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:44.1kHz (asynchronous) fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:48kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:32kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:44.1kHz (asynchronous) fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:48kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 44k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:88.2kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:192kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:32kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 44k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:88.2kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:192kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 16k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:32kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:44.1kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:48kHz (asynchronous) fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:96kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:44.1kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:48kHz (asynchronous) fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:96kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:192kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:44.1kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:48kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:192kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:44.1kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:48kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:96kHz (asynchronous) fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:192kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:44.1kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:96kHz (asynchronous) fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:192kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:44.1kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:48kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:96kHz fIN =1 k H z with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:192kHz fIN =1 k H z with 0dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:48kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:96kHz fIN =1 k H z with−60dBFS Amplitude −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:192kHz fIN =1 k H z with−60dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 44.1kHz:48kHz fIN = 20kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:48kHz (asynchronous) fIN = 20kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 24k 10k Frequency (Hz) fsIN:fsOUT = 96kHz:48kHz fIN = 20kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 22k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:44.1kHz fIN = 20kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 48k 10k Frequency (Hz) fsIN:fsOUT = 48kHz:96kHz fIN = 20kHz with 0dBFS Amplitude −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 −160 −170 −180 −190 −200 Amplitude (dBFS) FFT PLOT 20 100 1k 96k 10k Frequency (Hz) fsIN:fsOUT = 192kHz:192kHz (asynchronous) fIN = 80kHz with 0dBFS Amplitude

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 44.1kHz:48kHz fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 48kHz:48kHz (asynchronous) fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 96kHz:48kHz fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 48kHz:44.1kHz fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 48kHz:96kHz fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 96kHz:96kHz (asynchronous) fIN =1 k H z BW = 10Hz to fsOUT /2

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT AMPLITUDE Input Amplitude (dBFS) fsIN:fsOUT = 192kHz:192kHz (asynchronous) fIN =1 k H z BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 20k 10k Input Frequency (Hz) fsIN:fsOUT = 48kHz:44.1kHz Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 20k 10k Input Frequency (Hz) fsIN:fsOUT = 48kHz:96kHz Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 20k 10k Input Frequency (Hz) fsIN:fsOUT = 44.1kHz:48kHz Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 20k 10k Input Frequency (Hz) fsIN:fsOUT = 48kHz:48kHz (asynchronous) Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 20k 10k Input Frequency (Hz) fsIN:fsOUT = 96kHz:48kHz Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 40k 10k Input Frequency (Hz) fsIN:fsOUT = 96kHz:96kHz (asynchronous) Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) LINEARITY Input Amplitude (dBFS) fsIN:fsOUT = 32kHz:32kHz (asynchronous) fIN = 200Hz −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) LINEARITY Input Amplitude (dBFS) fsIN:fsOUT = 96kHz:96kHz (asynchronous) fIN = 200Hz −120 −122 −124 −126 −128 −130 −132 −134 −136 −138 −140 −142 −144 −146 −148 −150 −152 −154 −156 −158 −160 THD+N (dB) THD+N vs INPUT FREQUENCY 20 100 1k 80k 10k Input Frequency (Hz) fsIN:fsOUT = 192kHz:192kHz (asynchronous) Input Amplitude = 0dBFS BW = 10Hz to fsOUT /2 −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) LINEARITY Input Amplitude (dBFS) fsIN:fsOUT = 48kHz:48kHz (asynchronous) fIN = 200Hz −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) LINEARITY Input Amplitude (dBFS) fsIN:fsOUT = 192kHz:192kHz (asynchronous) fIN = 200Hz

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) FREQUENCY RESPONSE 024 3 2 6 8 10 12 14 16 18 20 22 24 26 28 30 Input Frequency (kHz) fsIN:fsOUT = 192kHz:32kHz Input Amplitude = 0dBFS −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) FREQUENCY RESPONSE 06 05 1 01 52 02 53 03 54 04 55 05 5 Input Frequency (kHz) fsIN:fsOUT = 192kHz:96kHz Input Amplitude = 0dBFS −0.005 −0.010 −0.015 −0.020 −0.025 −0.030 Output Amplitude (dBFS) PASS BAND RIPPLE 02 2 2 4 6 8 1 01 21 41 61 82 0 Input Frequency (kHz) fsIN:fsOUT = 48kHz:48kHz (asynchronous) −10 −20 −30 −40 −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 Output Amplitude (dBFS) FREQUENCY RESPONSE 05 0 5 1 01 52 02 53 03 54 04 5 Input Frequency (kHz) fsIN:fsOUT = 192kHz:48kHz Input Amplitude = 0dBFS −0.005 −0.010 −0.015 −0.020 −0.025 −0.030 Output Amplitude (dBFS) PASS BAND RIPPLE 01 1 5 23456789 1 0 1 1 1 2 1 3 1 4 Input Frequency (kHz) fsIN:fsOUT = 32kHz:32kHz (asynchronous) −0.005 −0.010 −0.015 −0.020 −0.025 −0.030 Output Amplitude (dBFS) PASS BAND RIPPLE 05 1 0 4 515 20 25 30 35 40 Input Frequency (kHz) fsIN:fsOUT = 96kHz:96kHz (asynchronous)

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com TYPICAL CHARACTERISTICS (continued) All specifications at TA = +25°C, VDD33 = +3.3V, VIO = +3.3V, REGEN = High, and VDD18 floating, unless otherwise noted. −0.005 −0.010 −0.015 −0.020 −0.025 −0.030 Output Amplitude (dBFS) PASS BAND RIPPLE 01 0 2 0 9 0 30 40 50 60 70 80 Input Frequency (kHz) fsIN:fsOUT = 192kHz:192kHz (asynchronous)

amount of power in this mode. they may be set to Soft Power-Down mode individually. and power dissipation specifications for both modes. to enable normal operation for both SRC sections. SRC A and SRC B sections, which are shown in Table 1. to Master mode at any given time, as indicated in Table 1. Table 1. Setting the Serial Port Modes (x = A or B) interface that may operate in either Slave or Master mode. audio data inputs for SRC A and SRC B, respectively. Right-Justified format supports 16-, 18-, 20-, or 24-bit data. also listed in the Electrical Characteristics table.

Table 3 illustrates data format selection for the output port. set the output port data format and word length for SRC A. port data format and word length for SRC B. Table 3. Output Port Data Format/Word Length output port, bypassing the sample rate conversion block. BYPB (pin 41) high in either Hardware or Software mode. buffered prior to the re-sampling function. Table 4. Low Group Delay Configuration group delay associated with the decimation function. Table 5. Decimation Function Configuration

0 Decimation Filter Enabled

1 Direct Downsampler Enabled

(pin 38) input is used for SRC B. default, with direct downsampling disabled.

normalizes the frequency response over the audio band. configuration table for the de-emphasis filter options. Table 6. Digital De-Emphasis Filter Configuration disabled by default in Software mode. forcing the MUTEA (pin 19) or MUTEB (pin 30) inputs high. setting is programmed to 0dB (unity gain) by default. is set to Independent by default. frequency is lower than the input sampling frequency. either an external indicator or host. information regarding Registers 6 and 7.

one for SRC B, each conforming to the register map shown in Table 7. register, as unexpected operation may result if Register 0 is programmed to an arbitrary value. Register 1 through Register 5 contain control bits, which are programmed to configure specific internal functions. sIN:fsOUT sampling ratio and are read only status registers. Table 7. Control Register Map for Either the SRC A or SRC B Register Banks

1 PDN TRACK 0 MUTE BYPASS MODE2 MODE1 MODE0

3 OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0

4 AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0

5 AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0

6 SRI4 SRI3 SRI2 SRI1 SRI0 SRF10 SRF9 SRF8

7 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com CONTROL REGISTER DEFINITIONS (Software Mode Only) This section contains descriptions for each control and status register available in Software mode. Reset defaults are also shown for each register bit. Register 1. System Control Register (MSB) D6 D5 D4 D3 D2 D1 (LSB) PDN TRACK 0 MUTE BYPASS MODE2 MODE1 MODE0 MODE[2:0] Audio Serial Port Mode These bits are used to select the Slave or Master mode status of the input and output serial ports. MODE2 MODE1 MODE0 AUDIO SERIAL PORT MODE 0 0 0 Both Serial Ports are in Slave Mode (default) 0 0 1 Output Serial Port is Master with RCKI = 128fs 0 1 0 Output Serial Port is Master with RCKI = 512fs 0 1 1 Output Serial Port is Master with RCKI = 256fs 1 0 0 Both Serial Ports are in Slave Mode 1 0 1 Input Serial Port is Master with RCKI = 128fs 1 1 0 Input Serial Port is Master with RCKI = 512fs 1 1 1 Input Serial Port is Master with RCKI = 256fs BYPASS Bypass Mode This bit is logically OR’d with the bypass input (BYPA or BYPB) for the corresponding SRC section. BYPASS FUNCTION 0 Bypass Mode disabled with normal ASRC operation. (default)

1 Bypass Mode enabled with data routed directly from the input port to the output port, bypass-

ing the ARSC function. MUTE Output Soft Mute This bit is logically OR’d with the MUTE input (MUTEA or MUTEB) for the corresponding SRC section. MUTE OUTPUT MUTE FUNCTION 0 Soft mute disabled. (default)

1 Soft mute enabled with output data attenuated to all 0s

TRACK Digital Attenuation Tracking TRACK ATTENUATION TRACKING

0 Tracking Off: Attenuation for the Left and Right channels is controlled independently by Con-

trol Register 4 and Control Register 5. (default) 1 Tracking On: Left channel attenuation setting is used for both channels. PDN Power-Down Setting this bit to 0 will force the corresponding SRC section into Soft Power-Down mode. All other register settings are preserved and the SPI port remains active. Setting this bit to 1 will power-up the corresponding SRC section using the current register settings. This bit defaults to 0 on power-up or reset. It must be programmed to 1 by the user in order to enable normal operation for the corresponding SRC section.

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com Register 2. Digital Filter Control Register (MSB) D6 D5 D4 D3 D2 D1 (LSB) 0 0 0 DEM1 DEM0 DDN LGRP1 LGRP0 LGRP0 Interpolation Filter Group Delay LGRP1 These bits are used to select the number of input samples to be stored in the data buffer before the re-sampler starts to process the data. This has a direct impact on the group delay or latency of the interpolation filter. LGRP1 LGRP0 GROUP DELAY 0 0 64 Samples (default) 0 1 32 Samples 1 0 16 Samples 1 1 8 Samples DDN Decimation Filtering/Direct DownSampling The DDN bit is used to enable or disable the direct downsampling function of the decimation block. DDN DECIMATION FILTER OPERATION 0 Decimation filter enabled. (default) (Must be used when fsOUT is less than or equal to fsIN.) 1 Direct downsampling enabled without filtering. (May be enabled when fsOUT is greater than fsIN.) DEM0 Digital De-Emphasis Filtering DEM1 These bits are used to configure the digital de-emphasis filter function. DEM1 DEM0 DE-EMPHASIS FILTER 0 0 Disabled (default) 0 1 48kHz Input Sampling Rate 1 0 44.1kHz Input Sampling Rate 1 1 32kHz Input Sampling Rate

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com Register 3. Audio Data Format Register (MSB) D6 D5 D4 D3 D2 D1 (LSB) OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0 IFMT[2:0] Input Serial Port Data Format These bits are utilized to select the audio data format for the input serial port. IFMT2 IFMT1 IFMT0 INPUT FORMAT 0 0 0 24-Bit, Left-Justified (default) 0 0 1 24-Bit, I2S 0 1 0 Reserved 0 1 1 Reserved 1 0 0 Right-Justified, 16-Bit Data 1 0 1 Right-Justified, 18-Bit Data 1 1 0 Right-Justified, 20-Bit Data 1 1 1 Right-Justified, 24-Bit Data OFMT[1:0] Output Port Data Format These bits are utilized to select the audio data format for the output serial port. OFMT1 OFMT0 OUTPUT FORMAT 0 0 Left-Justified (default) 0 1 I2S 1 0 TDM 1 1 Right-Justified OWL[1:0] Output Port Data Word Length OWL1 OWL0 OUTPUT WORD LENGTH 0 0 24-Bits (default) 0 1 20-Bits 1 0 18-Bits 1 1 16-Bits

/C0083/C0082/C0067/C0052/C0049/C0056/C0052 SBFS026A − JUNE 2004 − REVISED JULY 2004 www.ti.com Register 4. Digital Output Attenuation Register—Left Channel (MSB) D6 D5 D4 D3 D2 D1 (LSB) AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0 This register is utilized to program the digital output attenuation for the Left output channel of the corresponding SRC section. Register defaults to 00h, or 0dB (unity gain). Output Attenuation (dB) = −N × 0.5, where N = AL[7:0] DEC Register 5. Digital Output Attenuation Register—Right Channel (MSB) D6 D5 D4 D3 D2 D1 (LSB) AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0 This register is utilized to program the digital output attenuation for the Right output channel of the corresponding SRC section. When the TRACK bit in Control Register 1 is set to 1, the Left Channel attenuation setting will also be used to set the Right Channel attenuation. Register defaults to 00h, or 0dB (unity gain). Output Attenuation (dB) = −N × 0.5, where N = AR[7:0] DEC Register 6. Sampling Ratio (read only) (MSB) D6 D5 D4 D3 D2 D1 (LSB) SRI4 SRI3 SRI2 SRI1 SRI0 SRF10 SRF9 SRF8 Register 7. Sampling Ratio (read only) (MSB) D6 D5 D4 D3 D2 D1 (LSB) SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0 The contents of Register 6 and Register 7 indicate the input-to-output sampling ratio, and can be used to determine either the input or output sampling rates when one of the two rates is known. Bits SRI[4:0] comprise the integer portion of the input-to-output sampling ratio. Bits SRF[10:0] comprise the fractional portion of the input-to-output sampling ratio. The contents of Register 6 and Register 7 are updated when Register 6 is read. Register 6 must always be read first in order to obtain the latest ratio data for both registers.

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SRC4184IPAG ACTIVE TQFP PAG 64 160 None Call TI Call TI SRC4184IPAGR ACTIVE TQFP PAG 64 1500 None Call TI Call TI SRC4184IPAGT ACTIVE TQFP PAG 64 250 None Call TI Call TI (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - May not be currently available - please checkhttp://www.ti.com/productcontentfor the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 20-Dec-2004 Addendum-Page 1

MTQF006A – JANUARY 1995 – REVISED DECEMBER 1996 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PAG (S-PQFP-G64) PLASTIC QUAD FLATPACK 0,13 NOM 0,25 0,45 0,75 Seating Plane 0,05 MIN 4040282/C 11/96 Gage Plane 0,17 0,27 7,50 TYP SQ 9,80 1,05 0,95 11,80 12,20 1,20 MAX 10,20 SQ 0,08 0,50 M0,08 0°–7° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC MS-026

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