SR12 SEMTECH | Alldatasheet
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1 www.semtech.com PROTECTION PRODUCTS SR12 Low Capacitance TVS Diode Array Description Features Circuit Diagram Schematic & PIN Configuration Revision 04/11/05 RailClamps are surge rated diode arrays designed to protect high speed data interfaces. The SR12 has been specifically designed to protect sensitive components which are connected to data and transmission lines from overvoltages caused by ESD (electrostatic discharge), EFT (electrical fast transients), and lightning. The unique design of the SR12 incorporates four surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The internal TVS diode prevents over-voltage on the power line, protecting any downstream components. The low capacitance array configuration allows the user to protect two high-speed data or transmission lines. The low inductance construction minimizes voltage overshoot during high current surges.
Applications
Mechanical Characteristics ADSL Industrial Electronics RS-422 Interfaces Portable Electronics Microcontroller Input Protection WAN/LAN Equipment Transient protection for high speed data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 0.5kV, 12A (8/20µs) Array of surge rated diodes with internal TVS Diode Protects two I/O lines Operating Voltage: 12 volts Low capacitance (5pF typical) for high-speed interfaces Low clamping voltage Solid-state silicon-avalanche technology JEDEC SOT-143 package UL 497B listed Molding compound flammability rating: UL 94V-0 Marking : R12 Packaging : Tape and Reel per EIA 481 RoHS/WEEE Compliant Pin 4 Pin 2 Pin 3 Pin 1 SOT-143 (Top View)
2 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 Absolute Maximum Rating
Electrical Characteristics
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3 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 0.01 0.1 0.1 1 10 100 1000 Pulse Duration - tp (µs) Peak Pulse Power - P PP (kW) 100 110 0 25 50 75 100 125 150 Ambient Temperature - T A (oC) % of Rated Power or IPP Clamping Voltage vs. Peak Pulse CurrentPulse Waveform 0 4 8 12 16 20 Peak Pulse Current - I R (A) Clamping Voltage - V C (V) Waveform Parameters: tr = 8µs td = 20µs Forward Voltage vs. Forward Current Capacitance vs. Reverse Voltage -16 -14 -12 -10 0123456 Reverse Voltage - V R (V) % Change in Capacitance 100 110 0 5 10 15 20 25 30 Time (µs) Percent of IPP e td = IPP/2 Waveform Parameters: tr = 8µs td = 20µs 0 5 10 15 20 25 30 35 40 45 50 Forward Current - I F (A) Forward Voltage - VF (V) Waveform Parameters: tr = 8µs td = 20µs
4 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 Device Connection Options for Protection of Two High-Speed Data Lines The SR12 TVS is designed to protect two data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode V F) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 2 and 3. The nega- tive reference (REF1) is connected at pin 1. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference (REF2) is connected at pin 4. The options for connecting the positive reference are as follows: 1. To protect data lines and the power line, connect pin 4 directly to the positive supply rail (V CC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SR12 can be isolated from the power supply by adding a series resistor between pin 4 and V CC. A value of 10k Ω is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pin 4 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). ESD Protection With RailClamps RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where dis- crete diodes or diode arrays are configured for rail-to- rail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the V F drop of the diode. Data Line and Power Supply Protection Using Vcc as reference Data Line Protection with Bias and Power Supply Isolation Resistor Data Line Protection Using Internal TVS Diode as Reference Applications Information
6 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 ADSL Interface Protection Applications Information (continued) the power supply connection. During an ESD event, the current will be directed through the integrated TVS diode to ground. The total clamping voltage seen by the protected IC due to this path will be: V C = V F(RailClamp) + V TVS This is given in the data sheet as the rated clamping voltage of the device. For a SR12 the typical clamping voltage is <30V at I PP=16A. The diodes internal to the RailClamp are low capacitance, fast switching devices that are rated to handle transient currents and main- tain excellent forward voltage characteristics. Typical Applications Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small com- pared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint.
7 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 Land Pattern - SOT-143 Outline Drawing - SOT-143 A e e/2 e1 bxN bbb C A B B aaa C A B CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). NOTES: OR GATE BURRS. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3. DATUMS AND TO BE DETERMINED AT DATUM PLANE REFERENCE JEDEC STD TO-253, VARIATION D.4. -A- -B-2. -H- SIDE VIEW SEE DETAIL A H 0.25C SEATING PLANE GAUGE PLANE 0 c L DETAIL A D E A C SEATING PLANE ccc C4X INCHES .114 E D b e c .011 .003 .082 DIM A MIN .000 .031 0.51 0.20 2.64 0.30 0.08 2.10 (.021) .075 .093 .020 .008 .104 (0.54)
1.92 BSC
2.37 2.90 MILLIMETERS MAX 0.15 1.22 MIN DIMENSIONS 0.013 MAXNOM - .006 .048 NOM 0.80 3.042.80.110 .120 e1 .008 0.20 BSC E1 .051 1.30 0.940.76.037.029 1.401.20 N4 4 0 - 8°0°8°0° - .055.047 aaa .006 0.15 bbb .008 0.20 ccc .004 0.10 C Y Y REFERENCE IPC-SM-782A.2. GZ NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. DIM Y Z G C MILLIMETERSINCHES (2.20) .055 .141 .076 .039 .031 .068 (.087) 1.40 3.60 1.72 1.00 0.80 1.92 DIMENSIONS X2 .047 1.20 X1 X1
8 2005 Semtech Corp. www.semtech.com PROTECTION PRODUCTS SR12 Contact Information Semtech Corporation Protection Products Division 200 Flynn Rd., Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 traP rebmuN hsiniFdaeL repytQ leeR eziSleeR CT.21RSb PnS0 00,3h cnI7 TCT.21RSe erFbP0 00,3h cnI7 Marking Codes