SPT5140 CADEKA | Alldatasheet

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8-BIT, ULTRAHIGH-SPEED D/A CONVER TER BLOCK DIA GRAM APPLICA TIONS

  • Raster graphics
  • High-resolution color or monochrome displays to 2k x 2k pixels
  • Medical electronics: CAT, PET, MR imaging displays
  • CAD/CAE workstations
  • Solids modeling
  • General-purpose high-speed D/A conversion
  • Digital synthesizers
  • Automated test equipment
  • Digital transmitters/modulators FEA TURES
  • 400 MWPS nominal conversion rate
  • RS-343-A compatible
  • Complete video controls: Sync, Blank, Bright and Reference White (Force High)
  • 10 KH, 100K ECL compatible
  • Single power supply
  • Registered data and video controls
  • Differential current outputs
  • Stable on-chip bandgap reference
  • 50 and 75 ohm output drive
  • ESD-protected data and control inputs GENERAL DESCRIPTION The SPT5140 is a monolithic 8-bit digital-to-analog con- verter capable of accepting video data at 400 MWPS. Complete with video controls — Sync, Blank, Reference White (Force High), Bright — the SPT5140 directly drives doubly-terminated 50 or 75 ohm loads to standard com- posite video levels. Standard set-up level is 7.5 IRE. The SPT5140 includes an internal precision bandgap refer- ence which can drive two other SPT5140s in an RGB graphics system. The SPT5140 is available in a 24-lead PDIP package in the industrial temperature range of –25 °C to +85 °C. Contact the factory for military temperature and /883 versions. Sync, Blank, Bright, Ref – White D0–D3 D4–D7 (MSBs) 4 to 15 Decode Output Current Switches Out + Out – Bandgap Reference Video Controls In Video Data In Feedthrough Con vert Ref In Ref Out ISet Video Data In Ref Buffer Register

ABSOLUTE MAXIMUM RA TINGS (B eyond which damage may occur)1 25 °C Note 1:Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications. Supply Voltages Input Voltages (measured to VCC ) Temperature ELECTRICAL SPECIFICA TIONS VCC = ground, VEE = –5.2 V ±0.3 V, TA = TMIN to TMAX , CC = 0 pF, ISet = 1.105 mA, unless otherwise specified. TEST TEST SPT5140 PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS Integral Linearity Error 1.0 mA<ISet<1.3 mA VI –0.37 +0.37 % FS –0.95 +0.95 LSB Differential Linearity Error 1.0 mA<ISet<1.3 mA VI –0.2 +0.2 % FS –0.5 +0.5 LSB Gain Error VI –6.5 +6.5 % FS Gain Error Tempco V 150 PPM/ °C Bandgap Tempco V 100 PPM/ °C Input Capacitance, ISet, Ref Out V 5 pF Compliance Voltage, + Output VI –1.2 1.5 V Compliance Voltage, – Output VI –1.2 1.5 V Equivalent Output Resistance VI 20 kΩ Output Capacitance V 9 pF Maximum Current, + Output IV 45 mA Maximum Current, – Output IV 45 mA Output Offset Current VI 0.05 0.5 LSB Input Voltage, Logic High VI –1.0 V Input Voltage, Logic Low VI –1.5 V Convert Voltage, IV –0.5 –2.5 V Common Mode Range (V ICM ) Convert Voltage, Differential (VIDF) IV 0.4 1.2 V Input Current, Logic Low, VI 35 120 µA Data and Controls Input Current, Logic High, VI 40 120 µA Data and Controls Input Current, Convert VI 2 60 µA Reference Voltage Measured to VCC VI –1.3 –1.2 –1.0 V Reference Output Current VI –50 µA Input Capacitance, V 3 pF Data and Controls Power Supply Sensitivity VI –120 +20 +120 µA/V Supply Current VI 155 220 mA 2 3/28/00

All electrical characteristics are subject to the following conditions: All parameters having min/max specifi- cations are guaranteed. The Test Level column indicates the specific device testing actually performed during pro- duction and Quality Assurance inspec- tion. Any blank section in the data column indicates that the specification is not tested at the specified condition. TEST LEVEL TEST PR OCEDURE I 100% production tested at the specified temperature. II 100% production tested at TA = +25 °C, and sample tested at the specified temperatures. III QA sample tested only at the specified temperatures. IV Parameter is guaranteed (but not tested) by design and characteriza- tion data. V Parameter is a typical value for information purposes only. VI 100% production tested at TA = +25 °C. Parameter is guaranteed over specified temperature range. Dynamic Characteristics (RL = 37.5 ohms, CL = 5 pF, TA = +25 °C, ISet = 1.105 mA) Maximum Conversion Rate IV 385 400 MWPS Rise Time 10% to 90% G.S. IV 900 ps Rise Time 10% to 90% G.S. IV 600 ps R L = 25 ohms Current Settling Time, Clocked To 0.2% G.S. V 4 ns Mode (tSI) Current Settling Time, Clocked To 0.2% G.S. V 3 ns Mode (tSI)R L = 25 Ω Clock to Output Delay, Clocked IV 2.2 4 ns Mode (tDSC ) T A = TMIN to TMAX IV 4.5 ns Part-to-Part Clock to Output Delay Skew , Clocked Mode TA = TMIN to TMAX IV 1.5 ns Data to Output Delay, IV 3.2 6 ns Transparent Mode (tDST ) T A = TMIN to TMAX IV 6 ns Glitch Energy Area = 1/2 VT V 4 pV-s Convert Pulse Width (tPWH , tPWL ) IV 1.3 ns Reference Bandwidth, –3 dB V 1.25 MHz Set-up Time, Data and Controls (tS) IV 1.0 ns Hold Time, Data and Controls (tH ) IV 0.5 ns Slew Rate 20% to 80% G.S. V 700 V/µS Clock Feedthrough IV –48 dB ELECTRICAL SPECIFICA TIONS VCC = ground, VEE = –5.2 V ±0.3 V, TA = TMIN to TMAX , CC = 0 pF, ISet = 1.105 mA, unless otherwise specified. TEST TEST PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS 3 3/28/00

The SPT5140 is a high-speed video digital-to-analog converter capable of up to 400 MWPS conversion rates. This makes the devices suitable for driving 2048 X 2048 pixel displays at update rates of 60 to 90 Hz. In addition, the SPT5140 includes an internal bandgap reference which may be used to drive two other SPT5140s if desired. The SPT5140 has 10KH and 100K ECL logic level com- patible video control and data inputs. The complementary analog output currents produced by the devices are pro- portional to the product of the digital control and data inputs in conjunction with the analog reference current. The SPT5140 is segmented so that the four MSBs of the input data are separated into a parallel “thermometer” code. From here, fifteen current sinks, which are identi- cal, are driven to fabricate sixteen coarse output levels. The remaining four LSBs drive four binary weighted current switches. MSB currents are then summed with the LSBs that pro- vide a one-sixteenth of full-scale contribution to provide the 256 distinct analog output levels. The video control inputs drive weighted current sinks which are added to the output current to produce com- posite video output levels. These controls — Sync, Blank, Reference White (Force High) and Bright — are needed in video applications. Another feature that similar video D/A converters do not have is the Feedthrough Control. This pin allows regis- tered or unregistered operation of the video control and data inputs. In the registered mode, the composite func- tions are latched to the pixel data to prevent screen-edge distortions generally found on unregistered video DACs. TYPICAL INTERF ACE CIRCUIT GENERAL A typical interface circuit using the SPT5140 in a color raster application is shown in figure 2. The SPT5140 requires few external components and is extremely easy to use. The very high operating speeds of the SPT5140 require good circuit layout, decoupling of supplies, and proper design of transmission lines. The following consid- erations should be noted to achieve best performance. INPUT CONSIDERA TIONS Video input data and controls may be directly connected to the SPT5140. Note that all ECL inputs are terminated as closely to the device as possible to reduce ringing, crosstalk and reflections. A convenient and commonly used microstrip impedance is about 130 ohms, which is easily terminated using a 330 ohm resistor to VEE and a 220 ohm resistor to ground. This arrangement gives a Thevenin equivalent termination of 130 ohms to –2 volts without the need for a –2 volt supply. Standard SIP (Single Inline Package) 220/330 resistor networks are available for this purpose. It is recommended that stripline or microstrip techniques be used for all ECL interface. Printed circuit wiring of known impedance over a solid ground plane is recommended. Decoding Logic Data Registers Current Sources and Switches Current Source Biasing Amp Out + Out – Bandgap Reference Ref InVEE VCC ISetRef Out Composite Video Controls Feedthrough D0–D7 CONV CONV Figure 1 – Functional Diagram 4 3/28/00

The analog outputs are designed to directly drive a dou- bly terminated 50 or 75 ohm load transmission system as shown. The source impedances of the SPT5140 outputs are high impedance current sinks. The load impedance (RL) must be 25 or 37.5 ohms to attain standard RS-343- A video levels. Any deviation from this impedance will affect the resulting video output levels proportionally. As with the data interface, it is important that the analog transmission lines have matched impedance throughout, including connectors and transitions between printed wiring and coaxial cable. The combination of matched source termination resistor RS and load terminator RL minimizes reflections of both forward and reverse travel- ing waves in the analog transmission system. The return path for analog output current is VCC , which is connected to the source termination resistor RS. PO WER CONSIDERA TIONS The SPT5140 operates from a single –5.2 V standard supply. Proper bypassing of the supplies will augment the SPT5140’s inherent supply noise rejection characteris- tics. As shown in figure 2, each supply pin should be by- passed as close to the device as possible with 0.01 µF and 10 µF capacitors. The SPT5140 has two analog (VEE ) power supply pins. Both supply pins should be properly bypassed as men- tioned previously. This device also has two analog (VCC ) ground pins. Both ground pins should be tied to the analog ground plane. Power and ground pins must be connected in all applications. If a +5 V power source is required, the ground pins (VCC ) become the positive sup- ply pins while the supply pins (VEE ) become the ground pins. The relative polarities of the other input and output voltages must be maintained. Figure 2 – Typical Interface Circuit 10. = VCC = AGND See figure 9 for detail on Ref Buffer. R 2 1 kΩ Output Current Switches4 to 15 Decode Video Control Inputs Video Data Inputs Clock Ref Buffer R 1 1 kΩ ISet ISet* Bandgap Reference V– Ref In 1kΩ Optional External Reference –5.2 V .01 µF Remo ve J1 For External Reference LM113/313 FT FH Blank BR T Sync D0 (LSB) D7 (MSB) CONV CONV 2 kΩ Register Video Monitor Out+ R 3 50/75 Ω R 4 50/75 Ω 50/75 Ω COAX All reference resistors 1/8 W 1% metal film, pow er supply decoupling 50 V ceramic disc NO TES: V– = –1.2 V (typical) for LM113 or VBG V+ = –1.2 V R L = R3 / / R4 K = 15.8069 K1 = 1.7617 K2 = 10.0392 FB = Ferrite bead, Fair-rite pin 217430011 or equivalent. = ECL Terminationx ISet = V+ α T(R1+R 2); typ = 1.105 mA VOUT = 2555. VSync = (K x ISet x RL) + (K2 x ISet x RL) * An external reference can be used or the reference from Ref Out can drive three SPT5140s. Out– 255–DigitalInputCode xISet R L + [K1 x ISet x RL(bright) K Jumper J1 VEEVCC –5.2 V .01 µF 10 µF FB = DGND (digital input drivers).12. [ ] 11. 5 3/28/00

The SPT5140 has two reference inputs (Ref In and ISet) and one reference output (Ref Out). The input pins are connected to the inverting and noninverting inputs of an internal amplifier that serves as a reference buffer. The output of the buffer amplifier is the reference for the current sinks. The amplifier feedback loop is connected around one of the current sinks to achieve better accu- racy. (See figure 9.) Since the analog output currents are proportional to the digital input data and the reference current (ISet), the full- scale output may be adjusted by varying the reference current. ISet is controlled through the (ISet) input on the SPT5140. A method and equations to set ISet are shown in figure 2. The SPT5140 can use an external negative voltage reference. The external reference must be stable to achieve a satisfactory output and the Ref In should be driven through a resistor to minimize offsets caused by bias current. The value for ISet can be varied with the 500 to 1k Ω trimmer to change the full-scale output. A double 50 ohm load (25 ohm) can be driven if ISet is increased by 50% above for doubly-terminated 75 ohm video applications. DATA INPUTS AND VIDEO CONTR OLS The SPT5140 has standard single-ended data inputs. The inputs are registered to produce the lowest differen- tial data propagation delay (skew) to minimize glitching. There are also four video control inputs to generate com- posite video outputs. These are Sync, Blank, Bright and Reference White or Force High. Also provided is the Feedthrough control mentioned earlier. The controls and data inputs are all 10 KH and 100K ECL compatible. In addition, all have internal pulldown resistors to leave them at a logic low, so the pins are inactive when not used. This is useful if the devices are applied as standard DACs without the need for video controls or if less than eight bits are used. The SPT5140 is usually configured in the synchronous mode. In this mode, the controls and data are synchro- nized to prevent pixel dropout. This reduces screen-edge distortions and provides the lowest output noise while maintaining the highest conversion rate. By leaving the Feedthrough (FT) control open (low), each rising edge of the convert (CONV) clock latches decoded data and con- trol values into a D-type internal register. The registered data is then converted into the appropriate analog output –1.3 V CONV CONV 1/2 LSB tPWL tH tS tPWH tSI OUT + OUT – 1/2 LSB –1.3 V tDSC tDST Data Control Inputs Figure 3 – Timing Diagram 6 3/28/00

by the switched current sinks. When FT is tied high, the control inputs and data are not registered. The analog output asynchronously tracks the input data and video controls. Feedthrough itself is asynchronous and usually used as a DC control. The controls and data have to be present at the input pins for a set-up time of tS before, and a hold time of tH after, the rising edge of the clock (CONV) in order to be syn- chronously registered. The set-up and hold times are not important in the asynchronous mode. The minimum pulse widths high (tPWH ) and low (tPWL ) as well as settling time become the limiting factors. (See figure 3.) The video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be compatible with video system standards as described in RS-343-A. Table I shows the video control effects on the analog output. Internal logic governs Blank, Sync and Force High so that they override the data inputs as needed in video applications. Sync overrides both the data and other controls to produce full negative video output (figure 4). Reference White video level output is provided by Force High, which drives the internal digital data to full-scale output or 100 IRE units. Bright gives an additional 10% of full-scale value to the output level. This function can be used in graphic displays for highlighting menus, cursors or warning messages. Again, if the devices are used in non-video applications, the video controls can be left open. Table I – Video Control Operation (Output values for setup = 10 IRE and 75 ohm standard load) Ref Data Sync Blank White Bright Input Out – (mA) Out – (V)Out – (IRE) Description 1 XXXX 28.57 –1.071 –40 Sync Level 0 1 X X X 20.83 –0.781 0 Blank Level 0011 X 0.00 0.000 110 Enhanced High Level 0010 X 1.95 –0.073 100 Normal High Level Figure 4 – Video Output W aveform for Standard Load

256 Gray Levels

Normal Low (Black) Sync Video Blank Bright Normal High (White)110 100 7.5 –40 0 mV –73 mV –728 mV –781 mV –1071 mV IRE 7 3/28/00

TYPICAL RGB GRAPHICS SYSTEM In an RGB graphics system, the color displayed is deter- mined by the combined intensities of the red, green and blue (RGB) D/A converter outputs. A change in gain or offset in any of the RGB outputs will affect the apparent hue displayed on the CRT screen. Thus, it is very important that the outputs of the D/A con- verters track each other over a wide range of operating conditions. Since the D/A output is proportional to the product of the reference and digital input code, a com- mon reference should be used to drive all three D/As in an RGB system to minimize RGB DAC-to-DAC mismatch and improve TC tracking. The SPT5140 contains an internal precision bandgap reference which completely eliminates the need for an external reference. The reference can supply up to 50 µA to an external load, such as two other DAC reference inputs. The circuits shown in figure 8 illustrate how a single SPT5140 may be used as a master reference in a system with multiple DACs (such as RGB). The other DACs are simply slaved from the SPT5140’s reference output. 750 Ω500 Ω 750 Ω500 Ω SPT5140 (Master) R SPT5140 (Slave) G 1kΩ Ref InISet SPT5140 (Slave) B 1 kΩ Ref InISetRef OutISet R 2 750 Ω R 1 500 Ω ISet ISetISet Ref In IRef Figure 8 – Typical RGB Graphics System 9 3/28/00

A B C D E F G H K I J INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX A B C D E F G H I J 0.190 0.135 0.022 0.012 0.550 1.255 K 0.125 0.015 0.100 typ 0.055 0.008 0.150 typ 0.600 0.530 1.245 0.070 3.18 0.38 2.54 typ 1.40 0.20 3.81 typ 15.24 13.46 31.62 1.78 4.83 3.43 0.56 1.65 0.30 15.88 13.97 31.88 2.03 0.065 0.625 0.080 PA CKA GE OUTLINE 24-Lead PDIP 11 3/28/00

PART NUMBER TEMPERATURE RANGE PACKAGE SPT5140SIN –25 to +85 °C 24L PDIP Out + Out – VCC Ref Out Sync VEE CONV FT VCC FH Blank BR T CONV ISet Ref In VEE PIN ASSIGNMENTS PIN FUNCTIONS Name Function D3 Data Bit 3 D2 Data Bit 2 D1 Data Bit 1 D0 Data Bit 0 (LSB) VEE Negative Supply CONV Convert Clock Input CONV Convert Clock Input Complement FT Register Feedthrough Control VCC Positive Supply FH Data Force High Control Blank Video Blank Input BR T Video Bright Input Sync Video Sync Input Ref Out Reference Output Ref In Reference Input ISet Reference Current Out – Output Current Negative Out + Output Current Positive D7 Data Bit 7 (MSB) D6 Data Bit 6 D5 Data Bit 5 D4 Data Bit 4 12 3/28/00