SPT1019 CADEKA | Alldatasheet
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8-BIT, HIGH SPEED D/A CONVERTER SH oP mn eC eebrrirt eet deileittietidbeeidbditieel} FEATURES APPLICATIONS + 275 MWPS Conversion Rate - Version A + High Resolution Color or Monochrome Raster + 165 MWPS Conversion Rate - Version B Graphics Displays + Compatible with the HDAC10181 + Medical Electronics: CAT, PET, MR Imaging Displays with Improved Performance * CAD/CAE Workstations + RS-343-A Compatible * Solids Modeling * Complete Video Controls: Sync, Blank, Bright * General Purpose High-Speed D/A Conversion and Reference White (Force High) + Digital Synthesizers * 10KH, 100K ECL Compatible + Automated Test Equipment + Single Power Supply + Digital Transmitters/Modulators + Registered Data and Video Controls * Differential Current Outputs + Stable On-Chip Bandgap Reference + ESD Protected Data and Control Inputs GENERAL DESCRIPTION pin-compatible with the HDAC10181 with improved perfor- Pn mance. The SPT1019 contains data and control input regis- The SPT1019 is a monolithic 8-bit digital-to-analog converter ters, video control logic, reference buffer, and current capable of accepting video data ata 1650r275MWPSrate. switches Complete with video controls (Sync, Blank, Reference White - [Force High], Bright), the SPT1019 directly drives doubly- The SPT1019 is available in a 24-lead PDIP package in the terminated 50 or 75 ohm loads to standard composite video _industrial temperature range. Contact the factory for military levels. The standard setup level is 7.5 IRE. The SPT1019 is temperature and /883 versions. BLOCK DIAGRAM Video Contots in ‘Syne, Blank, Bright, Ref - High | ce Video Dati tm FN a outs Output Daal I | 47015 (MSBs) Feedthrough Sy 'set Ref | Ret Out comp Reference
ABSOLUTE MAXIMUM RATING (Beyond which damage may occur)! Supply Voltages Temperature JUNCTION 0.0... eceeteseeeseeeeeeteteeeees #175 °C (measured to Vcc) Note: 1. Operation at any Absolute Maximum Ratings is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications. ELECTRICAL SPECIFICATIONS Voc =ground, Vee = -5.2 V 40.3 V, Ta =TMIN to TMAX, Co = 0 pF, Iset = 1.105 mA, unless otherwise sprecified. TEST TEST PARAMETERS CONDITIONS LEVEL MIN TYP MAX | UNITS DC ELECTRICAL CHARACTISTICS Integral Linearity Error 1.0 mAcI set<1.3 MA vi -37 +37 | % Full Scale -95 +.95 | LSB Differential Linearity Error 1.0 mAc<lget<1.3 mA vi 0.2 +0.2 | % Full Scale 0.5 +0.5 | LSB Convert Voltage, Vv 0.5 25 1V Common Mode Range (Vicm) Input Current, Logic LOW, vi 35 120 | A Data and Controls Input Current, Logic HIGH, vl 40 120 | WA Data and Controls SPT1019 2 snaia7
Voc =ground, Veg = -5.2 V 40.3 V, Ta =TuIn to Tuax. Co = 0 pF, Iget = 1.105 mA, unless otherwise specified, [cowomons | reve | ww va | PARAMETERS CONDITIONS LEVEL MIN TYP. MAX | UNITS Reference Voltage Data and Controls Power Supply Sensitivi Po 29 20 120 Supply Current P55 220 Tima DYNAMIC CHARACTERISTICS (Ri = 37.5 ohms, Ci = 5 pF, Ta = 25 °C, Iset= 1.105 mA) Maximum Conversion Rate B Grade Vv 165 MWPS: A Grade WV 275 MWPS Ta = Tin to TMAX Vv 2.0 |_ns Ri = 25 ohms Current Settling Time, Clocked Mode ns. Current Settling Time, Clocked Mode ns Current Settling Time, Clocked Mode | To 0.2% G.S. Vv 45 ns tosc. Ta = Tmin to Tmax IV 45 | ns Transparent Mode _tpst Vv 60 | ns tewe, tPWH A Grade WV 18 ns Glitch Energy pV-s Reference Bandwidth, -3 dB Po tz Setup Time, Data and Controls Vv 1.0 ns Hold Time, Data and Controls | teetuwiotun |v _| ns Ta = Twin to TMax Vv 325 VA Ta = Tin to Tmax. Iv -48 | dB TEST LEVEL CODES TESTLEVEL TEST PROCEDURE All electrical characteristics are subject to the | 100% production tested at the specified temperature. following conditions: tl 100% production tested at Ta = +25 °C, and sample All parameters having min/max specifications tested at the specified temperatures. are guaranteed. The Test Level column indi- i QA sample tested only at the specified temperatures. cates the specific device testing actually per- \\V Parameter is guaranteed (but not tested) by design formed during production and Quality Assur- and characterization data. ance inspection. Any blank section in the data ; : ; coun Y aales that the specication is not Vv Parameter is a typical value for information purposes tested at the specified condition. . . Vi 100% production tested at Ta = +25 °C. Parameter is guaranteed over specified temperature range. SPT1019 3 saa7
Figure 1 - Functional Diagram Current Do- D7 —— Becoding a nn Sources |_| Out + Composite mao Logie ? ? switches Out Video Controls F--———2— Data Regist CONV YY a aa Current CONV Source Biasing Feedthrough Bandgap Reference VEE Voc Igeq Ref Out APPLICATION INFORMATION coarse output levels. The remaining four LSBs drive four binary weighted current switches. The SPT1019 is a high speed video digital-to-analog con- verter capable of conversion rates of up to 275 MWPS. This The MSB currents are then summed with the LSBs, which makes the device suitable for driving 1500 X 1800 pixel provide a one-sixteenth of full scale contribution, to provide displays at 70 to 90 Hz update rates. the 256 distinct analog output levels. The SPT1019 is separated into different conversion rate The video control inputs drive weighted current sinks that are categories as shown in table | added to the output current to produce composite video output levels. These controls, Sync, Blank, Reference White The SPT1019 has 10 KH and 100K ECL logic level compat- (Force High), and Bright are needed in video applications. ible video controls and data inputs. The complementa: ‘ analog output currents produced by the devices are propor, Another feature that similar video D/A converters do nothave tional to the product of the digital contro! and data inputs in _'S the Feedthrough Control. This pin allows registered or conjunction with the analog reference current. The SPT1019 Unregistered operation of the video control and data inputs. ig segmented so that the four MSBs of the input data are ‘In the registered mode, the composite functions are latched separated into a parallel thermometer code. From here, _ tthe pixel data to prevent screen-edge distortions generally fifteen identical current sinks are driven to fabricate sixteen found on unregistered video DACs. Table | - The SPT1019 Family and Speed Designations PART NUMBER UPDATE COMMENTS SPT1019A 275 MWPS Suitable for 1200 X 1500 to 1500 X 1800 displays at 60 to 90 Hz update rate. SPT1019B 165 MWPS: Suitable for 1024 X 1280 to 1200 X 1500 displays at 60 to 90 Hz update rate. SPT1019 4 siae7
Figure 2 - Typical Interface Circuit Video Monitor _ BL 338 Sosoeierees 2 ——— oe os ne ve | —_| [| ° 1. Ve =-1.2V (typical) for LM113. inputs, i} 2 V+=-12V ee [+ 470 15 Ve Or RRB J] Decode 3. Ise! = aT Raa) crock 5 Vou. =K[PssDatiahigat code coi] RL + [Kix Isat x RL(Bright] dy % © Voyne = (KX got X Fi) + (Kp X Ioet X Ru) Tat | | fe K, = 1.7617 Ky = 10.0392 OF a ' 7. FB = Ferrite bead, Fair-rite P/N 217430011 or equivalent. Too va cour 8. All reference resistors 1/8 W 1% metal film power. _ supply decoupling 50 V ceramic disc. aur sey 9. —x— =ECL termination. ay ot 10. Xy =Voc=AGND at 11 See figure 8 for detail on Ref Butier. 12. Ret Out on the SPT1019 can be used to drive up to two SPT1018 reference inputs. 13. = DGND (digital input drivers). TYPICAL INTERFACE CIRCUIT -2 volt supply. Standard SIP (Single Inline Package) 220/330 resistor networks are available for this purpose. It is recom- GENERAL mended that stripline or microstrip techniques be used for all ECL interface. Printed circuit wiring of known impedance Atypical interface circuit using the SPT1019 inacolor raster OVer @ Solid ground plane is recommended. application is shown in figure 2. The SPT1019 requires few external components and is extremely easy to use. The very OUTPUT CONSIDERATIONS high operating Spescsiol tie} SFil 1012) aides aaa crreut The analog outputs are designed to directly drive a dual 50 or layout, decoupling of supplies, and Proper Cesign of trans” 75 ohm load transmission system as shown. The source mission lines. The following considerations should be noted impedances of the SPT1019 outputs are high impedance toachieve best performancy: current sinks. The load impedance (RL) must be 25 or 37.5 ohms to attain standard RS-343-A video levels. Any INPUT: CONSIDERATIONS deviation from this impedance will affect the resulting video ‘i output levels proportionally. As with the data interface, it is earner aeiruita aT ECL pith ore berinaied. 2 important that the analog transmission lines have matched closely to the device as possible to reduce ringing, crosstalk Ce ecen printed Sener Soancabte Tho enataeonat aoe reer cone sella conn D eeiy tenminate matched source termination resistor Rs and load terminator usin a 330 ohm resistor to VEE and a 220 ohm resistor to. PL minimizes reflections of both forward and reverse travel- Gidund This arrangement gives a Thevenin equivalent ter- ("9 Waves inthe analog transmission system. The return path mination of 130 ohms to -2 volts without the need for a Ore CHIMAnTSEDERe® which is connected to the SPT1019 5 siao7
Table II - Video Control Operation (Output values for setup = 10 IRE and 75 ohm standard load) ee eee ee eee i SS NO | ed A a A SS NS a a SS NS I SN CO CO CO od Od DATA INPUTS AND VIDEO CONTROLS The video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be com- The SPT1019 has standard single-ended data inputs. The —_ patible with video system standards as described in inputs are registered to produce the lowest differential data © RS-343-A. Table II shows the video control effects on the propagation delay (skew) to minimize glitching. There are —_ analog output. Internal logic governs Blank, Sync, and Force also four video control inputs to generate composite video —_ High so that they override the data inputs as needed in video outputs. These are Sync, Blank, Brightand Reference White —_ applications. Sync overrides both the data and other controls or Force High. Also provided is the Feedthrough control as _to produce full negative video output (figure 9). mentioned earlier. The controls and data inputs are all 10 KH and 100K ECL compatible. In addition, all have internal Reference White video level output is provided by Force pulldown resistors to leave them at a logic low sothe pinsare —_ High, which drives the internal digital data to full scale output inactive when not used. This is useful if the devices are or 100 IRE units. Bright gives an additional 10% of full scale applied as standard DACs withoutthe need for video controls _value to the output level. This function can be used in graphic or if less than eight bits are used. displays for highlighting menus, cursors or warning mes- sages. Again, if the devices are used in non-video applica- The SPT1019 is usually configured in the synchronous __ tions, the video controls can be left open. mode. In this mode, the controls and data are synchronized to prevent pixel dropout. This reduces screen-edge distor: CONVERT CLOCK tions and provides the lowest output noise while maintaining the highest conversion rate. By leaving the Feedthrough (FT) For best performance, the clock should be ECL driven, control open (low), each rising edge of the convert (CONV) differentially, by utilizing CONV and Conv (figure 4). By clock latches decoded data and control values into a D-type driving the clock this way, clock noise and power supply/ internal register. The registered data is then converted into —_ output intermodulation will be minimized. The rising edge of the appropriate analog output by the switched current sinks. _ the clock synchronizes the data and control inputs to the When FT is tied high, the control inputs and data are not ©SPT1019. Since the actual switching threshold of CONV is registered. The analog output asynchronously tracks the — determined by CONV, the clock can be driven single-ended input data and video controls. Feedthrough itselfis asynchro- —_ by connecting a bias voltage to CONV . The switching thresh- nous and usually used as a DC control. old of CONV is set by this bias voltage. The controls and data have to be present at the input pins for ANALOG OUTPUTS a setup time of ts before, and a hold time of th after, the rising edge of the clock (CONV) in order to be synchronously The SPT1019 has two analog outputs that are high imped- registered. The setup and hold times are not importantinthe ance, complementary current sinks. The outputs vary in asynchronous mode. The minimum pulse widths high (tpwH) —_ proportion to the input data, controls and reference current and low (tpw) as well as settling time become the limiting _ values so that the full scale output can be changed by setting factors. (See figure 3.) Iset as mentioned earlier. In video applications, the outputs can drive a doubly termi- SPT1019 ‘ 7 51497 ess
Figure 6 - Typical RGB Graphics System SPT1019 SPT1018 SPT1018 (Master) VR] “(stavey VS E>. 8 'set Ref Out Fels | Ret Rot+ | Ret- Ry Re 5002 7502 Ret 5002 7502 5002 7502 = — — Iser 'set Iset V V 1k V 1k Figure 7 - Burn-In Circuit 89V0 (Max 200 mA)
24 Pin DIP
Bee, £52 All Resistors Are 5% 1/4 W ce Clock = -0.9 to -1.7 V, 100 kHz vi ce {Max 50 mA) out tka 412V0 Ref Out une PRS 1002 (Max 15 mA) 400 2 2 V tka Th ‘ew aavo — (Max 1 5mA) W7 (Max 60 A) CONV Voc Clock © (Max 60 HA) V Figure 8 - DAC Output Circuit Current Current Sink #1 Sink #N f t To Outs ' { { TO Out Reference Reference | i i H Amplifier Current | H H i i i Ref Out | I H 4 eg 4 50g See ORE Un Vee © Comp SPT1019 9 sit4s7
Figure 9 - Video Output Waveform for Standard Load
256 Gray Levels Video
| Normal Low (Black) 75 -728mV ~ PBR 0-781 mV we prrrseneereeseeeeeetceteereee Bla coeeeesteateensecnsscanen eneeneneneees ee ee Oe) Le ere Figure 10- Equivalent Input Circuit - Data, Clock, Controls and Reference i ik 1 | Conv af . Ref Out © Conv | + Iset © IBias b Vee Relerence Y) Segment Switch \\ | I | I Data ad v DY» & Y m= Controls Vee 80 ka 'Bias Vee SPT1019
10 S497
sympol [MIN [MAX | MIN” [Max _| | “ a RAAARAARA AAA pf ones {oes [ane aa 24 a a [F [000s | o01z | 020 | 030 | | [eT Toisoye [| sete | [| osoo | oes | ts24 | 1500 | [1 [asso | o550 | 1345 | 1297 _] 1 [24s [1255 [1.62 | 3186 _| YYuuuuuvuuuuUd [T9070 [0.080 | 178 | 2.03 _| J — a oe q ; + 2 8} F lee | fo hee SPT1019 11 5/14/97
PIN ASSIGNMENTS PIN FUNCTIONS Name Function Ds [I 04, D3 Data Bit 3 [el mal D2 Data Bit 2 [23] Ds re [a fz] D1 Data Bit 1 BI d6 DO Data BitO (LSB) Do [4] ad VEE Negative Supply Vee [29] Vgc CONV Convert Glock Input cont [e| Out + CONV Convert Clock Input Complement CONV Out - FT Register Feedthrough Control et [2] Veco Voc Positive Supply Veo[s | [16] Comp FH Data Force High Control FH [75] Icot Blank Video Blank Input Blank [14] Ref Out BRT Video Bright Input BRT Syne Syne Video Sync Input Ref Out Reference Output Iset Reference Current + Input COMP Compensation Input Out- Output Current Negative Out+ Output Current Positive D7 Data Bit 7 (MSB) Dé Data Bit 6 DS Data Bit 5 D4 Data Bit 4
ORDERING INFORMATION
PART NUMBER DESCRIPTION TEMPERATURE RANGE PACKAGE SPT1019AIN 8-BIT, 275 MWPS DAG -25 to +85 °C 24L PDIP SPT1019BIN 8-BIT, 165 MWPS DAG -25 to +85 °C 24L PDIP For additional information regarding our products, please visit CADEKA at: cadeka.com di eland, Colors . ADEA Headquarters Loveland, Coord Me} C AD E K A T: 877.663.5452 (toll free) Amplify the Human Experience CADEKA, the CADEKA ogo design, Cominear, znd the Combines logo design are tradematks or registered trademarks of CADEKA Microceuts LC. All other brand and product names may be trademarks oftheir respective companies. CADEKA eserves the right to make changes to any products and ceres herein at any me without nobce. CADEKA does nok assume ny responsi ortablty ans out ofthe application or use of any product or senace described heren, except a expressly agreed to in vtng by CADEKA nor does the purchase, lee, oF use ofa product or service from CADEKA convey a bcense under any patent nights, copyrights, trademark 1ghts, er anyother ofthe intellectual property ughts of CADEKA or of thrd partis. Copyright 22007-2009 by CADEKA Microccute ULC. All ight reserve: SPT1019 12 5IN4i97