SPG EPSON | Alldatasheet

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Specifications (characteristics) Electric characteristics RESET timing External dimensions Block diagram Divider IC (without quartz crystal) 4 3 2 7 6 1014 1312 4 3 2 7 6 10141312 (Unit: mm) 0.25 6.65 4.5 max.3.0 min. 0.1 min. 90˚ to 105˚ 7.62 EXC. CSEL. RESET CLOCK ENABLE RESET FOUT 8640N CTL1 to 3 CTL1 to 3 CTL4 to 6CTL4 to 6 TEST TEST OUT OUT 20.5 max. 17.78 80%VDD 50% Output waveform RESET Duty=B/A 100RESET timing tRW 20%VDD tTHL B A VSS VOL VOH 1/2VDD tTLH tR tE tw VDD CSEL 1/1 to 1/107 Program Divider 1/1 to 1/107 SPG-8650O only 1/1 to 1/12 Program Divider 1/1 to 1/12 Program DividerProgram Divider x O S Pull-up and pull-down resistance 400 k (typ.) S P G EPSON 0103B 8650 B SELECTABLE-OUTPUT CRYSTAL OSCILLATOR SPG series

  • Capable of selecting 57 varieties of frequency output.
  • Low current consumption.
  • Easy to mount DIP 16-pin package. Symbol fo VDD-GND VDD TSTG TOPR TSOL Df/f0 fa lop S.R. Item Model name Oscillation source frequency Power source voltage Temperature range Soldering condition (lead part) Frequency tolerance Frequency temperature characteristics Frequency voltage characteristics Aging Current consumption Shock resistance Max. supply voltage Operating voltage Storage temperature Operating temperature Item L. input voltage H. input voltage L. input current (Reset) H input current (Reset) L. input current (input terminal except for Reset) H input current (input terminal except for Reset) L. output voltage H. output voltage L. output current H. output current Output rise time Output fall time Duty Min. reset pulse width Reset delay time Reset release synchronous error External signal input frequency External signal input pulse width Oscillation start up time Specifications 8640AN 8640BN 8640CN 8650A 8650B 8650C 8650E 8651A 8651B 8651E 600kHz 1MHz 768kHz 60kHz 100kHz 96kHz 32.768kHz 60kHz 100kHz 32.768kHz -0.3V to +7.0V 5.0V±0.5V -30˚C to +80˚C -10˚C to +60˚C -55˚C to +125˚C -10˚C to +70˚C Under 260˚C within 10 sec. ±100ppm ±50ppm ±5ppm *1 +10/-120ppm ±20ppm ±10ppm ±20ppm ±10ppm ±5ppm ±3ppm/year max.±5ppm/year max. 0.5mA max. Remarks For output frequency, refer to the table in the next page Package should be less than 150˚C VDD=5V, Ta=25˚C VDD=5V VDD=4.5 to 5.5V VDD=5V, Ta=25˚C, first year No load condition Three drops on a hard wooden board form 75cm *1 Frequency tolerance of 8651 system shows the value guaranteed at the time of shipment. Item Model name Input clock frequency Current consumption Symbol lop Specifications 8650 O 1 MHz max. About 2 mA Remarks No load condition Symbol VIL VIH IRL IRH IIL IIH VOL VOH IOL IOH tTLH tTHL tRW tR tE FIN tIN tOSC Min. VDD-1.0 -30 -0.5 VDD-1.0 1.6 1.0 tW-* 1 1/2 to 0.5 Typ. 0.2 Max. 0.8 VDD 0.5 0.4 -40 1.0 t W * 2 Unit V µA V mA µA ns µs Hz µs s * 1 to=oscillation source cycle. * 2 tw=1/2 cycle of preset frequency. * 3 For more than 1ms until VDD=0fi 4.5V. Time at 4.5V is to be 0. Remarks Reset=GND Reset=VDD IOL=1.6mA IOH= -40µA VOL=0.4V VOH=VDD-1.0V Except in the case of 1/3 and 1/5 8640N only * 3 (VDD=5V±0.5V, Ta=-10 to +70˚C CL ≤ 15pF) Actual size ±5ppm max. ±5ppm max. ±10ppm max.

No. Pin terminal NC CTL 3 CTL 2 CTL 1 CTL 6 CTL 5 CTL 4 GND No. Pin terminal VDD NC RESET NC (CSEL) NC (EXC) FOUT TEST OUT 1 2 34 56 7 8 16 15 14 13 12 11 10 9 NC: Do not connect to the external terminal. For 8650 O ( ) shown 8640N only 11. NC 12. CLOCK 13. ENABLE Explanation of terminal 8640AN Terminal connection 8650E 8651E 8650B 8651B 8650A 8651A 8640BN 8650C 8640CN Explanation of terminal(8650 O) CTL3 CTL6 CTL3 CTL6 (Unit: Hz) 0= “L” 1=“H” CTL3 CTL6 CTL3 CTL6 CTL3 CTL6 Setting of divider output Baud rate generator Setting of output frequency (a) CTL 1 to 6 : (b) OUT : (c) FOUT : (d) RESET : (e) TEST : (f) EXC (8640N only) : (g) CSEL (8640N only) : Programs dividing ratio. (pull-down resistor incorporated.) Output frequency preset by CTL1 to 6. (refer to the procedure for setting output frequency.) Constantly outputs the oscillation source frequency of builtin crystal unit. Stops output at RESET= “L”. (pull-up resistor incorporated.) Used for the input terminal for testing. When CTL4 is H, output will be 1000 times larger than the preset value at TEST= “H”. (pull-down resistor incorporated.) Serves as input terminal when using an external clock by changing to the builtin oscillator. Effective only when CSEL is H. When this terminal is made H, the external clock is selected. (pull-down resistor incorporated.) Treatment of empty terminals. When RESET terminal is not used, this should be connected to VDD, and when TEST terminal, CSEL terminal, and CTL 1 to 6 terminals are not used, to GND. (Note) (a) CLOCK: Clock input (max. 1 MHz) (b) ENABLE: Be sure to connect to V DD CTL1 CTL2 CTL3 Dividing ratio CTL4 CTL5 CTL6 Dividing ratio Set terminal CTL1 CTL2 CTL4 CTL5 600k 60k 300k 200k 150k 120k 100k 50k 60k 30k 20k 15k 12k 10k 600 1.5k 1.2k 500 600 300 200 150 120 100 6.0 0.6 3.0 2.0 1.5 1.2 1.0 0.5 0.6 0.06 0.3 0.2 0.15 0.12 0.1 0.05 0.06 0.006 0.03 0.02 0.015 0.012 0.01 0.005 Set terminal CTL1 CTL2 CTL4 CTL5 100k 500k 333.3k 250k 200k 166.6k 83.3k 100k 10k 50k 33.3k 25k 20k 16.6k 8.3k 10k 3.3k 2.5k 1.6k 833.3 100 500 333.3 250 200 166.6 83.3 100 33.3 16.6 8.3 3.33 2.5 1.6 0.83 Set terminal CTL1 CTL2 CTL4 CTL5 60k 30k 20k 15k 12k 10k 6.0k 600 3.0k 2.0k 1.5k 1.2k 1.0k 500 600 300 200 150 120 100 6.0 0.6 3.0 2.0 1.5 1.2 1.0 0.5 0.6 0.06 0.3 0.2 0.15 0.12 0.1 0.05 0.06 0.006 0.03 0.02 0.015 0.012 0.01 0.005 0.006 0.0006 0.003 0.002 0.0015 0.0012 0.001 0.0005 Set terminal CTL1 CTL2 CTL4 CTL5 100k 10k 50k 33.3k 25k 20k 16.6k 8.3k 10k 3.3k 2.5k 1.6k 833.3 100 500 333.3 250 200 166.6 83.3 100 33.3 16.6 8.3 3.33 2.5 1.6 0.83 Set terminal CTL1 CTL2 CTL4 CTL5 32768 3276.8 16384 10922.6 8192 6553.6 5461.3 2730.6 3276.8 327.68 1638.4 1092.26 819.2 655.36 546.13 273.06 327.68 32.768 163.84 109.226 81.92 65.536 54.613 27.306 32.768 3.276 16.384 10.922 8.192 6.553 5.461 2.730 3.276 0.327 1.638 1.092 0.819 0.655 0.546 0.273 0.3276 0.0327 0.1638 0.1092 0.0819 0.0655 0.0546 0.0273 0.03276 0.00327 0.01638 0.01092 0.00819 0.00655 0.00546 0.00273 0.00327 0.00032 0.00163 0.00109 0.00081 0.00065 0.00054 0.00027 CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 Output frequency 768 kHz 153.6 76.8 38.4 19.2 Baud rate output example (fo/16) 48000bits/sec. 9600 4800 2400 1200 CTL1 CTL2 CTL3 CTL4 CTL5 CTL6 Output frequency 96.0 kHz 19.2 9.6 4.8 3.2 2.4 1.6 0.8 Baud rate output example (to/16) 6000bits/sec. 1200 600 300 200 150 100 Note: Lower digits are omitted.

SEIKO EPSON CORP. QUARTZ DEVICE DIVISION acquired ISO9001 and ISO14001 certification ISO9001 in October, 1992. ISO14001 in November,1997. No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material of portions there may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. ENERGY SA VING EPSON Our concept of Energy Saving technology conserves resources by blending the essence of these three efficiency technologies. The essence of these technologies is repre- sented in each of the products that we provide to our cus- tomers. In the industrial sector, leading priorities include mea- sures to counter the greenhouse effect by reducing CO2, measures to preserve the global environ- ment, and the development of energy- efficient products. Environmental problems are of global concern, and although the contribution of energy- saving technology developed by EPSON may appear insignificant, we seek to contribute to the develop- ment of energy-saving products by our customers through the utilization of our electronic devices. EPSON is committed to the conservation of energy, both for the sake of people and of the planet on which we live. EPSON offers effective savings to its customers through a wide range of electronic devices, such as semiconductors, liquid crystal display (LCD) modules, and crystal devices. These savings are achieved through a sophisticated melding of three different efficiency technologies. Power saving technology provides low power con- sumption at low voltages. Space saving technology provides further reductions in product size and weight through super-precise pro- cessing and high-density assembly technology. Time saving technology shortens the time required for design and development on the customer side and shortens delivery times. Energy Saving Power Saving Space Saving Time Saving Resource Saving