SPF-2086TK SIRENZA | Alldatasheet

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Technical content

1 EDS-101225 Rev. D The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for i naccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at t he user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party . Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved. http://www.sirenza.comPhone: (800) SMI-MMIC303 S. Technology Court, Broomfield, CO 80021 02468 1 0 1 2 3v, 20mA 5v, 40mA Frequency (GHz) Gain, Gmax (dB) Typical Gain Performance Sirenza Microdevices’ SPF-2086TK is a high performance 0.25µm pHEMT Gallium Arsenide FET with Schottky barrier gates. This 300µm device is ideally biased at 3V,20mA for lowest noise performance and battery powered requirements. At 5V,40mA the device delivers excellent output TOI of 32 dBm. It provides ideal performance as driver stages in many commercial, industrial and military LNA applications. Product Description Gmax Gain SPF-2086TK Low Noise pHEMT GaAs FET 0.1 - 6 GHz Operation Product Features

  • 22 dB Gmax at 1.9 GHz
  • 0.4 dB FMIN at 1.9 GHz
  • +32 dBm Output IP3
  • +20 dBm Output Power at 1dB Compression

Applications

LNA for Analog and Digital Wireless Systems

  • 3G, Cellular, PCS
  • Fixed Wireless, Pager Systems
  • Driver Stage for low power applications lobmyS C°52=T,scitsiretcarahCeciveD V SD I,V3= QD )detonesiwrehtosselnu(Am02= noitidnoCtseT detseT%001=]1[ stinU .niM .pyT .xaM xamG niaGelbaliavAmumixaM ZS Z= S Z,* L Z= L* zHG9.0=f zHG9.1=f zHG0.4=f zHG0.6=f Bd Bd Bd Bd 2.52 8.12 7.81 5.31 S niaGnoitresnI ZS Z= L smhO05= ]1[zHG9.1=fB d0 .617 .714 .91 F NIM erugiFesioNmuminiM ZS=Γ TPO Z, L Z= TPOL zHG1=f zHG2=f zHG4=f zHG6=f Bd Bd Bd Bd 3.0 4.0 5.0 7.0 3PIO tnioPtpecretnIredrOdrihTtuptuO Z S Z= TPOS Z, L Z= TPOL V SD I,V0.5= QD Am04= V SD I,V0.3= QD Am02= mBd mBd Bd1P tnioPnoisserpmoCBd1tuptuO ZS Z= TPOS Z, L Z= TPOL V SD I,V0.5= QD Am04= V SD I,V0.3= QD Am02= mBd mBd I SSD tnerruCniarDdetarutaS V SD V= PSD V, SG V0= Am0 35 80 41 gm :ecnatcudnocnarT V SD V= PSD V, SG V52.0-= Sm- 2 11- VP :egatloVffO-hcniP VB SG egatloVnwodkaerBecruoS-ot-etaG I SG neponiard,Am3.0= ]1[V - 7 1-8 - VB DG egatloVnwodkaerBniarD-ot-etaG I DG V,Am3.0= SG V0.3-= ]1[V - 7 1-8 - htRd ael-ot-noitcnuj,ecnatsiseRlamrehT o W/C- 0 11-

http://www.sirenza.comPhone: (800) SMI-MMIC 2 EDS-101225 Rev. D 303 S. Technology Court, Broomfield, CO 80021 SPF-2086TK Low Noise FET Noise parameters, at typical operating frequencies FREQ HG Z FMIN Bd |GOPT| GOPT ANG rN W GA Bd Bias VDS=3.0V, IDS=20mA FREQ HG Z FMIN Bd |GOPT| GOPT ANG rN W GA Bd Bias VDS=5.0V, IDS=40mA Operation of this device beyond any one of these parameters may cause permanent damage. MTTF is inversely proportional to the device junction temperature. For junction temperature and MTTF considerations the operating conditions should also satisfy the following experssions: P DC - POUT < (TJ - TL) / RTH where: PDC = IDS * VDS (W) POUT = RF Output Power (W) TJ = Junction Temperature (°C) TL = Lead Temperature (pin 4) (°C) RTH = Thermal Resistance (°C/W) Absolute Maximum Ratings retemaraPl obmySe ulaVt inU niarDt nerruCI SD I SSD Am etaGdrawroFt nerruCI FSG 3.0A m tnerruCetaGesreveRI RSG 3.0A m ecruoS-ot-niarDe gatloVV SD 7+V niarD-ot-etaGe gatloVV DG 8-V ecruoS-ot-etaGe gatloVV SG 0>ro5-<V rewoPtupnIFRP NI 001W m erutarepmeTgnitarepOT PO 58+ot04-C ° egnaRerutarepmeTegarotST rots 051+ot04-C ° noitapissiDrewoPP SIDS 006W m erutarepmeTlennahCT J +051C °

http://www.sirenza.comPhone: (800) SMI-MMIC 3 EDS-101225 Rev. D 303 S. Technology Court, Broomfield, CO 80021 SPF-2086TK Low Noise FET Scattering Parameters: zHGqerF |11S| gnA11S |12S| gnA12S |21S| gnA21S |22S| gnA22S Typical S-parameters VDS=3.0V, IDS=20 mA Note : De-embedded to device pins

http://www.sirenza.comPhone: (800) SMI-MMIC 4 EDS-101225 Rev. D 303 S. Technology Court, Broomfield, CO 80021 SPF-2086TK Low Noise FET Scattering Parameters: zHGqerF |11S| gnA11S |12S| gnA12S |21S| gnA21S |22S| gnA22S Typical S-parameters VDS=5.0V, IDS=40 mA Note : De-embedded to device pins

http://www.sirenza.comPhone: (800) SMI-MMIC 5 EDS-101225 Rev. D 303 S. Technology Court, Broomfield, CO 80021 SPF-2086TK Low Noise FET Part Number Ordering InformationCaution: ESD sensitive Appropriate precautions in handling, packaging and testing devices must be observed. rebmuNtraPe ziSleeRl eeR/seciveD KT6802-FPS" 70 001 PCB Pad Layout niP noitangiseD 1e taG 2e cruoS 3n iarD 4e cruoS Package Dimensions Part Symbolization The part will be symbolized with the “P2T” designator and a dot signifying pin 1 on the top surface of the package. P2T P2T