SP8400 ZARLINK | Alldatasheet

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Technical content

Very Low Phase Noise Synthesiser Divider September 2005 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter. This gives a minimum division ratio of 56 (64 for fractional - N synthesis applications), and a maximum division ratio of 4103. Special circuit techniques have been used to reduce the phase noise considerably below that produced by standard dividers.The data inputs are CMOS or TTL compatible. The SP8400 is packaged in a 28 pin plastic SO package.

FEATURES

I Very low Phase Noise (Typically -156dBc/Hz at 1kHz offset) I Supply Voltage 5V ABSOLUTE MAXIMUM RATINGS Supply Voltage 6.5V Output Current 20mA Storage Temperature Range -55 °C to +125°C Maximum Clock Input Voltage 2.5V p-p MP28 Fig.1 Pin connections - top view 14 15 28M2 V CC +5V GND CLOCK INPUT CLOCK INPUT CLOCK INPUT GND VCC +5V VCC +5V GND N/C OUTPUT OUTPUT N/C VCC +5V N/C CLOCK INPUT Fig.2 Typical single sideband phase noise measured at 300MHz (f) (dBc/Hz) –3dB Frequency (Hz) –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 10 100 1k 10k 100k

Ordering Information

SP8400/KG/MPES 28 Pin SOIC Tubes SP8400/KG/MPFP 28 Pin SOIC* Tubes *Pb Free Matte Tin Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1997-2005, Zarlink Semiconductor Inc. All Rights Reserved.

Fig.3 Typical input sensitivity

ELECTRICAL CHARACTERISTICS

Guaranteed over: Supply voltage VCC = +4.75V to +5.25V Temperature Tamb = -10°C to +75°C Tested at +4.75V and +5.25V at Tamb = +25°C FREQUENCY MHz 400 300 200 100 0 200 400 600 800 1000 1200 1400 355mV 140mV 1600 500 600 OPERATING WINDOW Vin mV rms Min. Typ. Max. Supply current Output voltage swing Input sensitivity 200MHz to 1.5GHz Data Inputs Logic high voltage Low low voltage Input current 137 410 152 140 (-4) 0.8 180 122 320 2.2 4, 11, 12, 18 20, 21 7, 8 Output loaded with 300R See Fig.4 p-p @ 1.5GHz input ÷ 71 mode See Fig.4 RMS Sine wave into 50 Ohms (dBm equivalent) See Fig.3 5V Data input voltage mA mV mV dBm V V µA UnitsValue ConditionsCharacteristic Pin

Circuit description, synthesiser divider The divider is based on a divide by 8/9 modulus prescaler, and a 12 stage control counter. This gives minimum fractional – N division ratio of 64 (56 for general division), and a maximum division ratio of 4103. The inputs to the control counter are TTL/CMOS compatible. There is a fixed offset of 8 between the number on the data lines and the actual division ratio. The output is one transition only per divide cycle. This eliminates the problem of where to put the redundant edge when the divider is used in a fractional–N system, and also avoids the problem of how to define the output pulse width. This means that the overall division ratio conventionally de- fined in terms of the rate of edges of the same polarity is twice the selected division ratio. Fig.4 Test circuit 14 15 SP8400 10nF10nF1nF 1nF 2x330R 1nF RF TTL/CMOS MODULUS CONTROL TTL/CMOS MODULUS CONTROL VCC 50R 50R SIGNAL GENERATOR 220nF OUTPUT Equations for division The M and A data inputs form a 12 bit number with A0 being the least significant bit and M8 being the most significant bit. Definition 1: Division ratio – (input frequency to out put edges, positive or negative). = Number loaded + 8 Definition 2: Division ratio – (input frequency to out put frequency). = (Number loaded + 8) x 2

All division ratios of 64 to 4103 (Definition 1) will return the divider to the same internal state at the end of the count and hence these are the only divisional ratios to be used for fractional–N synthesiser application. All division ratios of 56 to 4103 are available for general division purposes. Additional division ratios available for general division are:- 8,9 16, 17, 18 24, 25, 26, 27 32, 33, 34, 35, 36 40, 41, 42, 43, 44, 45 48, 49, 50, 51, 52, 53, 54 Fig.5 Typical application combining output to increase signal and retain low phase noise 14 15 SP8400 10nF10nF1nF 1nF 2x330R 1nF M +5V 50R CLOCK INPUT INPUTS A INPUTS 10nF 330R +15V 2 x BF569 (or similar)

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