SP505 EXAR | Alldatasheet
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Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 The SP505 is a monolithic device that supports eight (8) popular serial interface standards for DTE to DCE connectivity. The SP505 is fabricated using a low power BiCMOS process technology, and incorporates a Sipex patented (5,306,954) charge pump allowing +5V only operation. Seven (7) drivers and seven (7) receivers can be configured via software for any of the above interface modes at any time. The SP505 requires no additional external components for compliant operation for all of the eight (8) modes of operation. All necessary termination is integrated within the SP505 and is switchable when V.35 drivers, V.35 receivers, and V. receivers are used. The SP505 can operate as either a DTE or DCE. Additional features with the SP505 include internal loopback that can be initiated in either single-ended or differential modes. While in loopback mode, driver outputs are internally connected to receiver inputs creating an internal signal path convenient for diagnostic testing. This eliminates the need for an external loopback plug. The SP505 also includes a latch enable pin with the driver and receiver address decoder. Tri-state ability for the driver and receiver outputs is controlled by supplying a 4-bit word into the address decoder. Seven (7) drivers and one () receiver in the SP505 include separate enable pins for added convenience. The SP505 is ideal for WAN serial ports in networking equipment such as routers, switches, DSU/CSU's, and other access devices. SP505 WAN Multi-Mode Serial Transceiver
DESCRIPTION
- +5V Only Operation
- Seven (7) Drivers and Seven (7) Receivers
- Driver and Receiver Tri-state Control
- Internal Transceiver Termination Resistors for V. and V.35 Protocols
- Loopback Self-Test Mode
- Software Selectable Protocol Selection
- Interface Modes Supported:
- EIA-530 (V.0 & V.) • EIA-530A (V.0 & V.)
- V.36 (V.0 & V.) • RS-485 (un-terminated V.)
- Improved ESD Tolerance for Analog I/Os
- High Differential Transmission Rates
- SP505A - 0Mbps
- SP505B - over 6Mbps
- Compliant to NET/2 and TBR2 Physical Layer Requirements (TUV Test Report NET2/0520/98) (TUV Test Report CTR2/0520/98) EIA-530 WAN V.35 RxD 1 SDEN 2 TREN 3 RSEN 4 LLEN 5 TTEN 6 SCTEN 7 LATCH 8 DEC3 9 DEC2 10 DEC1 11 DEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 RLEN 18 DCD 19 RxC 20 RI 21 ST 22 STEN 23 LL 24 VCC 25 C1+ 26 VDD 27 C2+ 28 GND 29 C1– 30 C2– 31 VSS 32 VCC 33 GND 34 RR(a) 35 RR(b) 36 RT(a) 37 RT(b) 38 IC(a) 39 IC(b) 40
60 GND
59 SD(b)
58 TR(a)
57 GND
56 TR(b)
55 VCC
54 RS(a)
53 GND
52 RS(b)
51 LL(a)
50 GND
49 LL(b)
48 VCC
47 RL(a)
46 GND
45 RL(b)
44 ST(b)
43 GND
42 ST(a)
41 VCC
80 CTS
79 SCT
78 DSR
77 SCT(b)
76 SCT(a)
75 GND
74 VCC
73 VCC
72 GND
71 RD(b)
70 RD(a)
69 DM(b)
68 DM(a)
67 CS(b)
66 CS(a)
65 TT(b)
64 GND
63 TT(a)
62 VCC
61 SD(a)
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Input Voltages: Output Voltages: Package Derating: STORAGE CONSIDERATIONS Due to the relatively large package size of the 80-pin quad flat-pack, storage in a low humidity environment is preferred. Large high density plastic packages are moisture sensitive and should be stored in Dry Vapor Barrier Bags. Prior to usage, the parts should remain bagged and stored below 40°C and 60%RH. If the parts are removed from the bag, they should be used within 48 hours or stored in an environment at or below 20%RH. If the above conditions cannot be followed, the parts should be baked for four hours at 25°C in order remove moisture prior to soldering. Exar ships the 80-pin QFP in Dry Vapor Barrier Bags with a humidity indicator card and desiccant pack. The humidity indicator should be below 30%RH. ABSOLUTE MAXIMUM RATINGS PARAMETER MIN TYP MAX UNITS CONDITIONS LOGIC INPUTS VIL 0.8 Volts VIH 2.0 Volts LOGIC OUTPUTS VOL 0.4 Volts IOUT = -3.2mA VOH 2.4 Volts IOUT = .0mA V.28 DRIVER OUTPUT DC PARAMETERS Open Circuit Voltage +/-5 Volts Per Figure Loaded Voltage +/-5.0 +/-5 Volts Per Figure 2 Short-Circuit Current +/-00 mA Per Figure 4 Power-Off Impedance 300 Ω Per Figure 5 V.28 DRIVER OUTPUT AC PARAMETERS (Vcc = +5V for AC Parameters) Transition Time .5 µs Per Figure 6; +3V to -3V Instantaneous Slew Rate 30 V/ µs Per Figure 3 Propagation Delay tPHL 0.5 5 µs Propagation Delay tPLH 0.5 5 µs Max. Transmission Rate 20 230 kbps V.28 RECEIVER INPUT DC PARAMETERS Input impedance 3 7 kΩ Per Figure 7 Open-Circuit Bias +2.0 Volts Per Figure 8 HIGH Threshold .7 3.0 Volts LOW Threshold 0.8 .2 Volts
ELECTRICAL CHARACTERISTICS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.28 RECEIVER AC PARAMETERS (Vcc = +5V for AC Parameters) Propagation Delay tPHL 50 00 500 ns Propagation Delay tPLH 50 00 500 ns Max Transmission Rate 20 230 kbps V.10 DRIVER OUTPUT DC PARAMETERS Open Circuit Voltage +/-4.0 +/-6.0 Volts Per Figure 9 Test Terminated Voltage 0.9Vcc Volts Per Figure 0 Short-Circuit Current +/-50 mA Per Figure Power-Off Current +/-00 mA Per Figure 2 V.10 DRIVER AC PARAMETERS (Vcc = +5V for AC Parameters) Transition Time 200 ns Per Figure 3; 0% to 90% Propagation Delay tPHL 50 00 500 ns Propagation Delay tPLH 50 00 500 ns Max Transmission Rate 20 230 kbps V.10 RECEIVER INPUT DC PARAMETERS Input Current -3.25 +3.25 mA Per Figures 4 and 5 Input Impedance 4 kΩ Sensitivity +/-0.3 Volts V.10 RECEIVER AC PARAMETERS (Vcc = +5V for AC Parameters) Propagation Delay tPHL 50 20 250 ns Propagation Delay tPLH 50 20 250 ns Max Transmission Rate 20 kbps V.11 DRIVER OUTPUT DC PARAMETERS Open Circuit Voltage +/-5.0 Volts Per Figure 6 Test Terminated Voltage +/-2.0 Volts Per Figure 7 0.5VOC 0.67VOC Volts Per Figure 7 Balance +/-0.4 Volts Per Figure 7 Offset +3.0 Volts Per Figure 7 Short-Circuit Current +/-50 mA Per Figure 8 Power-Off Current +/-00 µA Per Figure 9 V.11 DRIVER OUTPUT AC PARAMETERS (Vcc = +5V for AC Parameters) Transition Time 20 ns Per Figures 2 and 36; 0% to 90% Propagation Delay tPHL 50 85 0 ns Per Figures 33 and 36; CL = 50pF Propagation Delay tPLH 50 85 0 ns Per Figures 33 and 36; CL = 50pF Differential Skew 0 20 ns Per Figures 33 and 36; CL = 50pF Max. Transmission Rate SP505ACM-L 0 2 Mbps Per Figure 33; CL = 50pF, fIN = 5MHz Max. Transmission Rate SP505BCM-L 6.4 8 Mbps Per Figure 33; CL = 50pF, fIN = 8.2MHz
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. PARAMETER MIN TYP MAX UNITS CONDITIONS V.11 RECEIVER INPUT DC PARAMETERS Common Mode Range -7 +7 Volts Sensitivity +/-0.3 Volts Input Current -3.25 +3.25 mA Per Figures 20 and 22 Current w/ 100Ω Termination +/-60.75 mA Per Figures 23 and 24 Input Impedance 4 kΩ V.11 RECEIVER INPUT AC PARAMETERS (Vcc = +5V for AC Parameters) Propagation Delay tPHL 80 0 30 ns Per Figures 33 and 38; CL = 50pF Propagation Delay tPLH 80 0 30 ns Per Figures 33 and 38; CL = 50pF Differential Skew 20 ns Per Figures 33; CL = 50pF Max. Transmission Rate SP505ACM-L 0 2 Mbps Per Figure 33; CL = 50pF, fIN = 5MHz Max. Transmission Rate SP505BCM-L 6.4 8 Mbps Per Figure 33; CL = 50pF, fIN = 8.2MHz V.35 DRIVER OUTPUT DC PARAMETERS Open Circuit Voltage +/-.20 Volts Per Figure 6 Test Terminated Voltage +/-0.44 +/-0.66 Volts Per Figure 25 Offset +/-0.6 Volts Per Figure 25 Source Impedance 50 50 Ω Per Figure 27; ZS = V2/V x 50 Ω Short Circuit Impedance 35 65 Ω Per Figure 28 V.35 DRIVER OUTPUT AC PARAMETERS (Vcc = +5V for AC Parameters) Transition Time 30 40 ns Per Figure 29; 0% to 90% Propagation Delay tPHL 50 90 0 ns Per Figures 33 and 36; CL = 20pF Propagation Delay tPLH 50 90 0 ns Per Figures 33 and 36; CL = 20pF Differential Skew 20 30 ns Per Figure 33; CL = 20pF Max. Transmission Rate SP505ACM-L 0 2 Mbps Per Figure 33; CL = 20pF, fIN = 5MHz Max. Transmission Rate SP505BCM-L 6.4 8 Mbps Per Figure 33; CL = 20pF, fIN = 8.2MHz V.35 RECEIVER INPUT DC PARAMETERS Sensitivity +/-80 mV Source Impedance 90 0 Ω Per Figure 30; ZS = V2/V x 50 Ω Short Circuit Impedance 35 65 Ω Per Figure 3 V.35 RECEIVER INPUT AC PARAMETERS (Vcc = +5V for AC Parameters) Propagation Delay tPHL 80 0 30 ns Per Figures 33 and 38; CL = 20pF Propagation Delay tPLH 80 0 30 ns Per Figures 33 and 38; CL = 20pF Differential Skew 20 ns Per Figures 33; CL = 20pF Max. Transmission Rate SP505ACM-L 0 2 Mbps Per Figure 33; CL = 20pF, fIN = 5MHz Max. Transmission Rate SP505BCM-L 6.4 8 Mbps Per Figure 33; CL = 20pF, fIN = 8.2MHz
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 AC CHARACTERISTICS PARAMETER MIN. TYP. MAX. UNITS CONDITIONS TRANSCEIVER LEAKAGE CURRENTS Driver Output 3-state Current 00 500 µA Per Figure 32; Drivers disabled Receiver Output 3-state Current 0 µA DECX = 0000, 0.4V ≤ VO ≤ 2.4V PARAMETER MIN. TYP. MAX. Units CONDITIONS DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.70 5.0 µs CL = 00pF, Fig. 34 & 40; S1 closed tPZH; Tri-state to Output HIGH 0.40 2.0 µs CL = 00pF, Fig. 34 & 40; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 00pF, Fig. 34 & 40; S1 closed tPHZ; Output HIGH to Tri-state 0.40 2.0 µs CL = 00pF, Fig. 34 & 40; S2 closed RS-423/V.10 tPZL; Tri-state to Output LOW 0.5 2.0 µs CL = 00pF, Fig. 34 & 40; S1 closed tPZH; Tri-state to Output HIGH 0.20 2.0 µs CL = 00pF, Fig. 34 & 40; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 00pF, Fig. 34 & 40; S1 closed tPHZ; Output HIGH to Tri-state 0.5 2.0 µs CL = 00pF, Fig. 34 & 40; S2 closed RS-422/V.11 tPZL; Tri-state to Output LOW 2.80 0.0 µs CL = 00pF, Fig. 34 & 37; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 37; S1 closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 37; S2 closed V.35 tPZL; Tri-state to Output LOW 2.60 0.0 µs CL = 00pF, Fig. 34 & 37; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 37; S1 closed tPHZ; Output HIGH to Tri-state 0.5 2.0 µs CL = 5pF, Fig. 34 & 37; S2 closed RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.2 2.0 µs CL = 00pF, Fig. 35 & 38; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S1 closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S2 closed RS-423/V.10 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S1 closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 35 & 38; S2 closed TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted. TA = +25°C and VCC = +5.0V unless otherwise noted.
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 AC CHARACTERISTICS TA = +25°C and VCC = +5.0V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE (Continued) RS-422/V.11 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 35 & 39; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 35 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 35 & 39; S1 closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 35 & 39; S2 closed V.35 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 35 & 39; S1 closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 35 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 35 & 39; S1 closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 35 & 39; S2 closed TRANSCEIVER TO TRANSCEIVER SKEW (per Figures 33, 36 and 38) V.28 Driver 00 ns | (tPHL)Tx1 - (tPHL)Tx6,7 | V.28 Driver 00 ns | (tPLH)Tx1 - (tPLH)Tx6,7 | V.28 Receiver 20 ns | (tPHL)Rx1 - (tPHL)Rx2,7 | V.28 Receiver 20 ns | (tPLH)Rx1 - (tPLH)Rx2,7 | V. Driver 2 ns | (tPHL)Tx1 - (tPHL)Tx6,7 | V. Driver 2 ns | (tPLH)Tx1 - (tPLH)Tx6,7 | V. Receiver 3 ns | (tPHL)Rx1 - (tPHL)Rx2,7 | V. Receiver 3 ns | (tPLH)Rx1 - (tPLH)Rx2,7 | V.0 Driver 5 ns | (tPHL)Tx2 - (tPHL)Tx3,4,5 | V.0 Driver 5 ns | (tPLH)Tx2 - (tPLH)Tx3,4,5 | V.0 Receiver 5 ns | (tPHL)Rx2 - (tPHL)Rx3,4,5 | V.0 Receiver 5 ns | (tPLH)Rx2 - (tPLH)Rx3,4,5 | V.35 Driver 4 ns | (tPHL)Tx1 - (tPHL)Tx6,7 | V.35 Driver 4 ns | (tPLH)Tx1 - (tPLH)Tx6,7 | V.35 Receiver 6 ns | (tPHL)Rx1 - (tPHL)Rx2,7 | V.35 Receiver 6 ns | (tPLH)Rx1 - (tPLH)Rx2,7 | PARAMETER MIN. TYP. MAX. UNITS CONDITIONS VCC 4.75 5.00 5.25 Volts ICC (No Mode Selected) 30 mA All ICC values are with Vcc = +5V, T = 25°C, all drivers loaded to their specified maximum load and all drivers are active at their maximum specified data transmission rates ICC (V.28/RS-232) 60 mA ICC (V./RS-422) 300 mA ICC (RS-449) 250 mA ICC (V.35) 05 mA ICC (EIA-530) 260 mA ICC (EIA-530A) 250 mA ICC (V.36) 65 mA POWER REQUIREMENTS
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 PINOUT… PIN ASSIGNMENTS… CLOCK AND DATA GROUP Pin — RxD — Receive Data; TTL output, sourced from RD(a) and RD(b) inputs. Pin 4 — TxD — TTL input ; transmit data source for SD(a) and SD(b) outputs. Pin 5 — TxC — Transmit Clock; TTL input for TT driver outputs. Pin 20 — RxC — Receive Clock; TTL output sourced from RT(a) and RT(b) inputs. Pin 22 — ST — Send Timing; TTL input; source for ST(a) and ST(b) outputs. Pin 37 — RT(a) — Receive Timing; analog input, inverted; source for RxC. Pin 38 — RT(b) — Receive Timing; analog input, non-inverted; source for RxC. Pin 42 — ST(a) — Send Timing; analog output, inverted; sourced from ST. Pin 44 — ST(b) — Send Timing; analog output, non-inverted; sourced from ST. Pin 59 — SD(b) — Analog Out — Send data, non-inverted; sourced from TxD. Pin 6 — SD(a) — Analog Out — Send data, inverted; sourced from TxD. Pin 63 — TT(a) — Analog Out — Terminal Timing, inverted; sourced from TxC Pin 65 — TT(b) — Analog Out — Terminal Timing, non–inverted; sourced from TxC. Pin 70 — RD(a) — Receive Data, analog input; inverted; source for RxD. Pin 7 — RD(b) — Receive Data; analog input; non-inverted; source for RxD. Pin 76 — SCT(a) — Serial Clock Transmit; analog input, inverted; source for SCT. Pin 77 — SCT(b) — Serial Clock Transmit: analog input, non–inverted; source for SCT Pin 79 — SCT — Serial Clock Transmit; TTL output; sources from SCT(a) and SCT(b) inputs. CONTROL LINE GROUP Pin 3 — DTR — Data Terminal Ready; TTL input; source for TR(a) and TR(b) outputs. Pin 6 — RTS — Ready To Send; TTL input; source for RS(a) and RS(b) outputs. Pin 7 — RL — Remote Loopback; TTL input; source for RL(a) and RL(b) outputs. Pin 9 — DCD— Data Carrier Detect; TTL output; sourced from RR(a) and RR(b) inputs. Pin 2 — RI — Ring In; TTL output; sourced from IC(a) and IC(b) inputs. Pin 24 — LL — Local Loopback; TTL input; source for LL(a) and LL(b) outputs. Pin 35 — RR(a)— Receiver Ready; analog input, inverted; source for DCD. Pin 36 — RR(b)— Receiver Ready; analog input, non-inverted; source for DCD. Pin 39 — IC(a)— Incoming Call; analog input, inverted; source for RI. Pin 40 — IC(b)— Incoming Call; analog input,non-inverted; source for RI. RxD 1 SDEN 2 TREN 3 RSEN 4 LLEN 5 TTEN 6 SCTEN 7 LATCH 8 DEC3 9 DEC2 10 DEC1 11 DEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 RLEN 18 DCD 19 RxC 20 RI 21 ST 22 STEN 23 LL 24 VCC 25 C1+ 26 VDD 27 C2+ 28 GND 29 C1– 30 C2– 31 VSS 32 VCC 33 GND 34 RR(a) 35 RR(b) 36 RT(a) 37 RT(b) 38 IC(a) 39 IC(b) 40
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 Pin 7 — SCTEN — Enables SCT receiver; active high; TTL input. Pin 8 — LATCH — Latch control for decoder bits (pins 9-2), active low. Logic high input will make decoder transparent. Pins 2–9 — DEC0 – DEC3 — Transmitter and receiver decode register; configures trans- mitter and receiver modes; TTL inputs. Pin 8 — RLEN — Enables RL driver; active low; TTL input. Pin 23 — STEN — Enables ST driver; active low; TTL input. POWER SUPPLIES Pins 25, 33, 4, 48, 55, 62, 73, 74 — V CC — +5V input. Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 — GND — Ground. Pin 27 — VDD +0V Charge Pump Capacitor — Connects from V DD to V CC. Suggested capacitor size is 22µF, 6V. Pin 32 — VSS –0V Charge Pump Capacitor — Connects from ground to VSS. Suggested capacitor size is 22µF, 6V. Pins 26 and 30 — C + and C – — Charge Pump Capacitor — Connects from C + to C Suggested capacitor size is 22µF, 6V. Pins 28 and 3 — C 2 + and C2 – — Charge Pump Capacitor — Connects from C2 + to C2 Suggested capacitor size is 22µF, 6V. Pin 45 — RL(b) — Remote Loopback; analog output, non-inverted; sourced from RL. Pin 47 — RL(a) — Remote Loopback; analog output inverted; sourced from RL. Pin 49— LL(b) — Local Loopback; analog output, non-inverted; sourced from LL. Pin 5 — LL(a) — Local Loopback; analog output, inverted; sourced from LL. Pin 52 — RS(b) — Ready To Send; analog output, non-inverted; sourced from RTS. Pin 54 — RS(a) — Ready To Send; analog output, inverted; sourced from RTS. Pin 56 — TR(b) — Terminal Ready; analog output, non-inverted; sourced from DTR. Pin 58 — TR(a) — Terminal Ready; analog output, inverted; sourced from DTR. Pin 66 — CS(a)— Clear To Send; analog input, inverted; source for CTS. Pin 67 — CS(b)— Clear To Send; analog input, non-inverted; source for CTS. Pin 68 — DM(a)— Data Mode; analog input, inverted; source for DSR. Pin 69 — DM(b)— Data Mode; analog input, non-inverted; source for DSR Pin 78 — DSR— Data Set Ready; TTL output; sourced from DM(a), DM(b) inputs. Pin 80 — CTS— Clear To Send; TTL output; sourced from CS(a) and CS(b) inputs. CONTROL REGISTERS Pins 2 — SDEN — Enables TxD driver, active low; TTL input. Pins 3 — TREN — Enables DTR driver, active low; TTL input. Pins 4 — RSEN — Enables RTS driver, active low; TTL input. Pins 5 — LLEN — Enables LL driver, active low; TTL input. Pin 6 — TTEN — Enables TT driver, active low; TTL input.
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 a load of 00Ω. The signal levels and drive capability of these drivers allow the drivers to also support RS-485 requirements of ±.5V minimum differential output levels with a 54Ω load. The driver is designed to operate over a common mode range of +2V to -7V, which follows the RS-485 specification. This also covers the +7V to -7V common mode range for V. (RS-422) requirements. The V. drivers are used in RS-449, EIA-530, EIA- 530A and V.36 modes as Category I signals which are used for clock and data signals. V.35 Drivers The fourth type of driver is the V.35 driver. These drivers were specifically designed to comply with the requirements of V.35. Unique to the industry, the Sipex's V.35 driver architecture used in the SP505 does not need external termination resistors to operate and comply with V.35. This simpli- fies existing V.35 implementations that use external termination schemes. The V.35 drivers can produce +0.55V driver output signals with minimum deviation (maximum 20%) given an equivalent load of 00Ω. With the help of internal resistor networks, the drivers achieve the 50Ω to 50Ω source impedance and the 35Ω to 65Ω short-cir- cuit impedance for V.35. The V.35 driver is disabled and transparent when the decoder is in all other modes. All of the differential drivers; V. (RS-422) and V.35, can operate over 0Mbps. Driver Enable and Input All the drivers in the SP505 contain individual enable lines which can tri-state the driver out- puts when a logic "" is applied. This simpli- fies half-duplex configurations for some appli- cations and also provides simpler DTE/DCE flexibility with one integrated circuit. The driver inputs are both TTL or CMOS compatible. Each driver input should have a pull-down or pull-up resistor so that the out- put will be at a defined state. Unused driver inputs should not be left floating. Receivers The SP505 has seven (7) independent re - ceivers which can be programmed for the different interface modes. Control for the Drivers The SP505 has seven (7) enhanced in - dependent drivers. Control for the mode selection is done via a four–bit control word. The drivers are prearranged such that for each mode of operation, the relative posi - tion and functionality of the drivers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the requirements of clock, data, and control line signal levels. Table shows the mode of each driver in the different interface modes that can be selected. There are four basic types of driver circuits V.28 Drivers The V.28 drivers output single–ended signals with a minimum of +5V (with 3kΩ & 2500pF loading), and can operate to at least 20kbps under full load. Since the SP505 uses a charge pump to generate the RS-232 output rails, the driver outputs will never exceed +0V. The V.28 drivers are used in RS-232 mode for all signals, and also in V.35 mode where four (4) drivers are used as the control line signals (DTR, RTS, LL, and RL). V.10 Drivers The V.0 (RS-423) drivers are also single– ended signals which produce open circuit VOL and VOH measurements of +4.0V to +6.0V. When terminated with a 450Ω load to ground, the driver output will not deviate more than 0% of the open circuit value. This is in compliance of the ITU V.10 specification. The V.0 drivers are used in RS-449, EIA- 530, EIA-530A and V.36 modes as Category II signals from each of their corresponding specifications. V.11 Drivers The third type of driver is a V. (RS-422) type differential driver. Due to the nature of differential signaling, the drivers are more immune to noise as opposed to single-ended transmission methods. The advantage is evi- dent over high speeds and long transmission lines. The strength of the driver outputs can produce differential signals that can maintain typically +2.2V differential output levels with
interface modes that can be selected. of +5V and can receive signals down to +3V. RS-232 and V.28 over a +5V input range. can operate to at least 20kbps. 4KΩ, with an operating voltage range of +7V. corresponding specifications. which supports V. and RS-485 signals. of +200mV, which complies with the V. operating mode not using V. receivers. forward biasing and other parasitic affects. receivers can operate over 0Mbps. Figure 51. Simplified RIN Termination Circuit
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 Receiver Enable and Output Only one receiver includes an enable line. The SCTEN input for the SCT receiver can enable or tri-state the output of the receiver. When the pin is at a logic "0", the receiver output is high impedance and any input termination internal connected is switched off. The inputs will be at approximately 0kΩ during tri-state. All receivers include a fail-safe feature that outputs a logic "" when the receiver inputs are open. The differential receivers allocated for data and clock signals (RxD, RxC, and SCT) have advanced fail-safe that outputs a logic "" when the inputs are either open, shorted, or terminated. Other discrete or integrated implementations require external pull-up and pull-down resistors to define the receiver output state. For single-ended V.28 receivers, there are internal 5kΩ pull-down resistors on the inputs which produces a logic high ("") at the receiver outputs. The single-ended V.0 receivers produce a logic LOW ("0") on the output when the inputs are open. This is due to an internal pull-up device connected to the input. The differential re- ceivers have the same internal pull-up device on the non-inverting input which produces a logic HIGH ("") at the receiver output, representing an "OFF" state to the HDLC controller. The three differential receivers when configured in V.35 mode (RxD, RxC & SCT) will also include fail-safe even when the internal termination resistor network is connected and the inputs are either shorted or floating. Decoder The SP505 has the ability to change the interface mode of the drivers or receivers via a 4–bit switch. The decoder for the driv- ers and receivers can be latched through a control pin. The control word can be latched either high or low to write the appropriate code into the SP505. The codes shown in Tables and 2 are the only specified, valid modes for the SP505. Undefined codes may represent other interface modes not specified (consult the factory for more information). The drivers and receivers are controlled with the data bits labeled DEC3–DEC0. All of the drivers outputs and receiver outputs can be put into tri-state mode by writing 0000 to the driver decode switch. All internal termination networks are switched off during this mode. Individual tri-state capability is possible for all drivers through each driver's own enable control input. The SCT receiver also contains an individual enable input. When this control pin is disabled (logic "0"), the V. and V.35 input termination is deactivated. The 0000 decoder word will override the enable control line for the one receiver (SCT). The SP505 contains internal loopback ca - pabilities for self-diagnostic tests. Loopback is enabled through the decoder. To initiate single-ended mode loopback, the decoder word is 00. To initiate differential mode loopback, the decoder word is 0. The minimum transmission rates into the SP505 under loopback conditions are 20kbps for single-ended mode and 5Mbps for differential mode. The driver outputs are tri-stated and the receiver inputs are disabled during loop- back. The receiver input impedance during loopback is approximately 0kΩ. The SP505 is equipped with a latch control for the four (4) decoder bits. The latch control pin is pin 8 of the SP505. The latch control is active low, a logic low on pin 8 will latch the decoder signals. A logic "" on pin 8 will force the latch to be transparent to the user. A pulse width of at least 30ns is required to latch the decoder for the next mode. The resultant output is typically 600ns after the latch control pin is toggled assuming that the decoder word is set. NET1/2 & TBR2 European Compliancy As with all of Sipex's previous multi-proto - col serial transceiver ICs, the drivers and receivers have been designed to meet all the requirements to NET/2. The SP505 is internally tested to all the NET/2 physical layer testing parameters and the ITU Series V specifications. With the emergence of ETSI TBR2 (Technical Basis for Regulation) document now in place as an alternative for European compliancy, Sipex has tested the SP505 to TBR2 speci- fications to ensure "CE" approval for either testing method.
Table 2. SP505 Receiver Decoder Table
Figure 52. SP505 Typical Operating Circuit
14 TxD
2 SDEN
23 STEN
15 TxC
6 TTEN
13 DTR
3 TREN
16 RTS
4 RSEN
18 RLEN
5 LLEN
Figure 53. Mode Diagram — RS-232
Figure 54. Mode Diagram — V.35
Figure 55. Mode Diagram — RS-422
16 RT S
Figure 56. Mode Diagram — RS-449
Figure 57. Mode Diagram — RS-422 w/o termination
Figure 58. Mode Diagram — EIA-530
Figure 59. Mode Diagram — EIA-530A
Figure 60. Mode Diagram — V.36
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 LOOPBACK MODE... The SP505 is equipped with two loopback modes. Single-ended loopback internally connects V.28 driver outputs to V.28 receiver inputs. The signal path is non-inverting and will support data rates up to 20kbps. The propagation delay times are as specified in the electrical specifications. To initiate a single-ended loopback, the code "00" should be written to the driver decoder. Differential loopback is implemented by applying "0" to the driver decoder. This internally connects V. driver outputs to V. receiver inputs. The signal path again is non-inverting; the differential loopback data rate can be at least 5Mbps. Under loopback conditions the receiver decoder is disabled. While the SP505 is in either single-ended or differential loopback mode, the driver outputs are tri-stated and the receiver inputs are disabled. Mode Driver Output Receiver Input Driver Receiver non-inverting inverting non-inverting inverting Input Output Loopback DEC = 1010 tri-state tri-state >10KΩ to GND >10KΩ to GND active active DEC = 1011 tri-state tri-state >10KΩ to GND >10KΩ to GND active active Power down clamped VCC=VDD=VSS=0V tri-state tri-state >10KΩ to GND >10KΩ to GND inactive at ±0.6V Tri-state DEC = 0000 tri-state tri-state >10KΩ to GND >10KΩ to GND inactive tri-state MODE: Differential Loopback DRIVER/RECEIVER DEC3 DEC2 DEC1 DEC0 RD(a) 70 RxD 1 RT(a) 37 RxC 20 SCT(a) 76 SCT 79 SCTEN 7 SCT(b) 77 CS(a) 66 CTS 80 RR(a) 35 DCD 19 RR(b) 36 CS(b) 67 RT(b) 38 RD(b) 71 1 0 1 1 24 LL IC(a) 39 RI 21 IC(b) 40 DM(a) 68 DSR 78 DM(b) 69 IC(a) 39 RI 21 SCTEN 7 RECEIVERS DRIVERS 1 0 1 0 24 LL DM(a) 68 DSR 78 RR(a) 35 DCD 19 CS(a) 66 CTS 80 RD(a) 70 RxD 1 RT(a) 37 RxC 20 SCT(a) 76 SCT 79 MODE: Single-Ended Loopback DRIVER/RECEIVER DEC3 DEC2 DEC1 DEC0
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308 PACKAGE: 80 PIN LQFP
Exar Coporation 48720 Kato Road, Fremont CA, 94538 • (50) 668-7000 • Fax (50) 668-707 • www.exar.com SP505_00_08308
ORDERING INFORMATION
Model Temperature Range Package Types Notice EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliabil- ity. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2008 EXAR Corporation Datasheet August 2008 Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Date REVISION DESCRIPTION 2-24-05 --- Legacy Sipex Data Sheet 8-3-08 .0.0 SP505A/SP505B are no longer available in MQFP package per PCN 07-02-06a. Device is now only available in LQFP package. Package drawing and ordering information have been updated. Changed to Exar data sheet format and revi- sion to .0.0.