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SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation ■ Single Chip Programmable Serial Transceiver ■ Seven (7) Drivers and Seven (7) Receivers ■ Software-Selectable Industry Standard Protocols: — RS-232 (V.28) — EIA-530 — RS-449 — RS-485 — V.35 ■ Independant Driver and Receiver Mode Selection ■ +5V Single Power Supply Operation ■ Surface Mount Packaging SP503 Charge Pump Receiver Decode Driver Decode ReceiversDrivers

DESCRIPTION

The SP503 is a highly integrated serial transceiver that allows software control of its interface modes. It offers hardware interface modes for RS-232 (V.28), RS-422A (V.11), RS-449, RS-485, V.35, and EIA-530. The SP503 is fabricated using low–power BiCMOS process technology, and incorporates a Exar patented (5,306,954) charge pump allowing +5V only operation. Now Available in Lead Free Packaging RxD 1 RDEC0 2 RDEC1 3 RDEC2 4 RDEC3 5 TTEN 6 SCTEN 7 VCC 8 TDEC3 9 TDEC2 10 TDEC1 11 TDEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 NC 18 DCD 19 RxC 20 RI 21 ST 22 STEN 23 LL 24 VCC 25 C1+ 26 VDD 27 C2+ 28 GND 29 C1– 30 C2– 31 VSS 32 VCC 33 GND 34 RR(a) 35 RR(b) 36 RT(a) 37 RT(b) 38 IC(a) 39 IC(b) 40

60 GND

59 SD(b)

58 TR(a)

57 GND

56 TR(b)

54 RS(a)

53 GND

52 RS(b)

51 LL(a)

50 GND

49 LL(b)

47 RL(a)

46 GND

45 RL(b)

44 ST(b)

43 GND

42 ST(a)

80 CTS

79 SCT

78 DSR

77 SCT(b)

76 SCT(a)

75 GND

73 VCC

72 GND

71 RD(b)

70 RD(a)

69 DM(b)

68 DM(a)

67 CS(b)

66 CS(a)

65 TT(b)

64 GND

63 TT(a)

61 SD(a)

ELECTRICAL CHARACTERISTICS

TMIN to TMAX @ Vcc = +5V ±5% unless otherwise noted. MIN. TYP. MAX. UNITS CONDITIONS V.35 RECEIVER TTL Output Levels VOL 0.4 Volts VOH 2.4 Volts Input Receiver Sensitivity ±0.2 Volts Input Impedance 90 100 110 Ω With termination network in Figure 6. Short Circuit Impedance 135 150 165 Ω With termination network in Figure 6. Maximum Transmission Rate 5 Mbps Propagation Delay t PHL 200 ns tPLH 200 ns RS-422 DRIVER TTL Input Levels VIL 0.8 Volts VIH 2.0 Volts Outputs Differential Output ±2.0 ±5.0 Volts R L=100Ω Open Circuit Voltage,VO ±6.0 Volts Balance ±0.4 Volts |V T| – |VT| Offset +3.0 Volts Short Circuit Current ±150 mA V OUT=0V Power Off Current ±100 µA V cc = 0V, Vout = ±0.25V Transition Time 60 ns Rise/fall time, 10%-90% Maximum Transmission Rate 5 Mbps R L=100Ω Propagation Delay t PHL 200 ns R L=100Ω tPLH 200 ns R L=100Ω RS-422 RECEIVER TTL Output Levels VOL 0.4 Volts VOH 2.4 Volts Input HIGH Threshold +0.2 +6.0 Volts (a)-(b) LOW Threshold –6.0 –0.2 Volts (a)-(b) Common Mode Range –7.0 +7.0 Volts HIGH Input Current Refer to graph LOW Input Current Refer to graph Receiver Sensitivity ±0.2 Volts V CM=+7V to -7V Input Impedance 4 k Ω VCM=+10V to -10V Maximum Transmission Rate 5 Mbps Propagation Delay t PHL 200 ns tPLH 200 ns RS-232 DRIVER TTL Input Level VIL 0.8 Volts VIH 2.0 Volts Outputs HIGH Level Output +5.0 +15 Volts R L=3kΩ, VIN=0.8V, Vcc = 5V LOW Level Output –15.0 –5.0 Volts R L=3kΩ, VIN=2.0V, Vcc = 5V Open Circuit Voltage –15 +15 Volts Short Circuit Current ±100 mA V OUT=0V Power Off Impedance 300 Ω Vcc = 0V, Vout = ±2.0V

SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation TMIN to TMAX @ Vcc = +5V ±5% unless otherwise noted. MIN. TYP. MAX. UNITS CONDITIONS Slew Rate 30 V/µs R L=3kΩ, CL=15pF Transition Time 1.56 µs R L=3kΩ, CL=2500pF Maximum Transmission Rate 120 kbps R L=3kΩ, CL=2500pF Propagation Delay t PHL 28 µ s R L=3kΩ tPLH 28 µ s R L=3kΩ RS-232 RECEIVER TTL Output Levels VOL 0.4 Volts VOH 2.4 Volts Input HIGH Threshold 1.7 2.4 Volts LOW Threshold 0.8 1.2 Volts Receiver Open Circuit Bias +2.0 Volts Input Impedance 3 5 7 k Ω V IN=+15V to -15V Maximum Transmission Rate 120 kbps Propagation Delay t PHL 1µ s tPLH 1µ s RS-423 DRIVER TTL Input Levels VIL 0.8 Volts VIH 2.0 Volts Output Open Circuit Voltage ±4.0 ±10.0 Volts HIGH Level Output +3.6 +6.0 Volts R L=550Ω LOW Level Output –6.0 –3.6 Volts R L=550Ω Short Circuit Current ±150 mA V OUT=0V Power Off Current ±100 µA V cc = 0V, Vout = ±0.25V Transition Time 0.8 2.4 µs Rise/fall time, 10-90% Maximum Transmission Rate 120 kbps R L=550Ω Propagation Delay t PHL 28 µ s R L=550Ω tPLH 28 µ s R L=550Ω RS-423 RECEIVER TTL Output Levels VOL 0.4 Volts VOH 2.4 Volts Input HIGH Threshold +0.2 +7.0 Volts LOW Threshold –7.0 –0.2 Volts HIGH Input Current Refer to graph LOW Input Current Refer to graph Receiver Sensitivity ±0.2 Volts V CM = +7V to -7V Input Impedance 4 k Ω VIN = +10V to -10V Maximum Transmission Rate 120 kbps Propagation Delay t PHL 1µ s tPLH 1µ s POWER REQUIREMENTS VCC 4.75 5.25 Volts ICC 20 30 mA V CC =5V; no interface selected ENVIRONMENTAL AND MECHANICAL Operating Temperature Range 0 +70 °C Storage Temperature Range –65 +150 °C ESD Rating 1 kV HBM

1 Unit Load

+3.25mA –3.25mA +10V+3V –3V–10V Maximum Input Current versus Voltage RS-422 RECEIVER +3.25mA –3.25mA +10V+3V –3V–10V Maximum Input Current versus Voltage RS-423 RECEIVER RECEIVER INPUT GRAPHS POWER MATRIX Mode Open Input Input to 5V Input to GND AC Signal Input to 5V Input to GND AC Signal Conditions to Input with Load with Load with Load With external termination resistor network; Input @ 60kHz, Load is 3kΩ & 2500pF for RS-232 and 100ý for V.35 Input @ 60kHz Load is 100Ω for RS-422 450 Ω for RS-423 Input @ 60kHz Load is 100Ω for RS-422 450 Ω for RS-423 Input @ 2.5MHz Load is 54Ω. Input @ 2.5MHz Load is 100Ω. Input @ 60kHz Load is 3kΩ & 2500pF for RS-232. Typical @ 25°C and Vcc = +5V unless otherwise noted. Input is applied to one driver.

SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation OTHER AC CHARACTERISTICS (Typical @ 25°C and nominal supply voltages unless otherwise noted) PARAMETER MIN. TYP. MAX. UN ITS CONDITIONS DELAY TIME FROM ENABLE MODE TO TRI–STATE MODE SINGLE–ENDED MODE (RS-232, RS-423) tPZL; Enable to Output LOW 190 ns 3k Ω pull–up to output tPZH; Enable to Output HIGH 130 ns 3k Ω pull–down to output tPLZ; Disable from Output LOW 270 ns 5V to input tPHZ; Disable from Output HIGH 400 ns GND to input DIFFERENTIAL MODE (RS-422, RS-485, V.35) tPZL; Enable to Output LOW 100 ns 3k Ω pull–up to output tPZH; Enable to Output HIGH 100 ns 3k Ω pull–down to output tPLZ; Disable from Output LOW 130 ns 5V to input tPHZ; Disable from Output HIGH 140 ns GND to input Notes: 1. Measured from 2.5V of R IN to 2.5V of ROUT. 2. Measured from one–half of R IN to 2.5V of ROUT. 3. Measured from 1.5V of T IN to one–half of T OUT. 4. Measured from 2.5V of R O to 0V of A and B. PINOUT… RxD 1 RDEC0 2 RDEC1 3 RDEC2 4 RDEC3 5 TTEN 6 SCTEN 7 VCC 8 TDEC3 9 TDEC2 10 TDEC1 11 TDEC0 12 DTR 13 TxD 14 TxC 15 RTS 16 RL 17 NC 18 DCD 19 RxC 20 RI 21 ST 22 STEN 23 LL 24 VCC 25 C1+ 26 VDD 27 C2+ 28 GND 29 C1– 30 C2– 31 VSS 32 VCC 33 GND 34 RR(a) 35 RR(b) 36 RT(a) 37 RT(b) 38 IC(a) 39 IC(b) 40 PIN ASSIGNMENTS… CLOCK AND DATA GROUP Pin 1 — RxD — Receive Data; TTL output, sourced from RD(a) and RD(b) inputs. Pin 14 — TxD — TTL input ; transmit data source for SD(a) and SD(b) outputs. Pin 15 — TxC — Transmit Clock; TTL input for TT driver outputs. Pin 20 — RxC — Receive Clock; TTL output sourced from RT(a) and RT(b) inputs. Pin 22 — ST — Send Timing; TTL input; source for ST(a) and ST(b) outputs. Pin 37 — RT(a) — Receive Timing; analog input, inverted; source for RxC. Pin 38 — RT(b) — Receive Timing; analog input, non-inverted; source for RxC. Pin 42 — ST(a) — Send Timing; analog output, inverted; sourced from ST. Pin 44 — ST(b) — Send Timing; analog output, non-inverted; sourced from ST. Pin 59 — SD(b) — Analog Out — Send data, non-inverted; sourced from TxD. Pin 61 — SD(a) — Analog Out — Send data, inverted; sourced from TxD. Pin 63 — TT(a) — Analog Out — Terminal Timing, inverted; sourced from TxC Pin 65 — TT(b) — Analog Out — Terminal Timing, non–inverted; sourced from TxC. Pin 70 — RD(a) — Receive Data, analog input; inverted; source for RxD.

SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation Pin 71 — RD(b) — Receive Data; analog input; non-inverted; source for RxD. Pin 76 — SCT(a) — Serial Clock Transmit; analog input, inverted; source for SCT. Pin 77 — SCT(b) — Serial Clock Transmit: analog input, non–inverted; source for SCT Pin 79 — SCT — Serial Clock Transmit; TTL output; sources from SCT(a) and SCT(b) inputs. CONTROL LINE GROUP Pin 13 — DTR — Data Terminal Ready; TTL input; source for TR(a) and TR(b) outputs. Pin 16 — RTS — Ready To Send; TTL input; source for RS(a) and RS(b) outputs. Pin 17 — RL — Remote Loopback; TTL input; source for RL(a) and RL(b) outputs. Pin 19 — DCD— Data Carrier Detect; TTL output; sourced from RR(a) and RR(b) inputs. Pin 21 — RI — Ring In; TTL output; sourced from IC(a) and IC(b) inputs. Pin 24 — LL — Local Loopback; TTL input; source for LL(a) and LL(b) outputs. Pin 35 — RR(a)— Receiver Ready; analog input, inverted; source for DCD. Pin 36 — RR(b)— Receiver Ready; analog input, non-inverted; source for DCD. Pin 39 — IC(a)— Incoming Call; analog input, inverted; source for RI. Pin 40 — IC(b)— Incoming Call; analog input, non-inverted; source for RI. Pin 45 — RL(b) — Remote Loopback; analog output, non-inverted; sourced from RL. Pin 47 — RL(a) — Remote Loopback; analog output inverted; sourced from RL. Pin 49— LL(b) — Local Loopback; analog output, non-inverted; sourced from LL. Pin 51 — LL(a) — Local Loopback; analog output, inverted; sourced from LL. Pin 52 — RS(b) — Ready To Send; analog output, non-inverted; sourced from RTS. Pin 54 — RS(a) — Ready To Send; analog output, inverted; sourced from RTS. Pin 56 — TR(b) — Terminal Ready; analog output, non-inverted; sourced from DTR. Pin 58 — TR(a) — Terminal Ready; analog output, inverted; sourced from DTR. Pin 66 — CS(a)— Clear To Send; analog input, inverted; source for CTS. Pin 67 — CS(b)— Clear To Send; analog input, non-inverted; source for CTS. Pin 68 — DM(a)— Data Mode; analog input, inverted; source for DSR. Pin 69 — DM(b)— Data Mode; analog input, non-inverted; source for DSR Pin 78 — DSR— Data Set Ready; TTL output; sourced from DM(a), DM(b) inputs. Pin 80 — CTS— Clear To Send; TTL output; sourced from CS(a) and CS(b) inputs. CONTROL REGISTERS Pins 2–5 — RDEC 0 – RDEC 3 — Receiver decode register; configures receiver modes; TTL inputs. Pin 6 — TTEN — Enables TT driver, active low; TTL input. Pin 7 — SCTEN — Enables SCT receiver; active high; TTL input. Pins 12–9 — TDEC 0 – TDEC3 — Transmitter decode register; configures transmitter modes; TTL inputs. Pin 23 — STEN — Enables ST driver; active low; TTL input. POWER SUPPLIES Pins 8, 25, 33, 41, 48, 55, 62, 73, 74 — V CC — +5V input. Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 — GND — Ground. Pin 27 — V DD +10V Charge Pump Capacitor — Connects from VDD to VCC. Suggested capaci- tor size is 22µF, 16V.

gested capacitor size is 22µF, 16V. gested capacitor size is 22µF, 16V.

Simultaneously, the positive side of capaci-

voltage potential across C 2 is l0V. described in more detail below. Figure 1. Charge Pump Phase 1.

Note: An external voltage of -5V, ±5% is needed for the driver output termination resistors. Recommendation V.35. For other termination configurations, please consult factory. Figure 6. Typical Operating Circuit

and in V.35 mode for control line signals. 4kΩ, with an operating voltage range of ±7V. The RS-423 receivers can operate up to 120kbps. 15kΩ and a differential threshold of ±200mV. nected, which will ensure a logic high output. Table 2. SP503 Receivers

SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation of Figure 6 must be applied. The threshold of the V.35 receiver is ±200mV. The V.35 receiv- ers can operate up to 5Mbps. All of the differen- tial receivers can receive data up to 5Mbps. Decoder The SP503 has the ability to change the inter- face mode of the drivers or receivers via an 8– bit switch. The decoder for the drivers and receivers is not latched; it is merely a combina- tional logic switch. The codes shown in Tables 1 and 2 are the only specified, valid modes for the SP503. Undefined codes may represent other interface modes not specified or random out- puts (consult the factory for more information). The drivers are controlled with the data bits labeled TDEC 3–TDEC0. The drivers can be put into tri-state mode by writing 0000 to the driver decode switch. The receivers are controlled with data bits RDEC 3–RDEC0; the code 0000 written to the receivers will place the outputs in an undetermined state. All receivers, with the exception of SCT, do not have tri-state capabil- ity; the outputs will either be HIGH or LOWdepending upon the state of the receiver input.

Figure 7. Mode Diagram — RS-232

13 DTR

16 RTS

23 STEN

6 TTEN

1 Disabled 1 Disabled 1 Enabled

0 Enabled 0 Enabled 0 Disabled

14 TxD

Figure 8. Mode Diagram — V.35

15 TxC

Figure 9. Mode Diagram — RS-422

Figure 10. Mode Diagram — RS-449

Figure 11. Mode Diagram — RS-485

Figure 12. Mode Diagram — EIA-530

SP503_101_101508 SP503 Multiprotocol Transceiver © Copyright 2008 Exar Corporation SP502/SP503 EVALUATION BOARD The SP502/SP503 Evaluation Board (EB) Is designed to offer as much flexibility to the user as possible. Each board comes equipped with an 80-pin QFP Zero-Insertion Force socket to allow for testing of multiple devices. The con- trol lines and inputs and outputs of the device can be controlled either manually or via a data bus under software control. There is a 50-pin connector to allow for easy connection to an existing system via a ribbon cable. There are also open areas on the PC board to add addi- tional circuitry to support application-specific requirements. Manual Control The SP502/SP503EB will support both the SP502 or SP503 multi-mode serial transceiv- ers. When used for the SP502, disregard all notation on the board that is in [brackets] . The SP502 has a half-duplex connection between the RxT receiver and the TT driver. Due to this internal connection, the RxT receiver inputs can be accessed via the TT(a) and TT(b) pins. If the user needs separate receiver input test pins, jumpers JP1 and JP2 can be inserted to allow for separate receiver inputs located at SCT(a) and SCT(b). The corresponding TTL output for this receiver is labeled as SCT. This test point is tied to pin 79 of the SP502 or SP503. Pin 7 of the evaluation board is connected to the DIP switch, and is labeled as (SCTEN). When used with the SP502, this pin should be switched to a low state. When the evaluation board is used with the SP503, pin 7 is a tri-state control pin for the SCT receiver. The transceiver I/O lines are brought out to test pins arranged in the same configuration as shown elsewhere in this data sheet. A top layer silk-screen shows the drivers and receivers to allow direct correlation to the data sheet. The transmitter and receiver decode bits are tied together and are brought out to a DIP switch for manual control of both the driver and receiver interface modes. Since the coding for the driv- ers and receivers is identical, the bits have been tied together. The DIP switch has 7 positions, four of which are reserved for the TDEC/RDEC control and the other three are used as tri-state control pins. The labels that are in [brackets] apply only to the SP503. If a logic one is asserted, the corresponding red LED will be lit. If a zero is asserted, the corresponding red LED will not be lit. Software Control A 50-pin connector brings all the analog and digital I/O lines, V CC, and GND to the edge of the card. This can be wired to the user’s existing design via a ribbon cable. The pinout for the connector is described in the following section. When the evaluation board is operated under software control, the DlP switch should be set up so that all bits are LOW (all LEDs off). This will tie 20kΩ pulldown resistors from the inputs to ground and let the external system control the state of the control inputs. Power and Ground Requirements The evaluation board layout has been optimized for performance by using basic analog circuit techniques, The four charge-pump capacitors must be 22µF (16V) and be placed as close to the unit as possible; tantalum capacitors are sug- gested. The decoupling capacitor must be a minimum of 1µF; depending upon the operating environment, 10µF should be enough for worst case situations. The ground plane for the part must be solid, extending completely under the package. The power supplies for the device should be as accurate as possible; for rated performance ±5% is necessary. The power sup- ply current will vary depending upon the se- lected mode, the amount of loading and the data rate. As a maximum, the user should reserve 200mA for I CC. The worst-case operating mode is RS-485 under full load of six (6) drivers supplying 1.6V to 54 Ω loads. The power and ground inputs can be supplied through either the banana jacks on the evaluation board (Red = VCC = +5V±5%; Black = GND) or through the con- nector. For reference, the 80-pin QFP Socket is a TESCO part number FPQ-80-65-09A. The 50-pin connector is an AMP part number 749075-5.

Figure 13. SP502/503 Evaluation Board Schematic

Figure 15. External Transient Suppressors

01 TxD (pin 14) –TTL Input – Transmit

data; source for SD(a) and SD(b) out- puts.

02 DTR (pin 13) – TTL Input – Data

terminal ready: source for TR(a) and TR(b) outputs.

03 ST/TT (pin 6) –TTL Input – ST/TT

select pin; enables ST drivers and dis- ables TT drivers when high. Disables ST drivers and enables TT drivers when low.

04 DEC

3/RDEC3 (pin 5) – TTL Input – Transmitter/Receiver decode register.

05 TDEC 2/RDEC2 (pin 4) – TTL Input –

Transmitter/Receiver decode register.

06 TDEC 1/RDEC1 (pin 3) – TTL Input –

Transmitter/Receiver decode register.

07 TDEC 0/RDEC0 (pin 2) – TTL Input –

Transmitter/Receiver decode register.

08 RxD (pin 1 ) – TTL Output – Receive

data; sourced from RD(a) and RD)b) inputs.

09 CTS (pin 80) – TTL Output – Clear to

send; sourced from CS(a) and CS(b) inputs.

10 RxT (pin 79) – TTL Output – RxT;

sourced from TT(a), TT(b) inputs.

11 DSR (pin 78) – TTL Output – Data set

ready; sourced from DM(a) and DM(b) inputs.

12 RD(b) (pin 71) – Analog In – Receive

data, non–inverted; source for RxD. EDGE DUT PIN CONNECTOR DESCRIPTIONS

13 RD(a) (pin 70) – Analog In – Receive

data, inverted: source for RxD.

14 DM(b) (pin 69) – Analog In – Data

mode, non–inverted; source for DSR. l5 DM(a) (pin 68) – Analog In – Data mode, inverted; source for DSR.

16 CS(b) (pin 67) – Analog In – Clear to

send; non–inverted; source for CTS.

17 CS(a) (pin 66) – Analog In – Clear to

send, inverted; source for CTS.

18 TT(b) (pin 65) – Analog Out –

Terminal timing, non–inverted: sourced from TxC input.

19 TT(a) (pin 63) – Analog Out –

Terminal timing; inverted: sourced from TxC input.

20 TR(a) (pin 58) – Analog Out – Termi-

nal ready, inverted; sourced from DTR.

21 TR(b) (pin 56) – Analog Out – Termi-

nal ready; non–inverted; sourced from DTR.

22 SD(a) (pin 61) – Analog Out – Send

data, inverted; sourced from TxD.

23 SD(b) (pin 59) – Analog Out – Send

data; non–inverted; sourced from TxD.

24 RS(a) (pin 54) – Analog Out – Ready to

send; inverted; sourced from RTS.

25 RS(b) (pin 52) – Analog Out – Ready

to send, non–inverted; sourced from RTS.

26 ST (pin 22) – TTL Input – Send Tim-

ing; source for ST(a) and ST(b) out- puts. SP503 only.

27 STEN (pin 23) – TTL Input — Driver

enable control pin; active low. SP503 only,

28 SCT(a) (pin 76) – Analog Input – In-

verting; input for SCT receiver; SP503 only.

29 SCT(b) (pin 77) – Analog Input – Non–

inverting; input for SCT receiver. SP503 only. 30 V CC — +5V for all circuitry. 31 GND — signal and power ground.

32 LL(a) (pin 51) – Analog Out – Local

loopback, inverted; sourced from LL.

33 LL(b) (pin 49) – Analog Out – Local

loopback, non–inverted sourced from LL.

34 RL(a) (pin 47) – Analog Out – Remote

loopback; inverted; sourced from RL.

35 RL(b) (pin 45) – Analog Out – Remote

loopback; non–inverted; sourced from RL.

36 ST(b) (pin 44) – Analog Out – Send

timing, non–inverted; sourced from TxC.

37 ST(a) (pin 42) – Analog Output –Send

timing, inverted; sourced from TxC.

38 IC(b) (pin 40) – Analog In – Incoming

call; non–inverted; source for Rl. EDGE DUT PIN CONNECTOR DESCRIPTIONS

39 IC(a) (pin 39) – Analog In – Incoming

call; inverted; source for Rl.

40 RT(b) (pin 38) – Analog In – Receive

timing, non–inverted; source for RxC.

41 RT(a) (pin 37) – Analog In – Receive

timing; inverted; source from RxC.

42 RR(b) (pin 36) – Analog In – Receiver

ready; non–inverted; source for DCD.

43 RR(a) (pin 35) – Analog In – Receiver

ready; inverted; source for DCD.

44 LL (pin 24) – TTL Input – Local

loopback; source for LL(a) and LL(b) outputs.

45 Rl (pin 21) – TTL Output – Ring

indicator; sourced from IC(a) and IC(b) inputs.

46 RxC (pin 20) – TTL Output – Receive

clock; sourced from RT(a) and RT(b) inputs.

47 DCD (pin 19) – TTL Output – Data

carrier detect; sourced from RR(a) and RR(b) inputs.

48 RL (pin 17) – Analog Out – Remote

loopback; source for RL(a) and RL(b) outputs.

49 RTS (pin 16) – TTL Input – Ready to

send; source for RS(a) and RS(b) out- puts.

50 TxC (pin 15) – TTL Input – Transmit

clock; source for TT(A) and TT(B) outputs.

ORDERING INFORMATION

Part Number Top Mark Temperature Range Package Types DATE REVISION DESCRIPTION 1/27/04 A Implemented tracking revision. 5/6/04 B Added Top Mark to ordering information. 7/29/04 C Included LQFP package option. 6/8/05 D Note that the SP503 Evaluation Board is no longer available. The information is still included as reference material should customers desire to breadboard their own evaluation setup. 7/17/08 1.0.0 SP503 is no longer available in MQFP package per PCN 07-1102- 06a. In addition, SP503 is now only available in Pb-Free, RoHS compliant packages. New package drawing has been included and ordering information has been updated. Changed to Exar datasheet format and revision to 1.0.0. 10/15/08 1.0.1 SP503EM-L temperature range changed from "-40°C to +85°C" to "-20°C to +85°C". Added ESD rating of 1kV HBM to electrical characteristics.

REVISION HISTORY

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2008 EXAR Corporation Datasheet September 2008 Send your technical inquiry with details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

Product Information

SP503EM-L specifications and overview.

Summary

Multiprotocol Transceiver

Description

Multiprotocol Transceiver

Source title SP503EM-L Datasheet(PDF) - Exar Corporation

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