SP3508CF-L

SP3508 EXAR | Alldatasheet

Document overview

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Technical content

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208

FEATURES

• Fast 20Mbps Differential Transmission Rates
• Internal Transceiver Termination Resistors for V. & V.35
• Interface Modes: — X.2 (V.) — EIA-530A (V.0 & V.) (V.0 & V.)
• Protocols are Software Selectable with 3-Bit Word
• Eight (8) Drivers and Eight (8) Receivers
• Termination Network Disable Option
• Internal Line or Digital Loopback for Diagnostic Testing
• Certified conformance to NET1/NET2 and TBR-1 TBR-2 by TUV Rheinland (TBR2/3045940.00/04)
• Easy Flow-Through Pinout
• +3.3V Only Operation
• Individual Driver and Receiver Enable/Disable Controls
• Operates in either DTE or DCE Mode SP3508 Rugged 3.3V, 20Mbps, 8 Channel Multiprotocol Transceiver with Programmable DCE/DTE and Termination Resistors

DESCRIPTION

The SP3508 is a monolithic device that supports eight (8) popular serial interface standards for Wide Area Network (WAN) connectivity. The SP3508 is fabricated using a low power BiCMOS process technology, and incorporates a regulated charge pump allowing +3.3V only operation. Exar's patented charge pump provides a regulated output of +5.5V, which will provide enough voltage for compliant operation in all modes. Eight (8) drivers and eight (8) receivers can be configured via software for any of the above interface modes at any time. The SP3508 requires no additional external components for compliant operation for all of the eight (8) modes of operation other than six capacitors used for the internal charge pump. All necessary termination is integrated within the SP3508 and is switchable when V.35 drivers and V.35 receivers, or when V. receivers are used. The SP3508 provides the controls and transceiver availability for operating as either a DTE or DCE. Additional features with the SP3508 include internal loopback that can be initiated in any of the operating modes by use of the LOOPBACK pin. While in loopback mode, receiver outputs are internally connected to driver inputs creating an internal signal path bypassing the serial communications controller for diagnostic testing. The SP3508 also includes a latch enable pin with the driver and receiver address decoder. The internal V. or V.35 termination can be switched off using a control pin (TERM_OFF) for monitoring applications. All eight (8) drivers and receivers in the SP3508 include separate enable pins for added convenience. The SP3508 is ideal for WAN serial ports in networking equipment such as routers, access concentrators, network muxes, DSU/CSU's, networking test equipment, and other access devices.

APPLICATIONS

• Router
• Frame Relay
• CSU
• DSU
• PBX
• Secure Communication Terminals Now Available in Lead Free Packaging Refer to page 9 for pinout

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specifications which apply over the full operating tempera- ture range (-40°C to +85°C), unless otherwise specified. Input Voltages: Output Voltages: (derate 9.0mW/°C above +70°C) Due to the relatively large package size of the 00-pin quad flat-pack, storage in a low humidity environment is preferred. Large high density plastic packages are moisture sensitive and should be stored in Dry Vapor Barrier Bags. Prior to usage, the parts should remain bagged and stored below 40°C and 60%RH. If the parts are removed from the bag, they should be Package Derating: These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ABSOLUTE MAXIMUM RATINGS used within 48 hours or stored in an environment at or below 20%RH. If the above conditions cannot be followed, the parts should be baked for four hours at 25°C in order to remove moisture prior to soldering. Exar ships the 00-pin LQFP in Dry Vapor Barrier Bags with a humidity indicator card and desiccant pack. The humidity indicator should be below 30%RH. STORAGE CONSIDERATIONS PARAMETER MIN. TYP. MAX. UNITS CONDITIONS LOGIC INPUTS VIL 0.8 ♦ V VIH 2.0 ♦ V LOGIC OUTPUTS VOL 0.4 ♦ V IOUT = -3.2mA VOH VCC - 0.6 VCC - 0.3 ♦ V IOUT = .0mA V.28 DRIVER DC Parameters (OUTPUTS) Open Circuit Voltage +/-0 ♦ V Per Figure Loaded Voltage +/-5.0 ♦ V Per Figure 2 Short-Circuit Current +/-00 ♦ mA Per Figure 4 Power-Off Impedance 300 ♦ Ω Per Figure 5 V.28 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time .5 ♦ µs Per Figure 6, +3V to -3V Instantaneous Slew Rate 30 V/ µs Per Figure 3 Propagation Delay: tPHL 0.5 .0 3.0 ♦ µs Propagation Delay: tPLH 0.5 .0 3.0 ♦ µs Max. Transmission Rate 20 230 ♦ kbps

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specifications which apply over the full operating tempera- ture range (-40°C to +85°C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.28 RECEIVER DC Parameters (Inputs) Input Impedance 3 7 ♦ kΩ Per Figure 7 Open-Circuit Bias +2.0 ♦ V Per Figure 8 HIGH Threshold .7 3.0 ♦ V LOW Threshold 0.8 .2 ♦ V V.28 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 00 500 ns Propagation Delay: tPLH 00 500 ns Max. Transmission Rate 20 230 kbps V.10 DRIVER DC Parameters (Outputs) Open Circuit Voltage +/-4.0 +/-6.0 ♦ V Per Figure 9 Test-Terminated Voltage 0.9VCC V Per Figure 0 Short-Circuit Current +/-50 mA Per Figure Power-Off Current +/-00 ♦ µA Per Figure 2 V.10 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 200 ♦ ns Per Figure 3, 0% to 90% Propagation Delay: tPHL 00 500 ♦ ns Propagation Delay: tPLH 00 500 ♦ ns Max. Transmission Rate 20 ♦ kbps V.10 RECEIVER DC Parameters (Inputs) Input Current -3.25 +3.25 mA Per Figures 4 and 5 Input Impedance 4 ♦ kΩ Sensitivity +/-0.3 ♦ V V.10 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 20 250 ♦ ns Propagation Delay: tPLH 20 250 ♦ ns Max. Transmission Rate 20 ♦ kbps

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specifications which apply over the full operating tempera- ture range (-40°C to +85°C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.11 DRIVER DC Parameters (Outputs) Open Circuit Voltage (VOC) +/-6.0 ♦ V Per Figure 6 Test Terminated Voltage +/-2.0 ♦ V Per Figure 7 0.5(VOC) ♦ V Balance +/-0.4 V Per Figure 7 Offset +3.0 ♦ V Per Figure 7 Short-Circuit Current +/-50 ♦ mA Per Figure 8 Power-Off Current +/-00 ♦ µA Per Figure 9 V.11 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 0 ♦ ns Per Figures 2 and 35, 0% to 90% using CL = 50pF Propagation Delay: tPHL 30 85 ♦ ns Per Figures 32 and 35 Propagation Delay: tPLH 30 85 ♦ ns Per Figures 32 and 35 Differential Skew 5 0 ♦ ns Per Figures 32 and 35 Max. Transmission Rate 20 ♦ Mbps V.11 RECEIVER DC Parameters (Inputs) Common Mode Range -7 +7 ♦ V Sensitivity +/-0.2 ♦ V Input Current -3.25 +3.25 mA Per Figures 20 and 22; Power on or off Current with 100Ω Termination +/-60 mA Per Figures 23 and 24 Input Impedance 4 ♦ kΩ V.11 RECEIVER AC Parameters VCC = 3.3V for AC parameters us- ing CL = 50pF Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37 Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37 Skew 5 0 ns Per Figure 32 Max. Transmission Rate 20 Mbps

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specifications which apply over the full operating tempera- ture range (-40°C to +85°C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS V.35 DRIVER DC Parameters (Outputs) Open Circuit Voltage +/-.20 V Per Figure 6 Test Terminated Voltage +/-0.44 +/-0.66 V Per Figure 25 Offset +/-0.6 ♦ V Per Figure 25 Output Overshoot -0.2VST +0.2VST ♦ V Per Figure 25; VST = Steady State value Source Impedance 50 50 ♦ Ω Per Figure 26; ZS = V2/V x 50 Short-Circuit Impedance 35 65 Ω Per Figure 27 V.35 DRIVER AC Parameters (Outputs) VCC = 3.3V for AC parameters Transition Time 20 ♦ ns Propagation Delay: tPHL 30 85 ♦ ns Per Figures 32 and 35; CL = 20pF Propagation Delay: tPLH 30 85 ♦ ns Per Figures 32 and 35; CL = 20pF Differential Skew 5 ♦ ns Per Figures 32 and 35; CL = 20pF Max. Transmission Rate 20 ♦ Mbps V.35 RECEIVER DC Parameters (Inputs) Sensitivity +/-50 +/-200 ♦ mV Source Impedance 90 0 Ω Per Figure 29; ZS = V2/V x 50Ω Short-Circuit Impedance 35 65 Ω Per Figure 30 V.35 RECEIVER AC Parameters VCC = 3.3V for AC parameters Propagation Delay: tPHL 30 85 ns Per Figures 32 and 37; CL = 20pF Propagation Delay: tPLH 30 85 ns Per Figures 32 and 37; CL = 20pF Skew 5 0 ns Per Figure 32; CL = 20pF Max. Transmission Rate 20 Mbps TRANSCEIVER LEAKAGE CURRENTS Driver Output 3-State Cur- rent 200 µA Per Figure 3; Drivers Disabled Receiver Output 3-State Current 0 µA DX =

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 ELECTRICAL SPECIFICATIONS TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted. The ♦ denotes the specifications which apply over the full operating tempera- ture range (-40°C to +85°C), unless otherwise specified. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS POWER REQUIREMENTS VCC 3.5 3.3 3.45 V ICC (No Mode Selected) ♦ µA All ICC values are with VCC = +3.3V (V.28 / RS-232) 95 ♦ mA fIN = 230kbps; Drivers active and loaded (V. / RS-422) 230 ♦ mA fIN = 20Mbps; Drivers active and loaded (EIA-530 & RS-449) 270 ♦ mA fIN = 20Mbps; Drivers active and loaded (V.35) 70 ♦ mA V.35 @ fIN = 20Mbps, V.28 @ fIN = 230kbps

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 OTHER AC CHARACTERISTICS PARAMETER MIN. TYP. MAX. Units CONDITIONS DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.70 5.0 µs CL = 00pF, Fig. 33 & 39; S closed tPZH; Tri-state to Output HIGH 0.40 2.0 µs CL = 00pF, Fig. 33 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 00pF, Fig. 33 & 39; S closed tPHZ; Output HIGH to Tri-state 0.40 2.0 µs CL = 00pF, Fig. 33 & 39; S2 closed RS-423/V.10 tPZL; Tri-state to Output LOW 0.5 2.0 µs CL = 00pF, Fig. 33 & 39; S closed tPZH; Tri-state to Output HIGH 0.20 2.0 µs CL = 00pF, Fig. 33 & 39; S2 closed tPLZ; Output LOW to Tri-state 0.20 2.0 µs CL = 00pF, Fig. 33 & 39; S closed tPHZ; Output HIGH to Tri-state 0.5 2.0 µs CL = 00pF, Fig. 33 & 39; S2 closed RS-422/V.11 tPZL; Tri-state to Output LOW 2.80 0.0 µs CL = 00pF, Fig. 33 & 36; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 33 & 36; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 33 & 36; S closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 33 & 36; S2 closed V.35 tPZL; Tri-state to Output LOW 2.60 0.0 µs CL = 00pF, Fig. 33 & 36; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 33 & 36; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 33 & 36; S closed tPHZ; Output HIGH to Tri-state 0.5 2.0 µs CL = 5pF, Fig. 33 & 36; S2 closed RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE RS-232/V.28 tPZL; Tri-state to Output LOW 0.2 2.0 µs CL = 00pF, Fig. 34 & 37; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed RS-423/V.10 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 00pF, Fig. 34 & 37; S2 closed TA = 0 to 70°C and VCC = 3.3V ± 5% unless otherwise noted.

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 OTHER AC CHARACTERISTICS: Continued TA = 0 to 70°C and VCC = +3.3V unless otherwise noted. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS RS-422/V.11 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 34 & 38; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 38; S closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 38; S2 closed V.35 tPZL; Tri-state to Output LOW 0.0 2.0 µs CL = 00pF, Fig. 34 & 38; S closed tPZH; Tri-state to Output HIGH 0.0 2.0 µs CL = 00pF, Fig. 34 & 38; S2 closed tPLZ; Output LOW to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 38; S closed tPHZ; Output HIGH to Tri-state 0.0 2.0 µs CL = 5pF, Fig. 34 & 38; S2 closed TRANSCEIVER TO TRANSCEIVER SKEW (per Figures 32, 35, 37) RS-232 Driver 00 ns [ (tPHL )Tx – (tPHL )Txn ] 00 ns [ (tPLH )Tx – (tPLH )Txn] RS-232 Receiver 20 ns [ (tPHL )Rx – (tPHL )Rxn ] 20 ns [ (tPLH )Rx – (tPLH )Rxn ] RS-422 Driver 2 ns [ (tPHL)Tx – (tPHL )Txn ] 2 ns [ (tPLH )Tx – (tPLH )Txn ] RS-422 Receiver 3 ns [ (tPHL )Rx – (tPHL: )Rxn ] 3 ns [ (tPLH )Rx – (tPLH )Rxn ] RS-423 Driver 5 ns [ (tPHL )Tx2 – (tPHL )Txn ] 5 ns [ (tPLH )Tx2 – (tPLH )Txn ] RS-423 Receiver 5 ns [ (tPHL )Rx2 – (tPHL )Rxn ] 5 ns [ (tPLH )Rx2 – (tPLH )Rxn ] V.35 Driver 4 ns [ (tPHL )Tx – (tPHL )Txn ] 4 ns [ (tPLH )Tx – (tPLH )Txn ] V.35 Receiver 6 ns [ (tPHL )Rx – (tPHL )Rxn ] 6 ns [ (tPLH )Rx – (tPLH )Rxn]

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 PINOUT

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 SP3508 Pin Designation Pin Number Pin Name Description GND Signal Ground

2 SDEN TxD Driver Enable Input

3 TTEN TxCE Driver Enable Input

4 STEN ST Driver Enabe Input

5 RSEN RTS Driver Enable Input

6 TREN DTR Driver Enable Input

7 RRCEN DCD Driver Enable Input

8 RLEN RL Driver Enable Input

9 LLEN# LL Driver Enable Input

0 RDEN# RxD Receiver Enabe Input

RTEN# RxC Receiver Enable Input

2 TxCEN# TxC Receiver Enable Input

3 CSEN# CTS Receiver Enable Input

4 DMEN# DSR Receiver Enable Input

5 RRTEN# DCDDTE Receiver Enable Input

6 ICEN# RI Receiver Enable Input

7 TMEN TM Receiver Enable Input

8 D0 Mode Select Input

9 D Mode Select Input

20 D2 Mode Select Input

2 DLATCH# Decoder Latch Input

22 TERM_OFF Termination Disable Input

23 VCC Power Supply Input

24 C3P Charge Pump Capacitor

25 GND Signal Ground

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 SP3508 Pin Designation Pin Number Pin Name Description

26 C3N Charge Pump Capacitor

27 VSS2 Minus VCC

28 AGND Signal Ground

29 AVCC Power Supply Input

30 LOOPBACK# Loopback Mode Enable Input

3 TxD TxD Driver TTL Input

32 TxCE TxCE Driver TTL input

33 ST ST Driver TTL Input

34 RTS RTS Driver TTL Input

35 DTR DTR Driver TTL Input

36 DCD_DCE DCDDCE Driver TTL Input

37 RL RL Driver TTL Input

38 LL LL Driver TTL Input

39 RxD RxD Receiver TTL Output

40 RxC RxC Receiver TTL Output

4 TxC TxC Receiver TTL Output

42 CTS CTS Receiver TTL Output

43 DSR DSR Receiver TTL Output

44 DCD_DTE DCDDTE Receiver TTL Output

45 RI RI Receiver TTL Output

46 TM TM Receiver TTL Output

47 GND Signal Ground

48 VCC Power Supply Input

49 RD(B) RxD Non-Inverting Input

50 RD(A) RxD Inverting Input

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 SP3508 Pin Designation Pin Number Pin Name Description

5 RT(B) RxC Non-Inverting Input

52 RT(A) RxC Inverting Input

53 TxC(B) TxC Non-Inverting Input

54 GND Signal Ground

55 TxC(A) TxC Inverting Input

56 CS(B) CTS Non-Inverting Input

57 CS(A) CTS Inverting Input

58 DM(B) DSR Non-Inverting Input

59 DM(A) DSR Inverting Input

60 GNDV0 V.0 RX Reference Node

6 RRT(B) DCDDTE Non-Inverting Input

62 RRT(A) DCDDTE Inverting Input

63 IC RI Receiver Input

64 TM(A) TM Receiver Input

65 LL(A) LL Driver Output

66 VCC Power Supply Input

67 RL(A) RL Driver Output

68 VSS -2xVCC Charge Pump Output

69 C2N Charge Pump Capacitor

70 CN Charge Pump Capacitor

7 GND Signal Ground

72 C2P Charge Pump Capacitor

73 VCC Power Supply Input

74 CP Charge Pump Capacitor

75 GND Signal Ground

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 SP3508 Pin Designation Pin Number Pin Name Description

76 VDD 2xVCC Charge Pump Output

77 RRC(B) DCDDCE Non-Inverting Output

78 VCC Power Supply Input

79 RRC(A) DCDDCE Inverting Output

80 GND Signal Ground

8 RS(A) RTS Inverting Output

82 VCC Power Supply Input

83 RS(B) RTS Non-Inverting Output

84 GND Signal Ground

85 TR(A) DTR Inverting Output

86 VCC Power Supply Input

87 TR(B) DTR Non-Inverting Output

88 GND Signal Ground

89 ST(A) ST Inverting Output

90 VCC Power Supply Input

9 ST(B) ST Non-Inverting Output

92 GND Signal Ground

93 TT(A) TxCE Inverting Output

94 VCC Power Supply Input

95 TT(B) TxCE Non-Inverting Output

96 GND Signal Ground

97 SD(A) TxD Inverting Output

98 VCC Power Supply Input

99 SD(B) TxD Non-Inverting Output

00 VCC Power Supply Input

Table 2. Receiver Mode Selection

Figure 44. Functional Diagram

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 The SP3508 contains highly integrated se- rial transceivers that offer programmability between interface modes through software control. The SP3508 offers the hardware interface modes for RS-232 (V.28), RS- 449/V.36 (V. and V.0), EIA-530 (V. and and V.28) and X.2(V.). The interface mode selection is done via three control pins, which can be latched via microprocessor control. The SP3508 has eight drivers, eight receiv- ers, and a patented on-board charge pump (5,306,954) that is ideally suited for wide area network connectivity and other multi- protocol applications. Other features include digital and line loopback modes, individual enable/disable control lines for each driver and receiver, fail-safe when inputs are either open or shorted. THEORY OF OPERATION The SP3508 device is made up of ) the drivers 2) the receivers 3) charge pumps 4) DTE/DCE switching algorithm 5) control logic. Drivers The SP3508 has eight enhanced indepen- dent drivers. Control for the mode selection is done via a three-bit control word into D0, D, and D2. The drivers are prearranged such that for each mode of operation, the relative position and functionality of the driv- ers are set up to accommodate the selected interface mode. As the mode of the drivers is changed, the electrical characteristics will change to support the required signal levels. The mode of each driver in the dif - ferent interface modes that can be selected is shown in Table . There are four basic types of driver circuits – ITU-T-V.28 (RS-232), ITU-T-V.0 (RS-423), ITU-T-V. (RS-422), and CCITT-V.35. The V.28 (RS-232) drivers output single- ended signals with a minimum of +5V (with 3kΩ & 2500pF loading), and can operate over 20kbps. Since the SP3508 uses a charge pump to generate the RS-232 output rails, the driver outputs will never exceed +0V. The V.28 driver architecture is similar to Sipex's standard line of RS-232 transceivers. The RS-423 (V.0) drivers are also single- ended signals which produce open circuit VOL and VOH measurements of +4.0V to +6.0V. When terminated with a 450Ω load to ground, the driver output will not deviate more than 0% of the open circuit value. This is in com- pliance of the ITU V.10 specification. The V.10 (RS-423) drivers are used in RS-449/V.36, EIA-530, and EIA-530A modes as Category II signals from each of their corresponding specifications. The V.10 driver can transmit over 20Kbps if necessary. The third type of drivers are V. (RS-422) differential drivers. Due to the nature of dif- ferential signaling, the drivers are more im- mune to noise as opposed to single-ended transmission methods. The advantage is evident over high speeds and long trans - mission lines. The strength of the driver outputs can produce differential signals that can maintain +2V differential output levels with a load of 100Ω. The strength allows the SP3508 differential driver to drive over long cable lengths with minimal signal degrada- tion. The V. drivers are used in RS-449, EIA-530, EIA-530A and V.36 modes as Category I signals which are used for clock and data. Exar's new driver design over its predecessors allow the SP3508 to operate over 20Mbps for differential transmission. The fourth type of drivers are V.35 differential drivers. There are only three available on the SP3508 for data and clock (TxD, TxCE, and TxC in DCE mode).

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 These drivers are current sources that drive loop current through a differential pair resulting in a 550mV differential voltage at the receiver. These drivers also incorporate fixed termination networks for each driver in order to set the V OH and VOL depending on load conditions. This termination network is basically a “Y” configuration consisting of two 51Ω resistors connected in series and a 124Ω resistor connected between the two 50Ω resistors to GND. Filtering can be done on these pins to reduce common mode noise transmitted over the transmission line by connecting a capacitor to ground. The drivers also have separate enable pins which simplifies half-duplex configurations for some applications, especially program- mable DTE/DCE. The enable pins will either enable or disable the output of the drivers according to the appropriate active logic illustrated on Figure 44. The enable pins have internal pull-up and pull-down devices, depending on the active polarity of the re - ceiver, that enable the driver upon power-on if the enable lines are left floating. During disabled conditions, the driver outputs will be at a high impedance 3-state. The driver inputs are both TTL or CMOS compatible. All driver inputs have an internal pull-up resistor so that the output will be at a defined state at logic LOW (“0”). Unused driver inputs can be left floating. The inter - nal pull-up resistor value is approximately 500kΩ. Receivers The SP3508 has eight enhanced inde - pendent receivers. Control for the mode selection is done via a three-bit con - trol word that is the same as the driver control word. Therefore, the modes for the drivers and receivers are identical in the application. Like the drivers, the receivers are prearranged for the specific requirements of the synchronous serial interface. As the operating mode of the receivers is changed, the electrical characteristics will change to support the required serial interface protocols of the receivers. Table shows the mode of each receiver in the different interface modes that can be selected. There are two basic types of receiver cir - cuits—ITU-T-V .28 (RS-232) and ITU-T-V., (RS-422). The RS-232 (V.28) receiver is single-ended and accepts RS-232 signals from the RS- 232 driver. The RS-232 receiver has an operating input voltage range of +5V and can receive signals downs to +3V. The input sensitivity complies with RS-232 and V.28 at +3V. The input impedance is 3kΩ to 7kΩ in accordance to RS-232 and V.28. The re- ceiver output produces a TTL/CMOS signal with a +2.4V minimum for a logic “” and a +0.4V maximum for a logic “0”. The RS-232 (V.28) protocol uses these receivers for all data, clock and control signals. They are also used in V.35 mode for control line signals: CTS, DSR, LL, and RL. The RS-232 receiv- ers can operate over 20kbps. The second type of receiver is a differential type that can be configured internally to support ITU-T-V. 0 and CCITT-V.35 depending on its input conditions. This receiver has a typical input impedance of 10kΩ and a differential threshold of less than +200mV, which complies with the ITU-T-V.11 (RS-422) specifications. V. receivers are used in RS-449/V.36, EIA-530, EIA-530A and X.2 as Category I signals for receiving clock, data, and some control line signals not covered by Category II V.0 circuits. The differential V. trans- ceiver has improved architecture that allows over 20Mbps transmission rates. Receivers dedicated for data and clock (RxD, RxC, TxC) incorporate internal termination for V.. The termination resistor is typi - cally 120Ω connected between the A and B inputs. The termination is essential for minimizing crosstalk and signal reflection over the transmission line . The minimum value is guaranteed to exceed 100Ω, thus complying with the V. and RS-422 speci- fications. This resistor is invoked when the receiver is operating as a V. receiver, in modes EIA-530, EIA-530A, RS-449/V.36, and X.2.

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 The same receivers also incorporate a ter- mination network internally for V.35 applica- tions. For V.35, the receiver input termination is a “Y” termination consisting of two 51Ω resistors connected in series and a 124Ω resistor connected between the two 50Ω resistors and GND. The receiver itself is identical to the V. receiver. The differential receivers can be configured to be ITU-T-V.0 single-ended receivers by internally connecting the non-inverting input to ground. This is internally done by default from the decoder. The non-inverting input is rerouted to V0GND and can be grounded separately. The ITU-T-V.0 receivers can operate over 20Kbps and are used in RS- 449/V.36, E A-530, E A-530A and X.2 modes as Category II signals as indicated by their corresponding specifications. All receivers include an enable/disable line for disabling the receiver output allowing convenient half-duplex configurations. The enable pins will either enable or disable the output of the receivers according to the ap- propriate active logic illustrated on Figure 44. The receiver’s enable lines include an internal pull-up or pull-down device, depend- ing on the active polarity of the receiver, that enables the receiver upon power up if the enable lines are left floating. During disabled conditions, the receiver outputs will be at a high impedance state. If the receiver is disabled any associated termination is also disconnected from the inputs. All receivers include a fail-safe feature that outputs a logic high when the receiver inputs are open, terminated but open, or shorted together. For single-ended V.28 and V.0 receivers, there are internal 5kΩ pull-down resistors on the inputs which produces a logic high (“”) at the receiver outputs. The differential receivers have a proprietary cir- cuit that detect open or shorted inputs and if so, will produce a logic HIGH (“”) at the receiver output. CHARGE PUMP SP3508 uses an internal capacitive charge pump to generate Vdd and Vss. The design is a patented (5,306,954) four-phased volt- age shifting charge pump converters that converts the input voltage of 3.3V to nomi- nal output voltages of +/-6V (Vdd & Vss). SP3508 also includes an inverter block that inverts Vcc to -Vcc (Vss2). There is a free-running oscillator that controls the four phases of the voltage shifting. A description of each phase follows. 4-phased doubler pump Phase 1 -VSS charge storage -During this phase of the clock cycle, the positive side of capacitors C and C2 are initially charged to VCC. C+ is then switched to ground and the charge in C- is transferred to C2-. Since C2+ is con- nected to VCC, the voltage potential across capacitor C2 is now 2xVCC. V CC = +3V –3 V –3 V +3V V SS1 S tora ge C apacitor V DD S tora ge C apacitor C 1 C 2 + + ––– C VDD C VSS1 Figure 45. Charge Pump - Phase .

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 Recommended Signals and Port Pin Assignments Pin NumberPin MnemonicCircuitPin Mnemonic Pin Number Signal Type Mnemo nic DB-25 Pin(F) Signal Type Mnemo nic DB-25 Pin(F) Signal Type Mnemo nic DB-37 Pin(F) Signal Type Mnemo nic M34 Pin(F) Signal Type Mnemo nic DB-15 Pin(F) 2SDENSD(B)99V.11BB(B)16V.11RD(B)24V.35104TV.11R(B)11 3TTENTT(B)95V.11DD(B)9V.11RT(B)26V.35115XV.11B(B)14 4STENST(B)91V.11DB(B)12V.11ST(B)23V.35114AAV.11S(B)13 5RSENRS(B)83V.11CB(B)13V.11CS(B)27V.11I(B)12 35DTRTR(A)85V.28CC6V.11CC(A)6V.11DM(A)11V.28107E 6TRENTR(B)87V.11CC(B)22V.11DM(B)29 36DCD_DCERRC(A)79V.28CF8V.11CF(A)8V.11RR(A)13V.28109F 7RRCENRRC(B)77V.11CF(B)10V.11RR(B)31 37RLRL(A)67V.28CE22V.28125J 8RLEN 38LLLL(A)65V.28TM25V.10TM25V.10TM18V.28142NN 9LLEN# 10RDEN#RD(B)49V.11BA(B)12V.11SD(B)22V.35103SV.11T(B)9 11RTEN#RT(B)51V.11DA(B)11V.11TT(B)35V.35113WV.11X(B)14 41TxCTxC(A)55 12TxCEN#TxC(B)53 13CSEN#CS(B)56V.11CA(B)19V.11RS(B)25V.11C(B)10 43DSRDM(A)59V.28CD20V.11CD(A)20V.11TR(A)12V.28108H 14DMEN#DM(B)58V.11CD(B)23V.11TR(B)30 44DCD_DTERRT(A)62 15RRTEN#RRT(B)61 45RIIC63V.28RL21V.10RL21V.10RL14V.28140N 16ICEN# 46TMTM(A)64V.28LL18V.10LL18V.10LL10V.28141L 17TMEN SP3508 Multiprotocol Configured as DCE Interface to System Logic Interface to Port- Connector Receiver_4 Receiver_5 Receiver_6 Driver_7 Driver_8 RS-449V.35X.21 Driver_1 RS-232 or V.24EIA-530 Receiver_2 Receiver_3 Driver_2 Driver_3 Driver_4 Driver_5 Receiver_1 Driver_6 Spare drivers and receivers may be used for optional signals (Signal Quality, Rate Detect, Standby) or may be disabled using individual enable pins for each driver and receiver ** X.21 use either B() or X(), not both Pin assignments and signal functions are subject to national or regional variation and proprietary / non-standard implementations Receiver_7 Receiver_8 DCE CONFIGURATION

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 Recommended Signals and Port Pin Assignments Pin NumberPin MnemonicCircuitPin Mnemonic Pin Number Signal Type Mnemo nic DB-25 Pin(M) Signal Type Mnemo nic DB-25 Pin(M) Signal Type Mnemo nic DB-37 Pin(M) Signal Type Mnemo nic M34 Pin(M) Signal Type Mnemo nic DB-15 Pin(M) 2SDENSD(B)99V.11BA(B)12V.11SD(B)22V.35103SV.11T(B)9 3TTENTT(B)95V.11DA(B)11V.11TT(B)35V.35113WV.11X(B)14 33STST(A)89 4STENST(B)91 5RSENRS(B)83V.11CA(B)19V.11RS(B)25V.11C(B)10 35DTRTR(A)85V.28CD20V.11CD(A)20V.11TR(A)12V.28108H 6TRENTR(B)87V.11CD(B)23V.11TR(B)30 36DCD_DCERRC(A)79 7RRCENRRC(B)77 37RLRL(A)67V.28RL21V.10RL21V.10RL14V.28140N 8RLEN 38LLLL(A)65V.28LL18V.10LL18V.10LL10V.28141L 9LLEN# 10RDEN#RD(B)49V.11BB(B)16V.11RD(B)24V.35104TV.11R(B)11 11RTEN#RT(B)51V.11DD(B)9V.11RT(B)26V.35115XV.11B(B)14 12TxCEN#TxC(B)53V.11DB(B)12V.11ST(B)23V.35114AAV.11S(B)13 13CSEN#CS(B)56V.11CB(B)13V.11CS(B)27V.11I(B)12 43DSRDM(A)59V.28CC6V.11CC(A)6V.11DM(A)11V.28107E 14DMEN#DM(B)58V.11CC(B)22V.11DM(B)29 44DCD_DTERRT(A)62V.28CF8V.11CF(A)8V.11RR(A)13V.28109F 15RRTEN#RRT(B)61V.11CF(B)10V.11RR(B)31 45RIIC63V.28CE22V.28125J 16ICEN# 46TMTM(A)64V.28TM25V.10TM25V.10TM18V.28142NN 17TMEN RS-449V.35X.21 Receiver_7 Receiver_8 RS-232 or V.24EIA-530 Receiver_4 Receiver_5 Receiver_6 Driver_7 Driver_8 Driver_6 Driver_2 Driver_3 Driver_4 Driver_5 Spare drivers and receivers may be used for optional signals (Signal Quality, Rate Detect, Standby) or may be disabled using individual enable pins for each driver and receiver ** X.21 use either B() or X(), not both Pin assignments and signal functions are subject to national or regional variation and proprietary / non-standard implementations SP3508 Multiprotocol Configured as DTE Interface to System Logic Interface to Port- Connector Driver_1 Receiver_1 Receiver_2 Receiver_3 DTE CONFIGURATION

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 TERM_OFF FUNCTION The SP3508 contains a TERM_OFF pin that disables all three receiver input termination networks regardless of mode. This allows the device to be used in monitor mode ap - plications typically found in networking test equipment. The TERM_OFF pin internally contains a pull-down device with an impedance of over 500kΩ, which will default in a "ON" condition during power-up if V.35 receivers enable line and the SHUTDOWN mode from the decoder will disable the termination regard- less of TERM_OFF. LOOPBACK FUNCTION The SP3508 contains a LOOPBACK pin that invokes a loopback path. This loopback path is illustrated in Figure 50. LOOPBACK has an internal pull-up resistor that defaults to normal mode during power up or if the pin is left floating. During loopback, the driver out- put and receiver input characteristics will still adhere to its appropriate specifications. DECODER AND D_LATCH FUNCTION The SP3508 contains a D_LATCH pin that latches the data into the D0, D and D2 decoder inputs. If tied to a logic LOW ("0"), the latch is transparent, allowing the data at the decoder inputs to propagate through and program the SP3508 accordingly. If tied to a logic HIGH ("1"), the latch locks out the data and prevents the mode from changing until this pin is brought to a logic LOW. There are internal pull-up devices on D0, D and D2, which allow the device to be in SHUTDOWN mode ("111") upon power up. However, if the device is powered-up with the D_LATCH at a logic HIGH, the decoder state of the SP3508 will be undefined. CTR1/CTR2 EUROPEAN COMPLIANCY As with all of Exar's previous multi-protocol serial transceiver IC's the drivers and re - ceivers have been designed to meet all the requirements to NET/NET2 and TBR2 in order to meet CTR/CTR2 compliancy. The SP3508 is also tested in-house at Exar and adheres to all the NET/2 physical layer testing and the ITU Series V specifications before shipment. Please note that although the SP3508, as with its predecessors, ad - here to CRT /CTR2 compliancy testing, any complex or usual configuration should be double-checked to ensure CTR/CTR2 compliance. Consult the factory for details.

Figure 50. Loopback Path

Figure 51. SP3508 Typical Operating Configuration to Serial Port Connector with DCE/DTE program-

• - Driver applies for DCE only on pins 15 and 12.

Receiver applies for DTE only on pins 15 and 12. I/O Lines represented by double arrowhead signifies a bi-directional bus. Driver applies for DCE only on pins 8 and 10. Receiver applies for DTE only on pins 8 and 10.

31 SD(a)

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208 PACKAGE: 100 PIN LQFP

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-707 • www.exar.com SP3508_00_072208

ORDERING INFORMATION

Part Number Temperature Range Package Types Notice EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliabil- ity. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 2008 EXAR Corporation Datasheet July 2008 Send your Interface technical inquiry with technical details to: uarttechsupport@exar.com Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Date Revision Description /2/04 A Implemented Tracking revision 2/27/04 B Included Diamond column in spec table inidcating which specs apply over full operating temperature range. Correct typo to Fig. 5 pin 6 and 62. 3/3/04 C Corrected max dimension for symbol c on LQFP package outline 6/03/04 D Added table to page 27 and 28 0/2/04 E Certified conformance to NET1/NET2 and TBR-1/TBR-2 TUV by TUV Rhein- land (Test report # TBR2/3045940.00/04) 0/29/04 F Corrected V.28 Driver Open circuit values, pages 27 and 28 -- both for DCE and DTE that BA(B) should connect to pin 4. 7/7/08 .0.0 Change Revision format from letter code to number code. Change Logo, footnote and notice statement from Sipex to Exar. Add TJ limits to Absolute Maximum Ratings. Change propagation delay limit specification for V.11 and V.35 Driver/Receiver from 60ns Maximum to 85ns Maximum. Update ordering information to show only RoHS packaging (-L) is available.

REVISION HISTORY