SP0264

SP0264 MICROCHIP | Alldatasheet

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S NARRATOR® SPEECH PROCESSOR FEATURES DESCRIPTION : * Natural speech The SP0264 Speech Processor (SP) is a single chip N- * On-chip 64K bit ROM Channel silicon gate MOS LSI device that is able, using + Stand alone operation with inexpensive support its stored program, to synthesize speech or complex components sounds. * Wide operating voltage * Word, phrase or sentence library, ROM The achievable output Is equivalent to a flat frequency expandable response ranging from 0 to 5kHz, a dynamic range of 42 * Directly expandable to a total of 480K ROM dB, and a signal to noise ratio of approximately 35dB. * Simple interface to most microcomputers or microprocessors The SP0264 incorporates four basic functions: + Supports L.P.C. synthesis; formant synthesis; and allophone synthesis + Asoftware programmatie digital filter that can be * Pin compatible with the SP0256B spsech made to model 2 vocal tract. : synthesizer + A64KROM which stores both data and instructions. * Available in -40° C to 85° C version * AWMicrocontroller which controls the data flow from the ROM to the digital filter, APPLICATIONS + A pulsewidth modulator that creates a digital output which is converted to an analog signal * Telecommunications + Warning systems when filtered by an external low pass filter. + Appliances * Security systems + Computer peripherals + Electronic musical * Automotive instruments + Personal computers == Aids to the blind + Toyagames * Narrow bandwidth + Educational aids communication systems PIN CONFIGURATION T

28 LEAD DUAL INLINE op View 28 LEAD PLCC

WwC}-1 ~ asPosce . Reser Ce 27Dosc + i § Rom owaste (}3 26[) Rom clock ods 25/1 BBY RESET 5bbs 983 oes 247) OTA OUT ES ETE . clje 23) ) Vor oc SayReSET 7 Vo Cj 2a) Test os 184) DIGITAL OUT sev Ce 21 [Senn Po a vo Trace 20 AD imal fri] sen asQ}10 wf} se anal fo) ALB adi seDat arti a} se serouT(] 12 s7Dae SPE aet]t3 16D as BRkzAL=z asliu 1s) ‘@Fin 1 Indicator on PLCC on top of package i NARRATOR* Is a trademark of Microchip Technology Inc. eee 8 EEE ee © 1989 Microchip Technology Inc. 08500120-1

OPERATION Standby (SBY) goes low when an address is loaded and will stay low until all internal instructions have been The addressing of the SP0264 is controlled by the completed (Le. the speech chip stops talking). If a address pins (A1-A8). Address Load (ALD), and Strobe second address has been loaded before the chip stops Enable (SE). Speech data for the SP0264 may be speaking the first utterance, SBY will stay low through stored within the intemal 64K ROM and/or an external the completion of the second utterance (ad Infinitum). serial speech ROM. —- The SP0264 may be partially powered down when SBY There are two modes available for loading an address is high to conserve battery lite, provided Vo1 remains into the chip. Strobe Enable (SE) controls which mode powered. During power down and power up, reset will be used. shoukd be held low to ensure the proper reset condition. Pirie the Speech prooessor isin the partial power down Mode 0 (SE=0). The speech processor will latch an state, the handshake control signals (ALD, SE, LRQ, . address when any one (or more) address pin makes a and SBY) and the address bus are active. However, the low to high transition. All address lines must be retumed SP0264 will not output the addressed speech data until to the low state prior to entering a new address. (Note: after Voo is reapplied. Address zero (0000 0000) Is not a valid address in this mode of operation.) In order to best utilize this mode of Qporation’s vocabulary should consist ofnomare han =» INTERNAL ROM DISABLE eight individual words or phrases such that single ad- dress line transitions can be made. These words or This mode may be entered by wiring TEST to a perma- phrases must be stored using the following entry point nent high. This causes the SP0264 to ignore its internal address: 1, 2, 4, 8, 16, 32, 64 and 128. ROM to fetch data from external speech ROMs encoded by the DEVICE SELECT mask. NOTE: There is a2 byte overhead penalty paid for each dummy entry point between the entry points actually used. Mode 1{SE=1). The SP0264 will latch an address using the pin. The desired address is set up on the address bus (A1-As) and then ALD is pulsed low. Any address can be loaded using this mode, but certain set up and hold times are required (refer to the timing diagrams for the specific times). Two microprocessor interface pins are available for loading of addresses using mode 1. They are LRO and SBY. Coad Request (CAG) tells the prooeesor when the address input butfer is full. Standby (SBY) tells the processor that the chip has stopped talking and no new address has been loaded. When RQ is low, a new address may be loaded onto the address bus. Strobi ALD will cause the new address to be loaded and LG to go high. CRO will return low when the address butfer \\s available to accept a new address. The SP0264 is capable of latching one new address while speaking the last utterance (word or phrase). The time between ‘ address load requests Is variable, depending on the length of the utterance currently being spoken, Neen 08500120-2 © Microchip Technology Inc,

a ROM DISABLE URCE and sens : cc at SERIAL COEFFICIENTS TRANSFER TeHoLo . VOCAL TRACT MODEL a <a - MODULATOR OuT o6c2 ce) ear Al 5 se TAG say Vor ADDRESS SBY RESET © Microchip Technology inc. 0S500120-3

a 1 - Vss Ground 2 (input) RESET A logic 0 resets that portion of the SP powered by Vop. Must be returned to logic 1 for normal operation. Upon reset C1, C2, C3, and SBY = 1. 3 (output) ROM DISABLE For use with an external serial speech ROM, a logic 1 disables the extemal ROM. 4, 5, 6 (outputs) C1, C2,C3 Output contro! lines for use with an external serial speech ROM. Refer to the SPR128 data sheet for details.

7 Voo Power supply for all portions of the SP except the

microprocessor interface logic. 8 (outpul) SBY STANDBY. A logic 1 output indicates that the SP Is inactive and Vop can be powered down externally to conserve power. When the SP |s reactivated by an address being loaded, SBY will go to a logic 0. 9 (output) rr) LOAD REQUEST. LRQis a logic 1 output whenever the input butter is full. When TAG goes to a logic 0, the Trout pot ey be inated by paca the 6 adchons bits on At-As and pulsing the input. 10, 11, 13, 14, As, Ar, As, As 8 bit address which defines any one of 256 speech 15, 16, 17, 18 A4, As, A2, At entry points. 42 (output) SER OUT SERIAL ADDRESS OUT. This output transfers a 16- . bit address serially to an external speech ROM. When RESET and SBY RESET go to 0, SER OUT 908s to 1. 19 (input) SE STROBE ENABLE. Normally held In a logic 1 state. When tied to ground, ALD is disabled and the SP will automatically latch in the address on the input bus approximately 1us after detecting a logic 1 on any address line. 20 (input) ALD ADDRESS LOAD. A negatiave pulse on this input loads the 8 address bits into the input port. The negative edge of this pulse causes LAG to go high. 21 (input) SER IN SERIAL IN. This is an 8-bit serial data input from an external speech ROM. 22 (input) TEST This pin should be grounded for normal operation. A logic 1 places the SP0264 in its test mode. Dss00120-4 © Microchip Technology Ino.

23 Vo1 Powrer supply for the microprocessor interface logic

and controller. When not tied to Voo, Vo1 must remain high. 24 (output) DIGITAL OUT Pulse width modulated digital speech output which, when filtered by a 5kHz low pass filter and amplifier, will drive a loudspeaker. 25 (input) SBY RESET STANDBY RESET. A logic 0 resets the microproces- sor interface logic and the address laiches, Must be returned to logic 1 for normal operation. SBY RESET must be tled to RESET (pin 2). 26 (output) ROM CLOCK This Is a 1.566MHz clock output used to drive an external serial speech ROM. 27 (input) osc XTAL IN. Input connection for a 3.12MHz crystal. 28 (output) osc2 XTAL OUT. Output connection for a 3.12MHz crystal. © Microchip Technology Inc. 08500120-5

• i SP0264 00 7-13

ELECTRICAL CHARACTERISTICS

Absolute maximum ratings over specified *Exoeeding these ratings could cause permanent dam- temperature range (unless otherwise noted)" age to the device. This is a stress rating only and functional operation of this device at these conditions is . conditions for extended periods may affect device relia- Standard Conditions bility, DC CHARACTERISTICS [Parameter | vm | win | typ | tne | unt [Conctone | Primary Supply Voltage Vo | 45] - | 65] Vv Standby Supply Voltage Vor 45 - 65 Vv Primary Supply Current too - | 35 | 65 | mA- | Resol and SBY Reset high. OSC1 = 3.12MHz. All other inputs floating. Standby Supply Current (o1 . 15 26 mA _| Same as above. INPUTS A1-AB, ALD, SERIN, TEST, SE LOGIC 0 vit 0.0 . 0.6 v LOGIC 1 Vet 24 - Vo1 v CAPACITANCE Cn - - 10 pf | 0 volts bias, f= 3.12 MHz LEAKAGE kh - - +10 pA | VIN = 7.0V Other Pins = 0.0V RESET, SBY RESET LOGIC 0 Vrsi. | 0.0 - 0.6 v . LoGic1 Vrsit | 4.0 - Vo1 Vv] Vor = 4.5V 46 - Vor v Vo1 = 6.5V OUTPUTS SBY, Digital Out, C1, C2, C3, TRG, ROM DIS, ROM CLK, SEROUT ‘ LoGic 0 vo. | 0.0 | - | 06 | V_ | lot =0,72mA (2LS TTL Loads) LOGIC 1 VoH 25 - Voi Vv lou = -S0uA (2LS TTL Loads) OSCILLATOR OSC2 (Output) When driven from ext. input LoGic 0 Va | 0.0] - | 1.0 | V_ | OSC (input) =4,00V MIN at Vo1 = 4.50V LOGIC 1 VoH 25 - Vo1 v OSC1 (input) = 0.60V MAX Short Circuit Current on Isc 75] - 0.4 | mA | OSC1 (input) = 0.60V ) osc2 OSC2 (output) = 0,00V OSC1 Input Current {iN 49 - 0.4 HA | OSC1 (input) = 0.00V DS50012¢-6 © Microchip Technology Inc.

AC CHARACTERISTICS - ALD HANDSHAKE CONTROL Ce AD towt 200 960 200 < ALD < 960ns A1-A8 SetUp : ts1 160 : Hold tht 160 : tRQ tpdt - 900 SBY tpd2 : 300 wf aim mies J or) H H =—— om ' fet ADDRESS LATCHED ON AID FagING EDGE we ua an . —_ = AC CHARACTERISTICS - LRQ HANDSHAKE CONTROL (BUFFERS FULL) [renee | Sym | wn || Max] Unto] conotons —_—| A1-AB Set Up ts2 - ns | ALD >960ns Hold the . ns tho tpdt 800 | ns SBY tpd2 300 | ns aD t aN 1 wrt RE sae Ft wax ADDRESS LATCHED OW INTERNAL ALD RISING EDGE INTERNAL ALD 980ns |} . te2 sho AVAB H oR =~ Fev sBY a i nh a © Microchip Technology Inc. 0S50012C-7

H SP0264 AC CHARACTERISTICS - LRQ HANDSHAKE CONTROL (BUFFERS EMPTY) | Parameter | Sym | min | typ | max |unte | conditions | TRa 16.67 33.3 Address Butfer ready . for next load. TYPICAL TIMING SEQUENCE RESET ze) ' PROCESSOR CAN LOAD DATA ANY | TIME AFTER LRQ GOES LOW ioe ee ee a ec tpd3 ‘START OF SECOND SEQUENCE sBY - START OF FIRST SPEECH SEQUENCE j AC CHARACTERISTICS - RESET TIMING | Parameter | Sym | Min | Typ | max |unte | Conditions | Clock F 3.11 Crystal oscillator driven Clock Duty Cycle - 48 from external. Reset, SBY Reset tpw2 25 SBY RESET, RESET ~]___ Rme eS . DS50012C-8 ® Microchip Technology Inc.

. —- -__- T-77-13 EXTERNAL ROM INTERFACE TIMING : ; ; e— oA} } tt cs j__\\ H ! 5 1 SER OUT ! Ais J Ate J Ars i to i 1 SER IN 4 (dai X_Ds X D2 X_Ds XDs PCLOAD | ASRLOAD 1 | DSR SHIFT OUT OSR LOAD | ‘ 1 RET REG LOAD ! H 1 ! : |_Parameter | 8ym_| min typ | max | units | Congtions | Access Time . Serial Setup Time EXTERNAL ROM INTERFACE TIMING ROM CLOCK C1, C2,C3 . SEROUT tece ROM CLOCK 4 SERIAL IN tapin © Microchip Technology Inc, : 08500126-8

$P0264 EXTERNAL AND INTERNAL Sic2c3 PC. The DSALO will also CONTROL LINES* shift out the LSB of the 8 bit DSR and increment the (All synchronous to the ROM clock) PC. c1cecs 1 © 0 DSRSH — -(Data Shift Register Shift) — , Shifts data out of DSR reg 0 0 0 NOP «No Action Taken euooWamedea 0 0 1 ASRLD -(Address Shift Register Load) with the occurrence of a Serially shifts data (MSB first) (9 Dee rocre are seven from the serial address out DSRSH's every pin (also occurs Internally in DSALD (not necessarily the SP0264 into the ASR consecutive). in preparation for loading into the PC). The ASRLD 1 0 1 STACKLD -Loads the STACK with the loads 16 bits of the ASR. current value of the PC, with two 8 bit load sequences Smee yA FED. 1 1 8 RET een 0 1 0 PCLD ~ Loads the contents of the 144 wa in whe ASR register into the PC. occur in SP0264 when Occurs only after 16 ASRLDS SBY RESET and RESET = "0". have occurred. 0 1 1 DSRLD -(Data Shift Register Load) Loads the 8 bit data shift “All ROMs including the SP0264 internal ROM will be register with the contents activated by the above control lines. However, only the of the ROM pointed to by ROM with the current chip select will be enabled to send the current address in the speech data to the SP0264, Typical Application: Stand Alone Configuration ow aw oa ies Hate ioe x aN iit mmowe es eee ns ee be ee eet soy! ata ar tt wavs Set ad sane im “ | ao rr aol 2 Pe i 12 > yey y 1 ee 7 Oigt ser rw nen toa Oinf ww osc? ae tT 100K. a = _ = Lig pas TayREeT zapl Ves ES] ott Ta] * Diode possibly necessary If power is tuned off than on in less than 50 ma, ps DS50012C-10 © Microchip Technology Inc.

Typical Application: Microprocessor Interface ry wv Opt ee ©) £0) — , tet ¥ AUDIO AMP Mtoe. | Mote ees eet TT cat "0.022 pt font — + ¥ ourruT mB oo uF vee 1¢ prciess ‘sees rd 5. (ont f= a pia Yoo cst Dat weur ina ean grees 10 sencuT} = 2h ens asp are . ‘sv Ph re t L 4 wea & oo oe NOTE: SHOWN IS FOR Vas Test bea a} semnaa opt 7 2 wa SPEECH PROCESSOR EXTERNAL SEWVAL SPEECH ROM ee © Microchip Technology Inc, p8500120-11

To order or to obtain information, ¢.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. PART NUMBERS sp0264 + 1/P Package: L PLOC | D Ceramic DIF J Cerdip DIP P Plastic DIP S Die in Wafter Pack Temperature - ot Cw70'° Range: 1 4 Ooes'c Device ‘SP0264 Speech Processor Microchip Technology Incorporated Printed in USA © 8904 LS United States France Japan Factory: General Instrument Microelectronics Microchip Technology Inc. Microchip Technology Inc. Immeuble "Expansion" 4F Madre Matsuda Building

2355 W Chandler Blvd, 9/11, Rue Georges Enesco 4-13, Kioi Cho

Chandler, AZ 85224-6199 F-94008 Cretell Cedex Chiyoda-Ku, Tokyo 102 (602) 963-7373 (1) 43.99,12.63 3/2348774 Sales Offices: West Germany Singapore Mid-West: (312) 505-0022 General instrument Microelectronics Quadrep Marketing (S) PTE Ltd. New England: (617) 272-8030 Freischuetzstr. 96 1 Selegie Road, #09-06 Paradlz Centre South-East: (404) 642-6933 Posttach 810328 Singapore 0718 South-Central: (214) 733-0391 —_p.g000 Muenchen 81 3994630 North-West: (408) 436-7950 (ogg) 95997-95 South-West: (213) 323-1888 - Taiwan United Kingdom Microchip Technology Taiwan General instrument Microelectronics c/o General instrument Times House, Ruislip 233 Pao Chiao Road, Hsin Tien Middlesex, HA4 6LE Talpel Hsien (0895) 636141 29146234 Hong Kong Korea Arizona Microchip Technology Lid. Microchip Technology Ltd., ™ Room 1103, Tower 1, fo Dae Ho Corporation Microchip South Seas Centre 1004, Keo Yang Bidg. 75, Mody Road 51-8 Soosong Dong, Chongro-Ku Tsimshatsul East, Kowloon Seoul 9/3116103 2/7398543 CToeuumed by Mlrecip Techodoyy twin tpt bs eetoey ere such kde? en eeaionon or wane von Ondine WARY ——— DS50012C-12 © Microchip Technology Inc.