SMI5027 SEMTECH | Alldatasheet

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Technical content

WWW.SEMTECH.COM SIERRA MONOLITHICS SMI5027

56 Gbps 16:2 Multiplexer/CMU with DQPSK Precoder

SMI5027 is 16:2 Multiplexer with on chip clock multiplier unit and DQPSK Precoder that supports data rates up to 56Gbps consistent with the SFI-5 standards. Product Highlights

4 User-Enabled DQPSK Precoder Function

4 SFI-5 Compliant FIFO and Deskew functions

4 Dual Ground-Referenced High-Speed Single-Ended

 0.3 to 0.7 Volt pp SE Output Level  11 psec (typical) Rise/Fall Times  3.7 psec p-p total jitter (typical)  Data-to-Data Skew Adjustments for Each Output Data Lane; +/- 0.25UI

4 High-Speed Differential Clock Outputs with Highly

Stable Clock-Data Skew and Low Phase Noise  Full (27.8 nominal) and Half-Rate (13.9 GHz nominal) CML Clocks  Skew control of +/- 0.5UI  0.8 Volt pp Differential Output Level

4 SONET-compliant Clock Multiplier Unit (CMU) with VCO

4 Three User Selectable Reference Clock Input Ports

 Input reference clock rate is 1/4th client-side baud rate: 862.500 to 884.375 MHz

4 Reference Clock Clean-Up Loop Circuitry

4 On-Chip PRWS Error Checker and Pattern Generator:

27-1 or 231-1 industry-standard patterns  On-chip error counter for measuring BER  Lane-by-lane error checking 4 SPI Control Interface Supports 1.2V or 1.8V LVCMOS

4 Temperature Sense Output Voltage

4 Dual-Power Supply Voltages: +1.2 or +1.8V and -2.8V 4 Low Power Consumption: 2.4 Watts

Applications

4 OTU4/100GE Modules and Transponders

4 IP Routers and Switches

OPTICAL TRANSPORT & DATACOM PRODUCTS

WWW.SEMTECH.COM SIERRA MONOLITHICS 16: Deskew TXDATA[15]P/N TXDSCP/N TXDATA[14]P/N TXDATA[1]P/N TXDATA[0]P/N RESET_N DESKEW_EN TXDATAOUT[1] TXCKSRCP/N REFPLL P/N PHSERR_DNP/N Channel DLL Array HSCLK[0]P/N TXREFCLKP/N TXMCLKP/N TXMCLK_EN -1.6V Regulator PHSERR_EN FRAME_EPOCH HSCLK[1]P/N PHSERR_UPP/N TXDCKP/N SFI-5 Transmit Controller VEE_VCO VCC_VCO VDD_SFI5 VCC VEE VDD Digital PTAT Temp. Sensor R TXDATAOUT[0] PRBS Error Checker DQPSK Precoder PRECODER_EN Clock Multiplier Unit (CMU) HSCLK0_PH[7:0] DAC HSCLK0 _EN TXOOA CMU_LOCK FRAME_LOCK TX_TEMP REFN16_OUT PLL DLLCLK_SEL FRAME_EPOCH_EN WRCLK_15 WRCLK_0 . .. 1, ½ HSCLK1_PH[7:0] DAC 2:1 Phase Detect REFSEL 2:1 Deskew Correlator PRBS Pattern -1.6V Reference REFN16_IN Frame Header Acquistion Mux TXDATA1_PH [7:0] DACTXDATA1_LVL[7:0] 17xN Channel FIFO Array TXDATA_SEL[1:0] 1, ½ HSCLK0_FSEL DAC TXDATA0_PH[7:0] DACTXDATA0_LVL[7:0] DAC HSCLK1_FSEL DATA_15 DATA_0 SFI-5 Block PRBS Block Mux Block CMU Block Ref Select Block ADC TEMP Data Select Fixed Data DACHSCLK0_ LVL [7:0] HSCLK1 _EN DACHSCLK1_ LVL [7:0] TXDATA1 _EN TXDATA0 _EN SPI_EN_N SPI_CLK SPI_DIN SPI_DOUT SPI Subsystem Control DACs Control logic Status TXLF_P TXLF_N Diode Temp. Sensor GTEMP_P GTEMP_N RESN RESP

1.0 KBias Current

LVCMOS (1.2, 1.8V) SMI5027 Block Diagram — 16:2 Multiplexer/CMU with DQPSK Precoder Sierra Monolithics Inc. is now part of Semtech Incorporated. To view the most current product specifications and datasheets, contact your local Semtech Field Applications Engineer.