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5.2 A, 40 V , RDS(ON) 43 m

N-Channel Enhancement MOSFET Elektronische Bauelemente 30-Dec-2010 Rev. A Page 1 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. SC-59 Top View A L C B D G H JF K E 1 2 RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free

DESCRIPTION

These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones.

FEATURES

 Low R DS(on) provides higher efficiency and extends battery life.  Low thermal impedance copper leadframe SC-59 saves board space.  Fast switching speed.  High performance trench technology.

PACKAGE INFORMATION

SC-59 3K 7’ inch ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Symbol Rating Unit Drain-Source Voltage VDS 40 V Gate-Source Voltage V GS ±20 V Continuous Drain Current 1 TA=25°C ID 5.2 A TA=70°C 4.1 Pulsed Drain Current 2 I DM 30 A Continuous Source Current (Diode Conduction) 1 I S 1.6 A Power Dissipation 1 TA=25°C PD 1.3 W TA=70°C 0.8 Operating Junction and Storage Temperature Range TJ, TSTG -55 ~ 150 °C Thermal Resistance Data Maximum Junction to Ambient 1 t≦5 sec RθJA 100 °C/W Steady-State 166 Notes 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature. REF. Millimeter REF. Millimeter Min. Max. Min. Max. A 2.70 3.10 G 0.10 REF. B 2.25 3.00 H 0.40 REF. C 1.30 1.70 J 0.10 0.20 D 1.00 1.40 K 0.45 0.55 E 1.70 2.30 L 0.85 1.15 F 0.35 0.50 ESD Protection Diode 2KV

N-Channel Enhancement MOSFET Elektronische Bauelemente 30-Dec-2010 Rev. A Page 2 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise specified) Parameter Symbol Min Typ Max Unit Test Conditions Static Gate-Threshold Voltage V GS(th) 1 - - V V DS = VGS, ID = 250μA Gate-Body Leakage I GSS - - ±10 μA V DS = 0V, VGS= 20V Zero Gate Voltage Drain Current I DSS - - 1 μA VDS = 32V, VGS= 0V - - 25 V DS = 32V, VGS= 0V, TJ=55°C On-State Drain Current 1 I D(ON) 20 - - A V DS = 5V, VGS= 10V Drain-Source On-Resistance 1 R DS(ON) - - 43 mΩ VGS= 10V, ID = 5.2A - - 50 V GS= 4.5V, ID = 4.2A Forward Transconductance 1 g FS - 40 - S V DS= 15V,,ID = 5.2A Diode Forward Voltage V SD - 0.7 - V I S= 2.3A, VGS= 0V Dynamic 2 Total Gate Charge Q g - 4.0 - nC ID= 5.2A VDS= 15V VGS= 4.5V Gate-Source Charge Q gs - 1.1 - Gate-Drain Charge Q gd - 1.4 - Turn-On Delay Time Td (ON) - 16 - nS ID= 1A, VDD= 25V VGEN= 10V RL= 25Ω Rise Time T r - 5 - Turn-Off Delay Time Td (OFF) - 23 - Fall Time T f - 3 - Notes 1. Pulse test ：PW ≦ 300 us duty cycle ≦ 2%. 2. Guaranteed by design, not s ubject to production testing.