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Technical content
P-Channel Enhancement MOSFET Elektronische Bauelemente 07-Jul-2010 Rev. A Page 1 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. SC-59 Top View A L C B D G H JF K E 1 2 RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free
DESCRIPTION
The miniature surface mount MOSFETs utilize a high cell density process Low RDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are lower voltage application, power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones.
FEATURES
Low R DS(on) provides higher efficiency and extends battery life. Fast Switch. Low Gate Charge. Miniature SC-59 surface mount package saves board space. PRODUCT SUMMARY PRODUCT SUMMARY VDS(V) RDS(on) ( ID(A) ABSOLUTE MAXIMUM RATINGS AND THERMAL DATA(TA = 25°C unless otherwise specified) PARAMETER SYMBOL RATING UNIT Drain-Source Voltage VDS -30 V Gate-Source Voltage V GS ±12 V Continuous Drain Current A TA=25°C ID ±3.6 A TA=70°C ±2.9 Pulsed Drain Current B I DM ±10 A Continuous Source Current (Diode Conduction) A I S 0.4 A Power Dissipation A TA=25°C PD 1.25 W TA=70°C 0.8 Operating Junction and Storage Temperature Range TJ, TSTG -55 ~ 150 °C THERMAL RESISTANCE DATA Maximum Junction to Ambient A t≦5 sec RθJA 100 °C/W Steady-State 150 Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature. Gate Source Drain REF. Millimeter REF. Millimeter Min. Max. Min. Max. A 2.70 3.10 G 0.10 REF. B 2.25 3.00 H 0.40 REF. C 1.30 1.70 J 0.10 0.20 D 1.00 1.40 K 0.45 0.55 E 1.70 2.30 L 0.85 1.15 F 0.35 0.50
P-Channel Enhancement MOSFET Elektronische Bauelemente 07-Jul-2010 Rev. A Page 2 of 2 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.
ELECTRICAL CHARACTERISTICS
(T A=25°C unless otherwise specified) PARAMETER SYMBO MIN TYP MAX UNIT TEST CONDITIONS Static Gate-Threshold Voltage V GS(th) -0.80 - - V V DS = VGS, ID = -250μA Gate-Body Leakage I GSS - - ±100 nA V DS = 0V, VGS= ±12V Zero Gate Voltage Drain Current I DSS - - -1 μA VDS = -24V, VGS= 0V - - -10 V DS = -24V, VGS= 0V, TJ=55°C On-State Drain Current A I D(ON) -2 - - A V DS = -5V, VGS= -4.5V Drain-Source On-Resistance A R DS(ON) - - 57 mΩ VGS= -4.5V, ID = -3.6A Forward Transconductance A g FS - 2 - S V DS= -5V,,ID = -3.6A Diode Forward Voltage V SD - -0.70 - V I S= -0.4A, VGS= 0V Dynamic b Total Gate Charge Q g - 25 - nC ID= -3.6A VDS= -10V VGS= -5V Gate-Source Charge Q gs - 2.4 - Gate-Drain Charge Q gd - 3.9 - Turn-On Delay Time Td (ON) - 7.6 - nS VDS= -15V ID= -1A VGEN= -10V RG= 50Ω Rise Time T r - 6.8 - Turn-Off Delay Time Td (OFF) - 33.6 - Fall Time T f - 23.2 - Notes a. Pulse test ：PW ≦ 300 us duty cycle ≦ 2%. b. Guaranteed by design, not subject to production testing.