SM813XXX

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Document overview

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Technical content

Features

• Generates Up to 8 Differential or Single-Ended Outputs
• <65 fs Phase Jitter @ 156.25 MHz (1.875 MHz to

20 MHz)

• <115 fs Phase Jitter @ 156.25 MHz (12 kHz to
• On-Chip Power Supply Regulation for Excellent Power Supply Noise Immunity
• Two High-Performance PLL Synthesizers to Generate Multiple Frequencies
• Independently Programmable Output Logic and Frequency: - Output Logic: LVPECL, LVDS, HCSL, LVCMOS
• Fundamental Mode Crystal: 31.25 MHz to

156.250 MHz

• No External Crystal Oscillator Capacitors Required
• 2.5V or 3.3V Operating Power Supply
• Separate Output Power Supplies: - Each Bank can be at Different Power Supply Voltage Levels (4 Banks of 2 Outputs Each)
• Industrial Temperature Range, –40°C to +85°C
• Green, RoHS-, and PFOS-Compliant 48-Pin 7 mm x 7 mm QFN Package

Applications

• 1/10/40/100 Gigabit Ethernet (GbE)
• S O N E T / S D H
• PCI-Express
• CPRI/OBSAI – Wireless Base Station
• Fibre Channel
• SAS/SATA
• DIMM (DDR2/DDR3/AMB)
• HDMI General Description The SM813xxx is a dual-PLL clock generator that achieves ultra-low phase jitter (<65 fsRMS). With 8 total outputs and dividers on each output, this device can generate 8 different frequencies up to 850 MHz, from a low-cost quartz crystal. Each of 8 outputs can be independently programmed to LVPECL, LVDS, HCSL, or LVCMOS logic. For LVCMOS, only the true side of the channel is used. The SM813xxx is packaged in a 48-pin QFN with up to 8 outputs. Package Type 14 15 16 17 18 19 20 48 47 46 45 44 43 42 41 VDDAP2 VDD QC1 VDDOC /QC1 QC2 /QC2 OEC VDDI2 DNC DNC VSS VSS VDDI1 XIN XOUT 21 22 23 QD1 VDDOD /QD1 40 38 VSS DNC DNC SM813xxx GND /QD3 QD3 VDDOD OED DNC DNC DNC VDDOB QB2 DNC 12VSS VDD /QA1 QA1 VDDOA /QA2 QA2 VDDOA OEA /QB1 QB1 VSS OEB /QB2 VDDAP1 SM813XXX 48-Pin QFN (M) Flexible Ultra-Low Jitter Clock Synthesizer

DS20005538B-page 2  2016 Microchip Technology Inc. Functional Block Diagram PLL1 XO QA1 QA2 QB1 QB2 PLL2 QC1 QC2 QD1 QD3 VDD POWER RAIL REGULATION OTP MEMORY VDD VSS OED OEC OEB OEA VSSOD VSSOC VSSOB VSSOA

2222 VDDOD

 2016 Microchip Technology Inc. DS20005538B-page 3 SM813XXX

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings † Operating Ratings ‡ † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this s pecification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ‡ Notice: The device is not guaranteed to function outside its operating ratings. Note 1: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 kΩ in series with 100 pF. Note 1: Supply current may change depending on the device’s configuration. TABLE 1-1: ELECTRICAL CHARACTERISTICS Electrical Characteristics: Typical values are TA = +25°C, min./max. across –40°C ≤ TA ≤ +85°C, unless otherwise noted. Symbol Parameters Min. Typ. Max. Units Condition VDD, VDDO Supply Voltage 2.375 2.5 2.625 V 2.5V Operation 3.135 3.3 3.465 3.3V Operation VDDI1, VDDI2 Analog Supply Voltage 2.375 — 3.465 V — VDDA PLL Core Voltage 2.375 — 3.465 V — IDDA PLL Core Current Consumption (Note 1) — — 60 mA Per Active PLL IDDI Analog Current Consumption (Note 1) ——1 0 m A — IDDO Output Stage Current Consumption (Note 1) — — 70 mA Per Output Bank, Unloaded. IDD Miscellaneous Logic — — 8 mA —

DS20005538B-page 4  2016 Microchip Technology Inc. TABLE 1-2: LVPECL DC ELECTRICAL CHARACTERISTICS noted. RL = 50Ω to VDDO - 2V. Symbol Parameters Min. Typ. Max. Units Conditions VOH Output High Voltage V DDO - 1.35 VDDO - 1.01 VDDO - 0.8 VOL Output Low Voltage V DDO - VDDO - 1.78 VDDO - 1.6 VSWING Peak-to-Peak Output Voltage 0.65 0.77 0.95 V Figure 4-3 TABLE 1-3: LVDS DC ELECTRICAL CHARACTERISTICS noted. RL = 100Ω between Q and /Q. Symbol Parameters Min. Typ. Max. Units Conditions VOD Differential Output Voltage 245 350 530 mV Figure 4-3 VCM Common Mode Voltage 1.125 1.2 1.375 V — VOH Output High Voltage 1.248 1.375 1.602 V — VOL Output Low Voltage 0.898 1.025 1.252 V — TABLE 1-4: HCSL DC ELECTRICAL CHARACTERISTICS noted. RL = 50Ω to VSS. Symbol Parameters Min. Typ. Max. Units Conditions VOH Output High Voltage 660 700 850 mV — VOL Output Low Voltage –150 0 27 mV — VCROSS Crossing Point Voltage — 350 — V — TABLE 1-5: LVCMOS DC ELECTRICAL CHARACTERISTICS noted. RL = 50Ω to VDDO/2. Symbol Parameters Min. Typ. Max. Units Conditions VOH Output High Voltage V DD - 0.8 — — V Highest Drive (default) VOL Output Low Voltage — — 0.5 V — VIH Input High Voltage V DD - 0.7 —V DD + 0.3 VIL Input Low Voltage V SS - 0.3 — 0.3 x VDD IIH Input High Current — — 5 µA V DD = VIN = 3.465V IIL Input Low Current –150 — — µA V DD = 3.465V, VIN = 0V TABLE 1-6: CRYSTAL CHARACTERISTICS Parameters Min. Typ. Max. Units Conditions Mode of Oscillation Fundamental, Parallel Resonant — Frequency 31.25 — 156.25 MHz —

 2016 Microchip Technology Inc. DS20005538B-page 5 SM813XXX Note 1: See Figure 4-6. 2: Output-to-output skew is defined as skew between outputs at the same supply voltage and with equal load conditions. It is measured at the output differential crossing points. 3: Output-to-output skew is only defined for outputs in the same PLL bank [A:B, C:D] with the same output logic type setting. 4: All phase noise measurements were taken with an Agilent 5052B phase noise system. 5: Measured using a 52.0833 MHz crystal as the input reference source. There are sufficient feedback dividers to support below 20 MHz, down to about 12 MHz, but phase noise performance will be impacted. Please contact Microchip TCG Applications for more information. Equivalent Series Resistance (ESR) — — 80 Ω Saunders 250B, 25Ω Pi Network Load Capacitance (CL) — 8 — pF Device Equivalent Load Shunt Capacitor, C0 — 1 2 pF — Correlation Drive Level — 10 100 µW — TABLE 1-7: AC ELECTRICAL CHARACTERISTICS Symbol Parameters Min. Typ. Max. Units Conditions FIN Input Frequency 31.25 50 156.25 MHz XO FOUT Output Frequency 12 — 850 MHz LVPECL, LVDS, HCSL 12 — 250 LVCMOS tr/tf Output Rise/Fall Time (Note 1) 85 135 350 ps LVPECL Output 85 140 300 LVDS Output 175 300 450 HCSL Output 100 200 400 LVCMOS Output ODC Output Duty Cycle 45 50 55 % All Output Frequencies 48 50 52 <350 MHz Output Frequencies TSKEW Output-to-Output Skew (Note 2, Note 3) ——5 0p s Note 3, Same Output Bank TLOCK PLL Lock Time — 5 20 ms V DD = 90% Tjit(Ø) RMS Phase Jitter (Note 4, Note 5) — 112 150 fs Integration Range 12 kHz -

20 MHz

— 64 — Integration Range 1.875 MHz - TABLE 1-6: CRYSTAL CHARACTERISTICS (CONTINUED) Parameters Min. Typ. Max. Units Conditions

DS20005538B-page 6  2016 Microchip Technology Inc. TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Ambient Temperature T A –40 — +85 °C Note 1 Storage Temperature Range T S –65 — +150 °C — Lead Temperature — — — +260 °C Soldering, 20s Case Temperature — — — +115 °C — Package Thermal Resistances Junction Thermal Resistance QFN, Still Air Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +85°C rating. Sustained junction temperatures above +85°C can impact the device reliability.

 2016 Microchip Technology Inc. DS20005538B-page 7 SM813XXX

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number Pin Name Pin Type Pin Level Description 34, 35 QA1, /QA1 O (DIF, SE) LVPECL LVDS HCSL LVCMOS (Q only) Differential/Single-Ended Clock Output (LVCMOS) 31, 32 QA2, /QA2 27, 28 QB1, /QB1 22, 24 QB2, /QB2 3, 5 QC1, /QC1 6, 7 QC2, /QC2 9, 11 QD1, /QD1 15, 16 QD3, /QD3 2, 36 V DD PWR — Power Supply 30, 33 V DDOA PWR — Power Supply for Outputs QA1–2

23 V DDOB PWR — Power Supply for Outputs QB1–2

4V DDOC PWR — Power Supply for Outputs QC1–2 10, 14 V DDOD PWR — Power Supply for Outputs QD1 and QD3

37 V DDAP1 PWR — Power Supply for PLL1

1V DDAP2 PWR — Power Supply for PLL2 43 V DDI1 PWR 3.3V Only Power Supply for Input Circuits 44 V DDI2 PWR 3.3V Only Power Supply for Input Circuits 12, 26, 38 47, 48, ePAD VSS (Exposed Pad) PWR — Power Supply Ground. The exposed pad must be connected to the VSS ground plane.

29 OEA1/2 I, (SE) LVCMOS Output Enable, Outputs QA1/2 disable to tri-state,

0 = Disabled, 1 = Enabled, on-chip 75 kΩ pull-up

25 OEB1/2 I, (SE) LVCMOS Output Enable, Outputs QB1/2 disable to tri-state,

0 = Disabled, 1 = Enabled, on-chip 75 kΩ pull-up

8 OEC1/2 I, (SE) LVCMOS Output Enable, Outputs QC1/2 disable to tri-state,

0 = Disabled, 1 = Enabled, on-chip 75 kΩ pull-up

13 OED1/3 I, (SE) LVCMOS Output Enable, Outputs QD1/3 disable to tri-state,

0 = Disabled, 1 = Enabled, on-chip 75 kΩ pull-up

42 XIN I, (SE) 8 pF

Crystal Reference Input, no load caps needed

41 XOUT O, (SE) 8 pF

Crystal Reference Output, no load caps needed 18, 19, 20, DNC DNC — Leave open; for normal operation, do not connect to anything.

17 GND I — This pin is not Power Supply ground, but must be tied to V SS for

proper operation.

DS20005538B-page 8  2016 Microchip Technology Inc.

2.1 Key Programmable Parameters

FIGURE 2-1: Frequency Settings for One PLL and One Output Bank. The VCO in the PLL has a range of ~2875 MHz to 3510 MHz. Counters M and P0 have a range of 4 to 259. Counters P1, P2, and P3 have a range of 1 to 16. EQUATION 2-1: EQUATION 2-2: EQUATION 2-3:

2.1.1 OUTPUT LOGI C PROGRAMMING

Available output logic types are LVPECL, LVDS, HCSL, and LVCMOS. Each output can be programmed individually to one of the four logic types. All logic types are differential, except LVCMOS. For LVCMOS, only the true chann el of the output pair is enabled and the complementary channel is disabled. With LVCMOS there is also an output drive setting. There is one setting for all LVCMOS outputs, so all LVCMOS outputs will have the same drive strength. Unused outputs are disabled to high impedance. TABLE 2-2: TRUTH TABLE OEA OEB OEC OED Output 0111 2 Q A o u t p u t s t r i - s t a t e 1011 2 Q B o u t p u t s t r i - s t a t e 1101 2 Q C o u t p u t s t r i - s t a t e 1110 2 Q D o u t p u t s t r i - s t a t e QD1 QD3 REF PLL VCOPHASE DETECTOR M P0 P1 FVCO REF M= QD1 FVCO P0 P1= QD3 FVCO P0 P3=

 2016 Microchip Technology Inc. DS20005538B-page 9 SM813XXX

3.0 PHASE NOISE PERFORMANCE

FIGURE 3-1: 156.25 MHz, LVPECL Integration Range 1.875 MHz to 20 MHz: 64 fsRMS.

DS20005538B-page 10  2016 Microchip Technology Inc. FIGURE 3-2: 156.25 MHz, LVPECL Integration Range 12 kHz to 40 MHz: 112.4 fsRMS.

 2016 Microchip Technology Inc. DS20005538B-page 11 SM813XXX FIGURE 3-3: 156.25 MHz, LVDS Integration Range 12 kHz to 20 MHz: 105 fsRMS.

DS20005538B-page 12  2016 Microchip Technology Inc.

4.0 APPLICATION INFORMATION

4.1 Crystal Layout

Keep the layers under the crystal as open as possible and do not place switching signals or noisy supplies under the crystal. Crystal load capacitance is built inside the die, so no external capacitance is needed. See the ANTC207 application note for further details. If you need help selecting a suitable crystal for your application, contact Microchip’s TCG applications group at: tcghelp@microchip.com.

4.2 Output Traces

Design the traces for the output signals according to the output logic requirements. If LVCMOS is unterminated, add a 30 Ω resistor in series with the output, as close as possible to the output pin, and start a 50Ω trace on the other side of the resistor. For differential traces, use either a differential design or two separate 50Ω traces. For EMI reasons, it is better to use a balanced differential design. LVDS can be AC-coupled or DC-coupled to its termination.

4.3 Power Supply Filtering

• Use the power supply filtering shown in Figure 4-1 for VDDAP1, VDDAP2, VDDI1 and VDDI2.
• Connect the V DDO and VDD pins directly to the VDD power plane.
• Connect all V SS pins directly to the ground power plane.
• Recommended ferrite bead properties are 80Ω to 240Ω impedance and >250 mA saturation current.
• To improve power supply filtering beyond what a ferrite bead can provide, Microchip’s Ripple Blocker™ provides a solution. MIC94300 or MIC94310 are recommended parts. The filter circuit with Ripple Blocker is shown in Figure 4-2 and can be used for any of the above V DD sections in Figure 4-1. FIGURE 4-1: Recommended Power Supply Filtering. FIGURE 4-2: Power Supply Filtering with Ripple Blocker. FIGURE 4-3: Duty Cycle Timing. FIGURE 4-4: All Outputs Rise/Fall Time. FIGURE 4-5: RMS Phase Noise/Jitter.

DS20005538B-page 14  2016 Microchip Technology Inc.

5.0 PACKAGING INFORMATION

48-Lead QFN 7 mm x 7 mm Package Outline and Recommended Land Pattern Note: For the most current package drawings, please se e the Microchip Packaging Specification located at http://www.microchip.com/packaging TITLE

48 LEAD QFN 7x7mm PACKAGE OUTLINE & RECOMMENDED LAND PATTERN

DRAWING # QFN77-48LD-PL-1 UNIT MM NOTE: 1. MAX PACKAGE WARPAGE IS 0.05mm. 2. MAX ALLOWABLE BURR IS 0.076mm IN ALL DIRECTIONS. 3. PIN #1 IS ON TOP WILL BE LASER MARKED. 4. RED CIRCLE IN LAND PATTERN INDICATES THERMAL VIA. SIZE SHOULD BE 0.30-0.35mm IN DIAMETER AND SHOULD BE CONNECTED TO GND FOR MAX THERMAL PERFORMANCE. PITCH is 1.00mm. 5. GREEN RECTANGLES (SHADED AREA) REPRESENT SOLDER STENCIL OPENING ON EXPOSED PAD AREA. RECOMMENDED SIZE IS 1.00x1.00mm, SPACING IS 0.25mm. NOTE: 1, 2, 3 0.25±0.05 5.50 Ref.

0.50 Bsc

0.40±0.05 PIN #1 ID CHAMFER 0.35x45° 7.00±0.05 7.00±0.05 Top View NOTE: 1, 2, 3 Bottom View 0.85±0.05 0.253 (REF) 0.00-0.05 NOTE: 1, 2, 3 Side View 5.10±0.05 Exp.DAP 5.10±0.05 Exp.DAP

 2016 Microchip Technology Inc. DS20005538B-page 15 SM813XXX Note: For the most current package drawings, please see the Microchip Packaging S pecification located at http://www.microchip.com/packaging POD-Land Pattern drawing #: QFN77-48LD-PL-1-C

DS20005538B-page 16  2016 Microchip Technology Inc. NOTES:

 2016 Microchip Technology Inc. DS20005538B-page 17 SM813XXX APPENDIX A: REVISION HISTORY Revision A (March 2016)

• Initial release of data sheet. Revision B (April 2016)
• Added maximum jitter value to Table 1-7.

DS20005538B-page 18  2016 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) SM813xxxUMG: Flexible Ultra-Low Jitter Clock Synthesizer, Factory- Assigned Part Number, 2.5V/3.3V Power Supply, 48-Pin QFN, –40°C to +85°C Temp. Range, Tray Shipping b) SM813xxxUMG-TR: Flexible Ultra-Low Jitter Clock Synthesizer, Factory- Assigned Part Number, 2.5V/3.3V Power Supply, 48-Pin QFN, –40°C to +85°C Temp. Range, Tape & Reel Shipping PART NO. XX ShippingDevice Device: SM813: Flexible Ultra-Low Jitter Clock Synthesizer Part #: xxx = Factory-Assigned from User Design Power Supply: U = 2.5V/3.3V Package: M = 48-Pin 7 mm x 7 mm QFN Temperature: G = –40°C to +85°C Shipping: Blank = Tray TR = Tape & Reel X Power Supply X Package X Temperature xxx Part # Package Options Package Option: #5, (Note 1) Number of Outputs: OE Control: Yes Note 1: Use the ClockWorks Configurator web tool via the SM813xxx product page to determine the desired configuration. The desired configuration also determines the part number (xxx variable) that the factory assigns to the design.

 2016 Microchip Technology Inc. DS20005538B-page 19 SM813XXX NOTES:

 2016 Microchip Technology Inc. DS20005538B-page 21 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0448-4 Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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