SM6102P NPC | Alldatasheet

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au {[- Cc SM6102P/S NIPPON PRECISION CIRCUITS LTD. 8-bit, Flash A/D Converter OVERVIEW PACKAGE DIMENSIONS The SM6102 is a high-speed, 8-bit A/D converter Unit: mm fabricated in Molybdenum-gate CMOS. It uses a 2-step flash conversion method and features low 22-pin DIP. current consumption. 27.95 max. FEATURES 37.41 20:25 mae + 8-bit resolution boo} EA 10.16 + 8 MSPS maximum conversion rate (<a | ae we + 1.5 LSB non-linearity error (when Ver — Vas =

2.0 V) ft

+ 1.0 LSB non-linearity error (when Ver — Vrs =

5.0 V) 36

+ Low current consumption an oe ost | 2025 + Monotonic with guaranteed no code omission 20.2 earn + External sample-and-hold circuit not required 108 mn + Built-in output latch * Output tristate control pin 22-pin SOP + Single 5 V supply + 22-pin plastic DIP (SM6102P) and 22-pin plastic SOP (SM61028) Geaaeee 0.18 295 “I + Molybdenum-gate CMOS process REREAHABREBHE a 54202 APPLICATIONS | ie + High-speed facsimile machines HEHHRHHBEHS i + Data acquisition systems T + High-speed, low-current applications 18204 ons0a igh-spe pp! “yt PINOUT St al a i a, 0.05 $0.05 avon [| pvop var [2] [zi] ou vn [3] 087 avd pas PASE 85 ce [6] Sme1o2P/s oes ne [ie] oe ne [a] [75] ose nano [o] Fra] 031 vee [ro] [73] ovo sano [i] fi] ano NIPPON PRECISION CIRCUITS—1

$M6102P/S BLOCK DIAGRAM — Be | SS | BS VRB ups | OBS 1 os Lower | f | compara ste] ie ; aj encode | Det Lower DBO A st = PHASE _| | | ——a avo PIN DESCRIPTION a a a a ee [8 | __ PHASE [lock polarity switch canto ee a a a a ee Converter data output bit | ow | se Converter data output bit 5 NIPPON PRECISION CIRCUITS—2

a DvoD Digtal supply SPECIFICATIONS Absolute Maximum Ratings Voxp = 0 V ouput voto rage “08 Yop ¥ 08 a Recommended Operating Conditions Vaxp = 0 V ee ee Von = 5 V +£5%, fix = 8 MHz, T, = —20 to 70 deg. C unless otherwise noted “me pote LO HIGH-level tristate output leakage . i A jourrent i Yo Mop ;- | - fe | " NIPPON PRECISION CIRCUITS—3

| ve [me LOW-level tristate output leakage . 7” feu vevewwew | ow fey | [| | a ee ae Voo = 5 V £5%, Ta = —20 to 70 deg. C unless otherwise noted Symbol ew | me | [cme mamas Tm | A pewemevee if dP PP | Joamerin woe st ses | Converter Characteristics Von = 5 V +5%, Ts = —20 to 70 deg. C unless otherwise noted Parameter Symbol Condition [wn] [ve | mm Vat — Vag = 2 V, Vin = DC Nonlinearity error NL LsB Var - Vag = 5 V, 410 Vin = OC “ Vat - Vag = 2 V, Vv = DC |= | - | | Differential non-linearity error DNL y LsB Vet — Vag = § V, fee T= | | ae | FUNCTIONAL DESCRIPTION Converter Operation The SM6102P/S uses a 2-step flash conversion When PHASE = LOW method where one step sets the upper four bits and , . the next sets the lower four bits. The lower compa- W nen cs saa the Oth ane ce omar rator comprises two circuits, A and B, which oper- tor (block A, ‘Or examp! le) thresho . vol Bes are ate alternately at a rate set by the input clock balanced automatically. The analog input is then frequenc sampled on the first falling edge of CLK. On the equency. second rising edge of CLK, the upper four bits are NIPPON PRECISION CIRCUITS—4

set and the upper comparator sets the threshold Lower comparator B operates identically to compa- voltage for the lower comparator. The lower four ator A except that it is shifted by one clock cycle. bits are set on the third rising edge of CLK. On the fourth rising edge of CLK, the upper and lower bits. When PHASE = HIGH are re-combined and converted. The conversion, The converter operates similarly as when PHASE is therefore, takes 2.5 clock cycles from the input LOW, except that the CLK signal has opposite sampling to the converter data output. polarity. : | Ue ee ee ee — Lower ee ee sem To ‘ere oa De Converter Timing PHASE = LOW CLK tp. PHASE = HIGH : | You 7 5 tp: NIPPON PRECISION CIRCUITS—5

Analog int seca! sep pom Po fe fe foe Pets Pe foe fa poe Poe fe Pa Pa Pe Pe Pe a ee a a a Notes 1, The analog input voltage shown is the center voltage for each step. 2. Ver and Ves are adjusted such that the zero transition is 0.005 V and full-scale is 2.545 V. DEVICE HANDLING PRECAUTIONS 1, Parallel electrolytic and ceramic filter capacitors 4. The $M6102 uses CMOS chopper comparators should be connected to the supply and reference where the analog input is alternately connected voltage pins. and disconnected from the input circuits. The 2. The system ground should be connected to a analog inputs should, therefore, have a low single, common Earth. . impedance. Also, input buffering is recom- 3. As far as practicable, the analog input should be mended. kept free of digital noise. For example, analog input wire on the printed circuit board should be screened by AGND. NIPPON PRECISION CIRCUITS LTD. reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Ltd. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Ltd. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. NIPPON PRECISION CIRCUITS LTD. 3-9, Taihei 4-chome Sumida-ku, Tokyo 190, Japan NIPPON PRECISION CIRCUITS LTO. Telephone aoe NC9256AE 1993.09 NIPPON PRECISION CIRCUITS—6