SLVU2.8-4.TBT UMW | Alldatasheet

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Technical content

Features

 100W peak pulse power(8/20µs)  Protects two line pairs(four lines)  Ultra low leakage：nA level  Low operating voltage：2.8V  Low capacitance  Ultra low clamping voltage  JEDEC SO-8 package  Complies with following standards: – IEC 61000-4-2 (ESD) immunity test Air discharge: ±30kV Contact discharge: ±30kV – IEC61000-4-4 (EFT) 40A (5/50ns) – IEC61000-4-5 (Lightning) 10A (8/20µs)  RoHS Compliant Mechanical Characteristics Package: SOP-8 Lead Finish: Matte Tin Case Material: “Green” Molding Compound. UL Flammability Classification Rating 94V-0 Moisture Sensitivity: Level 3 per J-STD-020 Terminal Connections: See Diagram Below Marking Information: See Below

Description

is designed to protect low voltage,CMOS semiconductors from transients caused by electrostatic discharge(ESD),cable discharge events(CDE), lightning and other induced voltage surges. Low capacitance compensation diode is integrated into the TVS to lower the typical capacitance to 6pF per line. The complies with the IEC 61000-4-2 (ESD) standard with ±30kV air and ±30kV into a 8-pin lead-free SO-8 package. The combination of low leakage, signal integrity and an ideal application such as 10/100/1000 Ethernet. Circuit and Pin Schematic SLVU2.8-4.TBT www.umw-ic.com 1 友台半导体有限公司

Absolute Maximum Ratings (TA=25°C unless otherwise specified) Parameter Symbol Value Unit Peak Pulse Power(8/20µs) Ppk 100 W Peak Pulse Current(8/20µs) IPP 10 A ESD per IEC 61000−4−2 (Air) ESD per IEC 61000−4−2 (Contact) VESD ±30 ±30 kV Operating Temperature Range TJ °C Storage Temperature Range Tstg −55 to +150 °C Electrical Characteristics (TA=25°C unless otherwise specified) Parameter Symbol Min Typ Max Unit Test Condition Reverse Working Voltage VRWM 2.8 V Punch-Through Voltage V PT 3.5 3.8 4.3 V I PT = 2µA Snap-Back Voltage VSB 2.8 ISB = 50mA Reverse Leakage Current I R 1.0 µA V RWM = 2.8V Clamping Voltage VC 5.5 V I PP = 1A (8 x 20µs pulse) Clamping Voltage VC 10 V I PP = 10A (8 x 20µs pulse) Variation in capacitance with reverse bias 1.3 pF Pins 1,8 to 2,7 and pins 3,6 to 4,5 VR = 0 to 2.8V, f = 1MHz Junction Capacitance C J 4.5 6 pF Pins 1,8 to 2,7 and pins 3,6 to 4,5 VR = 2.8V, f = 1MHz −40 to +125 2.8V TVS Array For ESD and Latch-Up Protection SLVU2.8-4.TBT www.umw-ic.com 2 友台半导体有限公司

Non-Repetitive Peak Pulse Power vs. Pulse Time Clamping Voltage vs. Peak Pulse Current Normalized Junction Capacitance vs. Reverse Voltage Typical Insertion Loss (S21) ESD Clamping (-8kV Contact per IEC 61000-4-2) Note: Data is taken with a 10x attenuator ESD Clamping (8kV Contact per IEC 61000-4-2) Note: Data is taken with a 10x attenuator 1 2 START . 030 MHz STOP 3 000. 000 000 MHz CH1 S21 LOG 6 dB / REF 0 dB 1: -1.8892 dB

800 MHz

2: -2.1247 dB

900 MHz

3: -6.9338 dB

1.8 GHz

4: -15.047 dB

2.5 GHz

-6 dB GHz 100 MHz GHz MHz MHz -12 dB -18 dB -24 dB -30 dB -36 dB -42 dB -48 dB 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 00 . 511 . 522 . 53 Reverse Voltage (VR) Cj(VR) / Cj(VR=0V) f = 1 MHz 02 1 0 1 2468 Peak Pulse Current - IPP (A) Clamping Voltage - VC (V) Waveform Parameters: tr = 8μs td = 20μs 0.01 0.1 0.1 1001 10 Pulse Duration - tp (us) Peak Pulse Power - PPP (kW) Typical Performance Characteristics (TA=25°C unless otherwise Specified) 2.8V TVS Array For ESD and Latch-Up Protection SLVU2.8-4.TBT www.umw-ic.com 3 友台半导体有限公司

C (5.20) 0.205 G 3.00 0.118 P 1.27 0.050 Y 2.20 0.087 Z 7.40 0.291 X 0.60 0.024 SY M DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.25 1.65 0.049 0.065 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 E 6.00 BSC 0.236 BSC e 1.27 BSC 0.050 BSC h 0.25 0.50 0.010 0.020 L1 (1.04) (0.041) N 8 8 θ1 0° 8° 0° 8° aaa 0.10 0.004 ccc 0.20 0.008 bbb 0.25 0.010 Suggested Marking Information SLVU2.8-4 Part Number Marking Base qty Tape & ReelUMW SLVU2.8-4.TBT

Ordering Information

2.8V TVS Array For ESD and Latch-Up Protection SLVU2.8-4.TBT www.umw-ic.com 4 友台半导体有限公司 YYXX= Date Code Dot denotes Pin1 Delivery mode 500