SLG7NT41502V

SLG7NT41502V RENESAS | Alldatasheet

Document overview

• Manufacturer or author: pwong
• PDF pages: 10

Technical content

Features

• Low Power Consumption
• Pb - Free / RoHS Compliant
• Halogen - Free
• S T QFN - 1 4 Package Output Summary
• 1 Output — Push Pull 2X
• 1 Output — Open Drain NMOS 1X
• 3 Outputs — Open Drain NMOS 2X Pin Configuration 6 7 14 13 S T Q FN - 14 TOP VIEW 5 8 VDD nBUTTON_IN nEXIT_SHIPMODE POR_B SHIPMODE_STROBE DISCHARGE_0 GND PG_IN nBUTTON_MONITOR OPM2P6_DISCHARGE DISCHARGE_1 LS_ON Renesas SLG7NT41502 is a low power and small form device. The SoC is housed in a 1.6 x 2.0 mm STQFN package which is optimal for using with small devices. SHIPMODE_EN nPG_IN

SLG7NT41502_DS_r10 5 Page 2 P in Configuration Pin # Pin Name Type Pin Description

1 VDD PWR Supply Voltage

2 nBUTTON_IN Digital Input Digital Input with Schmitt trigger 3 nEXIT_SHIPMODE Digital Input Digital Input with Schmitt trigger

4 POR_B Digital Input Low Voltage Digital input

5 SHIPMODE_EN Digital Input Low Voltage Digital input

6 SHIPMODE_STROBE Digital Input Low Voltage Digital input

7 DISCHARGE_0 Digital Output Open Drain NMOS 2X

8 GND GND Ground

9 nPG_IN Digital Input Digital Input with Schmitt trigger

10 PG_IN Digital Input Digital Input with Schmitt trigger

11 nBUTTON_MONITOR Digital Output Open Drain NMOS 1X

12 OPM2P6_DISCHARGE Digital Output Open Drain NMOS 2X

13 DISCHARGE_1 Digital Output Open Drain NMOS 2X

14 LS_ON Digital Output Push Pull 2X

Ordering Information

SLG7NT41502V V= S TQFN - 1 4 SLG7NT41502VTR S TQFN - 14 – Tape and Reel (3k units)

SLG7NT41502_DS_r10 5 Page 3 Absolute Maximum Conditions Parameter Min. Max. Unit V HIGH to GND - 0.3 7 V Voltage at input pins - 0.3 7 V Current at input pin - 1.0 1.0 mA Storage temperature range - 65 125 °C Junction temperature -- 150 °C ESD Protection (Human Body Model) 2000 -- V ESD Protection (Charged Device Model) 1000 -- V Moisture Sensitivity Level 1

Electrical Characteristics

(@ 25°C, unless otherwise stated) Symbol Parameter Condition/Note Min. Typ. Max. Unit V DD Supply Voltage 1.71 3.6 5.5 V T A Operating Temperature - 40 25 85 °C I Q Quiescent Current Static inputs and floating outputs PIN4 = 1; PIN14 = 1; DFF 4 = 0 @VDD = 3.3V -- 1 -- µA Static inputs and outputs PIN4 = 0; PIN14 = 0; DFF 4 = 1 @VDD = 3.3V -- 1 -- Static inputs and outputs PIN4 = 1; PIN14 = 1; DFF 4 = 0 @VDD = 5.5V -- 1 -- Static inputs and outputs PIN4 = 0; PIN14 = 0; DFF 4 = 1 @VDD = 5.5V -- 1 -- I A Active Current Static outputs PIN4 = 0; PIN14 = 1; DFF 4 = 0 @VDD = 3. 7 V -- 5 0 -- µA Static outputs PIN4 = 0; PIN14 = 0; DFF 4 = 0 @VDD = 3.3V -- 1.8 -- Static outputs PIN4 = 0; PIN14 = 1; DFF 4 = 0 @VDD = 5.5V -- 50 -- V O Maximal Voltage Applied to any PIN in High - Impedance State -- -- VDD V I O Maximal Average or DC Current (note 1) Per Each Chip Side -- -- 90 mA V IH HIGH - Level Input Voltage (Note 2) Logic Input with Schmitt Trigger, at VDD=1.8V At temperature - 45°C +85°C (note 1) 1.27 -- VDD V Low - Level Logic Input, at VDD=1.8V At temperature - 45°C +85°C (note 1) 0.98 -- VDD Logic Input with Schmitt Trigger, at VDD=3.3V At temperature - 45°C +85°C (note 1) 2.13 -- VDD

SLG7NT41502_DS_r10 5 Page 4 Low - Level Logic Input, at VDD=3.3V At temperature - 45°C +85°C (note 1) 1.13 -- VDD Logic Input with Schmitt Trigger, at VDD=5.0V At temperature - 45°C +85°C (note 1) 3.16 -- VDD Low - Level Logic Input, at VDD=5.0V At temperature - 45°C +85°C (note 1) 1.23 -- VDD V IL LOW - Level Input Voltage (Note 2) Logic Input with Schmitt Trigger, at VDD=1.8V -- -- 0.44 V Low - Level Logic Input, at VDD=1.8V At temperature - 45°C +85°C (note 1) -- -- 0.52 Logic Input with Schmitt Trigger, at VDD=3.3V At temperature - 45°C +85°C (note 1) -- -- 0.95 Low - Level Logic Input, at VDD=3.3V At temperature - 45°C +85°C (note 1) -- -- 0.69 Logic Input with Schmitt Trigger, at VDD=5.0V At temperature - 45°C +85°C (note 1) -- -- 1.51 Low - Level Logic Input, at VDD=5.0V At temperature - 45°C +85°C (note 1) -- -- 0.78 V HYS Schmitt Trigger Hysteresis Voltage Logic Input with Schmitt Trigger 0.273 -- 0.792 V I IH HIGH - Level Input Current Logic Input PINs; V IN = VDD - 1.0 -- 1.0 µA I IL LOW - Level Input Current Logic Input PINs; V IN = 0V - 1.0 -- 1.0 µA V OH HIGH - Level Output Voltage (note 1) Push Pull, I OH = 100uA, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) 1.679 1.792 -- V Push Pull, I OH = 3mA, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) 2.861 3.201 -- Push Pull, I OH = 5mA, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) 4.330 4.878 -- V OL LOW - Level Output Voltage (note 1) Open Drain, I OL = 100uA, 1X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) -- 0.007 0.010 V Push Pull, I OL = 100uA, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) -- 0.007 0.010 Open Drain, I OL = 100uA, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) -- 0.002 0.010 Open Drain, I OL = 3mA, 1X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) -- 0.070 0.130 Push Pull, I OL = 3mA, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) -- 0.079 0.130

SLG7NT41502_DS_r10 5 Page 5 Open Drain, I OL = 3mA, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) -- 0.040 0.070 Open Drain, I OL = 5mA, 1X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) -- 0.090 0.160 Push Pull, I OL = 5mA, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) -- 0.101 0.160 Open Drain, I OL = 5mA, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) -- 0.050 0.080 I OH HIGH - Level Output Current (note 1) Push Pull & PMOS OD, V OH = V DD - 0.2, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) 2.069 3.390 -- mA Push Pull & PMOS OD, V OH = 2.4 V, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) 11.278 21.634 -- Push Pull & PMOS OD, V OH = 2.4 V, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) 40.059 59.691 -- I OL LOW - Level Output Current (note 1) Push Pull, V OL =0.15V, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) 1.52 2.840 -- mA Open Drain, V OL =0.15V, 1X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) 1.530 2.840 -- Open Drain, V OL =0.15V, 2X Driver, at VDD=1.8 V At temperature - 45°C +85°C (note 1) 3.060 5.680 -- Push Pull, V OL =0.4V, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) 8.130 13.840 -- Open Drain, V OL =0.4V, 1X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) 8.130 13.850 -- Open Drain, V OL =0.4V, 2X Driver, at VDD=3.3 V At temperature - 45°C +85°C (note 1) 16.260 23.700 -- Push Pull, V OL =0.4V, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) 12.020 19.460 -- Open Drain, V OL =0.4V, 1X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) 12.030 19.460 -- Open Drain, V OL =0.4V, 2X Driver, at VDD=5.0 V At temperature - 45°C +85°C (note 1) 24.060 38.920 --

SLG7NT41502_DS_r10 5 Page 6 V ACMP0 Analog Comparator Threshold Voltage Low to High transition, at temperature 25°C. 3532.7 3582.9 3633.1 mV Low to High transition, at temperature - 40 +85°C (note 1) 3519.7 3579.8 3644.2 High to Low transition, at temperature 25°C 2948.8 2991.5 3034.2 High to Low transition, at temperature - 40 +85°C (note 1) 2937.1 2988.1 3040.9 G ACMP0 Analog Comparator0 IN+ gain ACMP 0 -- 0.33 -- V HYST Analog Comparator Hysteresis Voltage (note 1) ACMP 0 -- 200 -- mV R PULL_UP Internal Pull Up Resistance Pull up on PIN 2, 3 70 100 130 k Ω R PULL_DOWN Internal Pull Down Resistance Pull down on PINs 5, 6 70 100 130 k Ω RDIS Discharge Resistance External resistor on PIN7, PIN12 and PIN13 270 -- -- Ω T CNT 0 Counter 0 Period (WS Ctrl) T SU Start up Time From VDD rising past PON THR 0. 462 1.4 4.999 ms PON THR Power On Threshold VDD Level Required to Start Up the Chip 0.961 1.312 1.65 9 V POFF THR Power Off Threshold VDD Level Required to Switch Off the Chip 0.875 1.109 1.28 8 V 1. Guaranteed by Design. 2. No hysteresi s for Low Voltage Digital Input

SLG7NT41502_DS_r10 5 Page 7 Datasheet Revision Programming Code Number Locked Status Part Code Revision Date 1.0 5 002 L V6 B 0 2 / 25 /20 22 The IC security bit is locked/set for code security for production unless otherwise specified. Revision number is not changed for bit locking .

SLG7NT41502_DS_r10 5 Page 8 Package Drawing and Dimensions

14 Lead S TQFN Package

SLG7NT41502_DS_r10 5 Page 9 Tape and Reel Specification Package Type # of Pins Nominal Package Size (mm) Max Units Reel & Hub Size (mm) Trailer A Leader B Pocket (mm) per reel per box Pockets Length (mm) Pockets Length (mm) Width Pitch STQFN 14 L FC 0.4P Green 14 1.6 x 2.0 x0. 5 5 3000 3000 178/60 100 400 100 400 8 4 Carrier Tape Drawing and Dimensions Package Type Pocket BTM Length (mm) Pocket BTM Width (mm) Pocket Depth (mm) Index Hole Pitch (mm) Pocket Pitch (mm) Index Hole Diameter (mm) Index Hole to Tape Edge (mm) Index Hole to Pocket Center (mm) Tape Width (mm) A0 B0 K0 P0 P1 D0 E F W STQFN 1 4 L FC 0.4P Green Refer to EIA - 481 Specifications Recommended Reflow Soldering Profile Please see IPC/JEDEC J - STD - 020: latest revision for reflow profile based on package volume of 1.76 mm 3 (nominal). More information can be found at www.jedec.org .

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