SLG59H1020V

SLG59H1020V RENESAS | Alldatasheet

Document overview

• Manufacturer or author: pwong
• PDF pages: 44

Technical content

Features

• Wide Operating Input Voltage: 4.5 V to 20 V
• Maximum Continuous Current: 3 A
• Automatic nFET SOA Protection
• 5 W SOA Protection Threshold
• Back-to-Back FET Reverse Current Blocking, when OF F
• Internal nFET Power Limiting
• High-performance MOSFET Switch Low RDS ON : 50 mΩ at V IN = 20 V Low ΔRDS ON /ΔV IN : < 0.05 mΩ/V Low ΔRDS ON /ΔT: < 0.06 mΩ/°C
• 4-Level, Pin-selectable V IN Overvoltage Lockout
• Capacitor-adjustable Inrush Current Control
• Two stage Current Limit Protection: Resistor-adjustable Active Current Limit Internal Short-circuit Current limit
• Open Drain FAULT Signaling
• MOSFET Current Analog Output Monitor: 10 µA/A
• Pb-Free / Halogen-Free / RoHS Compliant Packaging Pin Configuration

Applications

• Power-Rail Switching
• Multifunction Printers
• Large-format Copiers
• Telecommunications Equipment
• High-performance Computing

4.5 V and 20 V Point-of-Load Power Distribution

• Motor Drives ON 1 FAULT CAP GND SEL0 2 VIN 4 VOUT SEL1 RSET IOUT VIN VIN 5 VIN 7 VOUT 12 VOUT VOUT VIN VOUT 8 9 18-pin STQFN 1.6 x 3.0 mm, 0.40mm pitch (Top View) SLG59H1020V ON

3 V FS - Connect

100 kΩ Linear Ramp Control State Machine (CL/SC Detection and Over Temperature Protection) CMOS Input VIN OVLO 22 V RSET 30.1 kΩ 47 µF GND OFF 1 to 22 µF 0.1 µF VLOGIC RPU1 10 kΩ VLOGIC SEL0 SEL1 VOUT CAP RSET VIN IOUT FAULT ON 20 V 3 A RIOUT 84.5 kΩ CLOAD 22 µF CIOUT 180 pF CIN = C 1 + C 2 + C 3

Revision 1.02 Page 2 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Pin Description

Ordering Information

Pin # Pin Name Type Pin Description

1 ON Input

A low-to-high transition on this pin initiates the operation of the SLG59H1020V’s state machine. ON is an asserted HIGH, level-sensitive CMOS input with ON_V IL < 0.3 V and ON_V IH > 0.9 V. As the ON pin input circuit does not have an internal pull-down resistor, connect this pin to a general-purpose output (GPO) of a microcontroller, an application processor, or a system controller – do not allow this pin to be open-circuited.

2 SEL0 Input

As level-sensitive, CMOS inputs with V IL < 0.3 V and V IH > 1.65 V, the SEL0 (LSB) and the SEL1 (MSB) pins select one of four V IN overvoltage lockout thresholds. Please see the Applications Section for additional information and the Electrical Characteristics table for the VIN overvoltage thresholds. A logic LOW on either pin is achieved by connecting the pin of interest to GND; a logic HIGH on either pin is achieved by connecting a 10 kΩ external resistor from the pin in question to the system’s local logic supply.

3 GND GND

Pin 3 is the main ground connection for the SLG59H1020V’s internal charge pump, its gate driver and current-limit circuits as well as its internal state machine. Therefore, use a short, stout connection from Pin 3 to the system’s analog or power plane. 4-8 VIN MOSFET VIN supplies the power for the operation of the SLG59H1020V, its internal control circuitry, and the drain terminal of the back-to-back, reverse-blocking nFET load switch. With 5 pins fused together at VIN, connect a 47 µF (or larger) low-ESR capacitor from this pin to ground. Capacitors used at VIN should be rated at 50 V or higher. 9-13 VOUT MOSFET Drain terminal of n-channel MOSFET (5 pins fused for VOUT). Connect a 22 µF (or larger) low-ESR capacitor from this pin to ground. Capacitors used at VOUT should be rated at 50 V or higher.

14 SEL1 Input Please see SEL0 Pin Description above

15 FAULT Output

An open drain output, FAULT is asserted within TFAULT LOW when a V IN overvoltage, a current-limit, or an over-temperature condition is detected. FAULT is deasserted within TFAULT HIGH when the fault condition is removed. Connect an 100 kΩ external resistor from the FAULT pin to local system logic supply.

16 CAP Output

A low-ESR, stable dielectric, ceramic surface-mount capacitor connected from CAP pin to GND sets the V OUT slew rate and overall turn-on time of the SLG59H1020V. For best performance, the range for C SLEW values are 10 nF ≤ C SLEW ≤ 20 nF – please see typical characteristics for additional information. Capacitors used at the CAP pin should be rated at 10 V or higher. Please consult Applications Section on how to select C SLEW based on V OUT slew rate and loading conditions.

17 IOUT Output

IOUT is the SLG59H1020V’s power MOSFET load current monitor output. As an analog current output, this signal when applied to a ground-reference resistor generates a voltage proportional to the current through the n-channel MOSFET. The I OUT transfer characteristic is typically 10 μA/A with a voltage compliance range of 0.5 V ≤ VIOUT ≤ 4 V. Optimal I OUT linearity is exhibited for 0.5 A ≤ I DS ≤ 3 A. In addition, it is recommended to bypass the IOUT pin to GND with a 0.18 nF capacitor.

18 RSET Input

A 1%-tolerance, metal-film resistor between 30 kΩ and 91 kΩ sets the SLG59H1020V’s active current limit. A 91 kΩ resistor sets the SLG59H1020V’s active current limit to 1 A and a 30 kΩ resistor sets the active current limit to 3 A. Part Number Type Production Flow SLG59H1020V STQFN 18L FC Industrial, -40 °C to 85 °C

Revision 1.02 Page 3 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation SLG59H1020VTR STQFN 18L FC (Tape and Reel) Industrial , -40 °C to 85 °C Part Number Type Production Flow

Revision 1.02 Page 4 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Absolute Maximum Ratings Parameter Description Conditions Min. Typ. Max. Unit VIN to GND Load Switch Input Voltage to GND Continuous -0.3 -- 30 V Maximum pulsed V IN , pulse width < 0.1 s -- -- 32 V VOUT to GND Load Switch Output Voltage to GND -0.3 -- V IN V ON, SEL[1,0], CAP , RSET, IOUT, and FAULT to GND ON, SEL[1,0], CAP , RSET, IOUT, and FAULT Pin Voltages to GND -0.3 -- 7 V TS Storage Temperature -65 -- 150 °C ESD HBM ESD Protection Human Body Model 2000 -- -- V ESD CDM ESD Protection Charged Device Model 500 -- -- V MSL Moisture Sensitivity Level 1 θJA Thermal Resistance 1.6 x 3.0 mm 18L STQFN; De - termined with the device mount - ed onto a 1 in 2, 1 oz. copper pad of FR-4 material -- 40 -- °C/W TJ,MAX Maximum Junction Temperature -- 150 -- °C MOSFET IDS CONT Continuous Current from VIN to VOUT T MOSFET IDS PEAK Peak Current from VIN to VOUT Maximum pulsed switch current, pulse width < 1 ms -- -- 5 A Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at thes e or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Electrical Characteristics

4.5 V ≤ V IN ≤ 20 V; C IN = 47 µF, T A = -40 °C to 85 °C, unless otherwise noted. Typical values are at T A = 25 °C Parameter Description Conditions Min. Typ. Max. Unit VIN Operating Input Voltage 4.5 -- 20 V VIN(OVLO) VIN Overvoltage Lockout Threshold VIN(OVLOHYST) VIN Overvoltage Lockout Hysteresis -- 2 -- % IQ Quiescent Supply Current ON = HIGH; I DS = 0 A -- 0.5 0.6 mA ISHDN OFF Mode Supply Current ON = LOW; I DS = 0 A -- 1 3 µA RDS ON ON Resistance TA = 25 °C; I DS = 0.1 A -- 50 52 mΩ TA = 85 °C; I DS = 0.1 A -- 65 70 mΩ MOSFET IDS Current from VIN to VOUT Continuous -- -- 3 A IREVERSE MOSFET Reverse-Leakage Current V IN = 0 V ; VOUT = 20 V ; ON = 0 V -- -- 3 µA ILIMIT Active Current Limit, I ACL VOUT > 0.5 V; R SET = 30.1 kΩ 3 3.2 3.4 A Short-circuit Current Limit, I SCL VOUT < 0.5 V; V IN = 4.5 V ; RLOAD = 0.5 Ω -- 0.8 -- A

Revision 1.02 Page 5 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation TACL Active Current Limit Response Time RSET = 51.6 kΩ -- 120 -- µs IOUT MOSFET Current Analog Monitor Output I DS = 1 A 9.3 10 10.7 µA IDS = 3 A 28.5 30 31.5 µA TIOUT IOUT Response Time to Change in Main MOSFET Current CIOUT = 180 pF; Step load 0 to 2.4 A; 0% to 90% I OUT -- 45 -- µs CLOAD Output Load Capacitance C LOAD connected from VOUT to GND -- 22 -- µF TON_Delay ON Delay Time 50% ON to 10% V OUT ↑; VIN = 4.5 V; C SLEW = 10 nF; RLOAD = 100 Ω, C LOAD = 10 µF -- 0.3 0.5 ms 50% ON to 10% V OUT ↑; VIN = 20 V; C SLEW = 10 nF; RLOAD = 100 Ω, C LOAD = 10µF -- 0.7 1.2 ms TTotal_ON Total Turn ON Time 50% ON to 90% V OUT ↑ Set by External C SLEW 1 ms 50% ON to 90% V OUT ↑; VIN = 4.5 V; C SLEW = 10 nF; RLOAD = 100 Ω, C LOAD = 10 µF -- 1.5 2.1 ms 50% ON to 90% V OUT ↑; VIN = 20 V; C SLEW = 10 nF; RLOAD = 100 Ω, C LOAD = 10 µF -- 6.5 8 ms VOUT(SR) VOUT Slew rate 50% ON to 90% V OUT ↑ Set by External C SLEW

1 V/ms

10% to 90% V OUT ↑; VIN = 4.5 V to 20 V; C SLEW = 10 nF; RLOAD = 100 Ω, C LOAD = 10 µF 2.7 3.2 3.9 V/ms TOFF_Delay OFF Delay Time 50% ON to V OUT Fall Start ↓; VIN = 4.5 V to 20 V RLOAD = 100 Ω, No C LOAD -- 15 -- µs TFALL VOUT Fall Time 90% V OUT to 10% V OUT ↓; ON = HIGH-to-LOW; VIN = 4.5 V to 20 V; RLOAD = 100 Ω, No C LOAD 10.4 12.7 14.3 µs TFAULT LOW FAULT Assertion Time Abnormal Step Load Current event to FAULT ↓; I ACL = 1 A; V IN = 20 V; RSET = 91 kΩ; switch in 20 Ω load -- 80 -- µs TFAULT HIGH FAULT De-assertion Time Delay to FAULT ↑ after fault condition is removed; I ACL = 1 A; V IN = 20 V; RSET = 91 kΩ; switch out 20 Ω load -- 180 -- µs FAULT VOL FAULT Output Low Voltage I FAULT = 1 mA -- 0.2 -- V ON_V IH ON Pin Input High Voltage 0.9 -- 5 V ON_V IL ON Pin Input Low Voltage -0.3 0 0.3 V SEL[1,0]_V IH SEL[1,0] pins Input High Voltage 1.65 -- 4.5 V SEL[1,0]_V IL SEL[1,0] pins Input Low Voltage -0.3 -- 0.3 V ION(Leakage) ON Pin Leakage Current 1 V ≤ ON ≤ 5 V or ON = GND -- - - 1 µA THERM ON Thermal Protection Shutdown Threshold -- 125 -- °C THERM OFF Thermal Protection Restart Threshold -- 100 -- °C Notes: 1. Refer to typical Timing Parameter vs. C SLEW performance charts for additional information when available. Electrical Characteristics (continued) 4.5 V ≤ V IN ≤ 20 V; C IN = 47 µF, T A = -40 °C to 85 °C, unless otherwise noted. Typical values are at T A = 25 °C Parameter Description Conditions Min. Typ. Max. Unit

Revision 1.02 Page 6 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation TTotal_ON , T ON_Delay and Slew Rate Measurement 90% V OUT 50% ON TON_Delay VOUT(SR) (V/ms) ON* VOUT TTotal_ON 10% V OUT 50% ON 10% V OUT TOFF_Delay TFALL 90% V OUT *Rise and Fall Times of the ON Signal are 100 ns

Revision 1.02 Page 7 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Typical Performance Characteristics RDS ON vs. Temperature and V IN RDS ON vs. MOSFET IDS, V IN , and Temperature

Revision 1.02 Page 8 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation IACL vs. Temperature and R SET IACL vs. R SET and V IN

Revision 1.02 Page 9 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation IOUT vs. MOSFET IDS and V IN IOUT vs. Temperature and MOSFET IDS

Revision 1.02 Page 10 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation VOUT Slew Rate vs. Temperature, V IN , and C SLEW TTotal_ON vs. C SLEW , V IN , and Temperature

Figure 9. Typical Turn ON operation waveform for V IN = 20 V, CSLEW = 18 nF, C LOAD = 10 μF, R LOAD = 100 Ω

Figure 22. Thermally induced SOA shutdown for V IN = 20 V, CLOAD = 10 μF, I ACL = 1 A, R SET = 91 kΩ

Revision 1.02 Page 34 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Applications Information High Voltage GreenFET Safe Operating Area Explained Renesas’s High Voltage GreenFET load switches incor porate a number of internal protection features tha t prevents them from damaging themselves or any other circuit or subcirc uit downstream of them. One particular protection f eature is their Safe Operation Area (SOA) protection. SOA protection is automatically activated under overpower and, in som e cases, under overcurrent conditions. Overpower SOA is activated if package power dissipation exceeds an internal 5 W threshold longer than 2.5 ms. High Voltage GreenFET devices will quickly switch off (open circuit) upon overpower detection and automatically resume (close) nominal operation once overpower condition no longer exists. One possible way to have an overpower condition trigger SOA protection is when High Voltage GreenFET products are enabled into heavy output resistive loads and/or into large load capacitors. It is under these conditions to follow carefully the “Safe Start-up Loading” guidance in the Applications section of the datasheet. During an overcurrent condition, High Voltage GreenFET devices will try to limit the output current to the level s et by the external R SET resistor. Limiting the output current, however, ca uses an increased voltage drop across the FET’s channel because the FET’s RDS ON increased as well. Since the FET’s RDS ON is larger, package power dissipation also increases. If the re sultant increase in package power dissipation is hi gher/equal than 5 W for longer than 2.5 ms, internal SOA protection will be triggered and the FET will open circuit (switch off). Every time SOA protection is triggered, all High Voltage GreenFET devices will automatically attempt to resume nominal operation after 160 ms. Safe Start-up Condition SLG59H1020V has built-in protection to prevent over-heating during start-up into a heavy load. Overloading the VOUT pin with a capacitor and a resistor may result in non-monoto nic V OUT ramping. In general, under light loading on VOUT, V OUT ramping can be controlled with C SLEW value. The following equation serves as a guide: where T RISE = Total rise time from 10% V OUT to 90% V OUT VIN = Input Voltage CSLEW = Capacitor value for CAP pin When capacitor and resistor loading on VOUT during start up, the following tables will ensure V OUT ramping is monotonic without triggering internal protection: Safe Start-up Loading for V IN = 12 V (Monotonic Ramp) Slew Rate (V/ms) C SLEW (nF) 2 CLOAD (µF) R LOAD (Ω) 1 33.3 500 20 2 16.7 250 20 3 11.1 160 20 4 8.3 120 20 5 6.7 100 20 CSLEW = TRISE VIN x 4.9 µA x 20

Revision 1.02 Page 35 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Note 2: Select the closest-value tolerance capacitor. Setting the SLG59H1020V’s Active Current Limit Note 3: Active Current Limit accuracy is ±15% over voltage range and over temperature range. Setting the SLG59H1020V’s Input Overvoltage Lockout Threshold As shown in the table below, SEL[1,0] selects the VIN overvoltage threshold at which the SLG59H1020V’s internal state machine will turn OFF (open circuit) the power MOSFET if V IN exceeds the selected threshold. For example, SEL[1,1] would be the most appropriate setting for applications where the steady-state V IN can extend up to 20 V without causing any damage to the SLG59H1020V since the IC is 29-V tolerant. With an activated SLG59H1020V (ON=HIGH) and at any time V IN crosses the programmed V IN overvoltage threshold, the state machine opens the load switch and asserts the FAULT pin within TFAULT LOW . In applications with a deactivated or inactive SLG59H1020V (V IN > V IN(UVLO) and ON=LOW) and if the applied V IN is higher than the programmed V IN(OVLO) threshold, the SLG59H1020V’s state machine will ke ep the load switch open circuited if the ON pin is toggled LOW-to-HIGH. In these cases, the FAULT pin will also be asserted within TFAULT LOW and will remain asserted until VIN resumes nominal, steady-state operation. In all cases, the SLG59H1020V’s V IN undervoltage lockout threshold is fixed at V IN(UVLO) . Safe Start-up Loading for V IN = 22 V (Monotonic Ramp) Slew Rate (V/ms) C SLEW (nF) 2 CLOAD (µF) R LOAD (Ω) 0.5 66.7 500 80 1.0 33.3 250 80 1.5 22.2 160 80 2.0 16.7 120 80 2.5 13.3 100 80 RSET (kΩ) Active Current Limit (A) 3 91 1 45 2 30 3 SEL1 SEL0 VIN(OVLO) (Typ) 0 0 6.0 0 1 10.8 1 0 17.0 1 1 22.0

Revision 1.02 Page 36 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Power Dissipation The junction temperature of the SLG59H1020V depends on different factors such as board layout, ambient temperature, and other environmental factors. The primary contributor to the increase in the junction temperature of the SLG59H1020V is the power dissipation of its power MOSFET. Its power dissipation and the junction temperature in nominal operating mode can be calculated using the following equations: where: PD = Power dissipation, in Watts (W) RDS ON = Power MOSFET ON resistance, in Ohms (Ω) IDS = Output current, in Amps (A) and where: T J = Junction temperature, in Celsius degrees (°C) θJA = Package thermal resistance, in Celsius degrees per Watt (°C/W) TA = Ambient temperature, in Celsius degrees (°C) In current-limit mode, the SLG59H1020V’s power diss ipation can be calculated by taking into account th e voltage drop across the load switch (V IN -V OUT ) and the magnitude of the output current in current-limit mode (I ACL ): where: PD = Power dissipation, in Watts (W) V IN = Input Voltage, in Volts (V) RLOAD = Load Resistance, in Ohms (Ω) IACL = Output limited current, in Amps (A) VOUT = R LOAD x I ACL PD = RDS ON x I DS TJ = PD x θ JA + T A PD = (V IN -V OUT ) x I ACL or PD = (V IN – (R LOAD x I ACL )) x I ACL

1. Since the VIN and VOUT pins dissipate most of the heat generated during high-load current operation, it is highly recommended
2. To minimize the effects of parasitic trace inductance on normal operation, it is recommended to connect input C IN and output
3. The GND pin should be connected to system analog or power ground plane.
4. 2 oz. copper is recommended for high current operation.

Figure 45. SLG59H1020V Evaluation Board

Revision 1.02 Page 39 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Package Top Marking System Definition 1020V Part Code Pin 1 Identifier WWNNN Date Code + LOT Code ARR Assembly + Rev. Code 1020V - Part ID Field WW - Date Code Field NNN - Lot Traceability Code Field 1 A - Assembly Site Code Field 2 RR - Part Revision Code Field 2 Note 1: Each character in code field can be alphanumeric A-Z and 0-9 Note 2: Character in code field can be alphabetic A-Z

Revision 1.02 Page 40 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Package Drawing and Dimensions 18 Lead TQFN Package 1.6 x 3 mm (Fused Lead) JEDEC MO-220, Variation WCEE

Revision 1.02 Page 41 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation SLG59H1020V 18-pin STQFN PCB Landing Pattern Note: All dimensions shown in micrometers ( µm)

Revision 1.02 Page 42 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation Tape and Reel Specifications Carrier Tape Drawing and Dimensions Recommended Reflow Soldering Profile Please see IPC/JEDEC J-STD-020: latest revision for reflow profile based on package volume of 2.64 mm 3 (nominal). More information can be found at www.jedec.org. Package Type # of Pins Nominal Package Size [mm] Max Units Reel & Hub Size [mm] Leader (min) Trailer (min) Tape Width [mm] Part Pitch [mm] per Reel per Box Pockets Length [mm] Pockets Length [mm] STQFN 18L 1.6x3mm 0.4P FC Green 18 1.6 x 3 x 0.55 3,000 3,000 178 / 60 100 400 100 400 8 4 Package Type Pocket BTM Length Pocket BTM Width Pocket Depth Index Hole Pitch Pocket Pitch Index Hole Diameter Index Hole to Tape Edge Index Hole to Pocket Center Tape Width A0 B0 K0 P0 P1 D0 E F W STQFN 18L 1.6x3mm 0.4P FC Green Refer to EIA-481 specification

Revision 1.02 Page 43 of 43 SLG59H1020V A 20 V, 50 mΩ, 3 A, Reverse Blocking Load Switch with V IN Lockout Select and MOSFET Current Monitor Output ©2022 Renesas Electronics Corporation

Revision History

2/2/2022 1.03 Updated Company name and logo Added SOA Protection Threshold to Features Fixed typos Updated EVB image 12/20/2018 1.01 Updated style and formatting Updated Charts Added Layout Guidelines Fixed typos 10/19/2017 1.00 Production Release

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