SLG55587 RENESAS | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 10
Technical content
Features
- High Speed USB Switching
- Low 4.0 pF (typ) On Capacitance
- Low 4.0 Ω (typ) On Resistance
- Low 0.5 Ω (typ) On Resistance Flatness
- 4.5 V to 5.5 V Supply Range
- Low Supply Current
- Automatic Current-Limit Switch Control
- Automatic USB Charger Identification Circuit
- Apple IPAD2 @ 2 A charging current support
- Pb-Free / RoHS Compliant
- Halogen-Free
- TDFN-8 Package Pin Configuration - SLG55587 Pin Configuration - SLG55587A VDD GND TDP TDM CB DP DM CEN# 4 5 Thermal Pad connected to GND TDFN-8 (Top View) VDD GND TDP TDM CB DP DM CEN 4 5 Thermal Pad connected to GND TDFN-8 (Top View) FSM Logic One Shot VREF1 VREF1 CEN# or CEN CB DM DP VREF2 FET VDD TDP TDM Resistor Divider Resistor Divider
000-00055587-101 Page 2 of 9 SLG55587 SLG55587A Pin Description - SLG55587 Pin Description - SLG55587A Pin # Name Type Description 1 CEN# Output P-FET Open Drain Output. Current Limit S witch (CLS) Control Output. CB changes from 0 to 1 or 1 to 0. CEN# will be high for 2 seconds (typ)
2 DM Input/Output USB Connector D-
3 DP Input/Output USB Connector D+
4 GND GND Ground
5 VDD PWR Power Supply. Connect a 0.1 µF capacitor between VDD and GND as close as possible to the device.
6 TDP Input/Output Host USB Transceiver D+ Connection
7 TDM Input/Output Host USB Transceiver D- Connection
8 CB Input Switch Control Bit
0 = autodetection charger identification active 1 = charging downstream port with active USB2.0 data communication mode with 1.5 A support
9 Thermal Pad GND Ground
Pin # Name Type Description 1 CEN Output N-FET Open Drain Output. Current Limit Sw itch (CLS) Control Output. CB changes from 0 to 1 or 1 to 0. CEN will be low for 2 seconds (typ) 5 VDD PWR Power Supply. Connect a 0.1 µF capacitor between VDD and GND as close as possible to the device. 0 = autodetection charger identification active 1 = charging downstream port with active USB2.0 data communication mode with 1.5 A support
0 DCP autodetect with mouse/keyboard wakeup
1 S0 charging with SDP only
Ordering Information
SLG55587VTR TDFN-8 - Tape and Reel SLG55587AVTR TDFN-8 - Tape and Reel
000-00055587-101 Page 3 of 9 SLG55587 SLG55587A Absolute Maximum Conditions Parameter Min. Max. Unit Supply Voltage -0.3 6.0 V Continuous Current into any terminal -30 +30 mA Continuous Power Dissipation -- 954 mW Operating Temperature Range -40 85 °C Junction Temperature 150 °C Storage Temperature Range -65 150 °C Lead Temperature (Soldering, 10s) 260 °C Electrical Characteristics - Power Supply VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit VDD Power Supply Range VCB > V IH 4.5 5.0 5.5 V VCB = 0V 4.75 -- 5.25 V IDD Supply Current V DD = 5V CB = LOW (autodetect with wakeup) -- 120 140 µA CB = HIGH (SDP) -- 20 30 µA Electrical Characteristics - Analog Switch VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit VDP , V DM Analog signal Range 0 -- V DD V RON On Resistance TDP/TDM Switch V DD = -0.4V to 0.4V, I = 10mA -- 3.5 -- Ω VDP = V DM = 0V to V DD VDD = 5V -- 4.0 7 Ω ΔRON On Resistance Match be - tween channels TDP/TDM Switch V DD = 5.0V VDP = V DM = 400mV IDP = I DM = 10mA -- 0.1 -- Ω RFLAT On Resistance flatness TDP/TDM Switch V DD = 5.0V VDP = V DM = 0V to V DD IDP = I DM = 10mA -- 0.5 -- Ω RSHORT On Resistance of TDP/TDM Short V CB = 0V VDP = 1V IDP = I DM = 10mA -- 50 70 Ω ITDPOFF , ITDMOFF Off-Leakage Current VDD = 3.6V VDP = V DM = 0.3V to 3.3V VTDP = V TDM = 3.3V to 0.3V VCB = 0V -250 -- 250 nA IDPON , IDMON Off-Leakage Current VDD = 3.6V VDP = V DM = 3.3V to 0.3V VCB = V DD -250 -- 250 nA
000-00055587-101 Page 4 of 9 SLG55587 SLG55587A Electrical Characteristics - Dynamic Performance VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit TON Turn On Time VTDP or V TDM = 1.5V RL = 300 Ω CL = 35pF --‘ 20 100 µs TOFF Turn Off Time VTDP or V TDM = 1.5V RL = 300 Ω CL = 35pF --‘ 1 5 µs TPLH , T PHL TDP/TDM Switch Propaga - tion Delay RL = R S = 50 Ω -- 60 -- ps TSKEW Output Skew Skew between DP and DM when connected to TDP and TDM R L = R S = 50 Ω -- 40 -- ps COFF TDP/TDM Off-Capacitance f = 1MHz --‘ 2.0 -- pF CON DP/DM On-Capacitance f = 240MHz --‘ 4.0 5.5 pF BW -3dB Bandwidth R L = R S = 50 Ω -- 1000 -- MHz VISO Off-Isolation VTDP, VDP = 0dBm RL = R S =5 0 Ω f = 250MHz -- -20 -- dB VCT Crosstalk VTDP, VDP = 0dBm RL = R S = 50 Ω f = 250MHz -- -25 -- dB Electrical Characteristics - Internal Resistors VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit RPD DP/DM Short Pull-down 350 500 700 k Ω RT RP RP1/RP2 Ratio 1.485 1.5 1.515 Ratio RRP RP1 + RP2 Resistance 93.75 125.0 156.25 k Ω RT RM RM1/RM2 Ratio 0.8544 0.863 0.872 Ratio RRM RM1 + RM2 Resistance 69.75 93.0 115.18 k Ω Electrical Characteristics - Logic Input CB VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit VIH CB Input Logic High 1.4 -- -- V VIL CB Input Logic Low -- -- 0.4 V IIN CB Input Leakage Current VDD = 5.5V 0 ≤ VCB ≤ VIL or V IH ≤ VCB ≤ VDD -1 -- 1 µA
000-00055587-101 Page 5 of 9 SLG55587 SLG55587A Electrical Characteristics - CEN#/CEN Outputs VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit TVBT VBUS Toggle Time CB = Logic 0 to Logic 1 or Logic 1 to Logic 0 1.5 2.0 2.5 s V OH_CEN# CEN# Output Logic High Voltage CB = Logic 0 to Logic 1 I SOURCE = 2mA VDD -0.4V -- -- V IOUT_CEN# CEN# Output Leakage Cur - rent VDD = 5.5V VCEN# = 0V or CEN# deasserted -- -- 1 µA VOL_CEN CEN Output Logic Low Volt - age CB = Logic 0 to Logic 1 I SINK = 2mA -- -- 0.4V V IOUT_CEN CEN Output Leakage Cur - rent VDD = 5.5V VCEN = 5.5V or CEN deasserted -- -- 1 µA Electrical Characteristics - ESD Protection VDD = 4.5V to 5.5V, T A = 25 °C (unless specified otherwise) Symbol Parameter Condition/Note Min. Typ. Max. Unit VESD ESD Protection Level (DP and DM Only) Human Body Model -- ±8 -- kV V ESD ESD Protection Level (All other pins) Human Body Model -- ±2 -- kV
000-00055587-101 Page 6 of 9 SLG55587 SLG55587A CEN Function Waveform CEN# Function Waveform CEN CB CEN# CB
000-00055587-101 Page 7 of 9 SLG55587 SLG55587A Package Top Marking System Definition Part ID Assembly Code Datecode Lot Revision 8 7 6 5 1 2 3 4 – Part ID Field: identifies the specific device configuration – Assembly Code Field: Assembly Location of the device. – Date Code Field: Coded date of manufacture – Lot Code: Designates Lot # – Revision Code: Device Revision XX A DD L R
000-00055587-101 Page 8 of 9 SLG55587 SLG55587A Package Drawing and Dimensions
8 Lead TDFN Package
D E AB C0.15 C0.15 A DETAIL A b C0.10 A BM C0.05 M DETAIL B Symbol Min (mm) NOM (mm) Max (mm) 0.70 0.75 0.80 A 0.00 -- 0.05 A1 -- 0.55 -- A2 -- 0.20 -- A3 0.20 0.25 0.30 b 1.90 2.00 2.10 D 1.50 1.60 1.70 D2 1.90 2.00 2.10 E 0.80 0.90 1.00 E2
0.50 BSC e
0.20 0.30 0.40 L SEATING PLANE DETAIL A C0.10 C0.08 C Pin 1 0.25x45° L DETAIL B e
000-00055587-101 Page 9 of 9 SLG55587 SLG55587A Tape and Reel Specifications Carrier Tape Drawing and Dimensions Package Type # of Pins Nominal Package Size [mm] Max Units Reel & Hub Size [mm] Leader (min) Trailer (min) Tape Width [mm] Part Pitch [mm] per Reel per Box Pockets Length [mm] Pockets Length [mm] TDFN 8L Green 8 2 x 2 x 0.75 3,000 3,000 178 / 60 42 168 42 168 8 4 Package Type Pocket BTM Length Pocket BTM Width Pocket Depth Index Hole Pitch Pocket Pitch Index Hole Diameter Index Hole to Tape Edge Index hole to Pocket center Tape Width A0 B0 K0 P0 P1 D0 E F W TDFN 8L W EP0 Y Y Section Y-Y CL F
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