SL70D0948 SLS | Alldatasheet
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SLS System Logic Semiconductor SL70D0948
48 OUTPUT LED DRIVER / 9 BIT PWM CONTROLLER
System Logic Semiconductor
SLS System Logic Semiconductor SL70D0948 INTRODUCTION The SL70D0948 is LED driver / controller IC for LED display panel. This is consisted of 48 channel LED driver , 9Bit PWM controller and 48 bit shift register. Also it is very convenient to application because all display data can transfer by serial method.
FEATURES
- 48 LED Driver Outputs : N-ch Open Drain MOS Transistor Output - LED Driving Voltage : Max. 16V (When Transistor Off) - LED Driving Current : Max. 90mA - LED Driving Current Control - Outputs are 9bit PWM controlled Data Interface - 48bit Shift Register for 9bit data input - 9bit parallel data format selectable PWM controller - 9bit PWM control ( 512 Gray scale ) - 3bit Brightness / 4bit Brightness input selectable Package Type - 100 pin MQFP
SLS System Logic Semiconductor SL70D0948 BLOCK DIAGRAM 48 bit x9bit Shift RegisterDIN 9bit DOUT 9bit 9bit Data Register (1) 9bit Data Register (2) 9bit Data Register (3) 9bit Data Register (46) 9bit Data Register (47) 9bit Data Register (48) PWM Generator (1) PWM Generator (2) PWM Generator (3) PWM Generator (46) PWM Generator (47) PWM Generator (48) 9 9 9 9 9 9 9 9 9 9 9 LED Driver (1) LED Driver (2) LED Driver (3) LED Driver (46) LED Driver (47) LED Driver (48) LED1 LED2 LED3 LED46 LED47 LED48 DIN8 DIN0 DOUT8 DOUT0 SHCLK 9 bit PWM Counter PWCLK BRMODE STROBE BRD2 BRD1 BRD0 Driver Output ControlOE CE2 /CE1 /RESET
SLS System Logic Semiconductor SL70D0948 PIN ASSIGNMENT(MQFP) SL70D0948 System Logic Semiconductor DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 GND LED43 LED44 LED45 LED46 LED47 LED48 GND LED1 LED2 LED3 LED4 LED5 LED6 GND DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT6 DOUT5 NC VDD GND LED18 LED17 LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 31 5180 VDD PWCLK OEB BRMODE GND GND LED30 LED29 LED28 LED27 LED26 LED25 GND LED24 LED23 LED22 LED21 LED20 LED19 GND BRD0 BRD1 BRD2 GND VDD VDD VDD GND CE2 /CE1 STROBE SHCLK /RESET GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD DIN8 100
SLS System Logic Semiconductor SL70D0948 PIN DESCRIPTION PIN NAME FUNCTION VDD 5 V Power supply terminal. GND GND terminals for LED Drivers and control logic. All GND terminals must be connected to GND level. Do not left any GND terminal to NC. DIN8 ~ DIN0 Data input terminals for 9bit R, G, B data. Shift register accepts R, G, B data from these terminals. (at rising edge of SHCLK) DOUT8 ~ DOUT0 Output terminals of shift register output data for next DIN8 ~ DIN0 terminals. /RESET Reset input terminal (Low active). SHCLK Shift register clock input terminal. STROBE Strobe signal input terminal. At rising edge of strobe signal, 48 channels of 9 bit data registers copy R, G, B data from shift register. /CE1 Chip enable signal input terminal (Low active). CE2 Chip enable signal input terminal (High active). The device accepts SHCLK and STROBE when /CE1 = “L ” and CE2 = “H ”. OEB Output enable signal input terminal. The device outputs data when OEB = “L ”. When OEB = “H ” all R, G, B output terminals hold high-impedance state. PWCLK PWM generator reference clock input terminal. BRMODE Brightness control mode input terminal. BRD2 ~ BRD0 Brightness control data input terminal. PIN No. (MQFP) 49,52,53,54,78,99 9, 16, 23, 33, 34, 41, 48, 59, 65, 72,74 84, 91, 98 100, 1, 2, 3, 4, 5, 6, 7, 8 32, 31, 30, 29, 28, 27, 26, 25, 24 56, 57, 58
SLS System Logic Semiconductor SL70D0948 GND Reserved Pin. Must be tied to GND. NC No Connection LED1 ~ 48 LED driver output terminals. PIN DESCRIPTION (continued) 51,55 PIN NAME FUNCTIONPIN No. (MQFP) 17, 18, 19, 20, 21, 22,35 , 36, 37, 38, 39, 40, 42, 43, 44, 45 46, 47, 60, 61 62, 63, 64, 65 67, 68, 69, 70, 71, 72, 85, 86 87, 88, 89, 90 92, 93, 94, 95 96, 97, 10, 11 12, 13, 14, 15
SLS System Logic Semiconductor SL70D0948 FUNCTION DESCRIPTION SYSTEM INTERFACE Chip Enable Input The chip enable pins are /CE1 and CE2. The SL70D0948 can enable chip by /CE1=0, and CE2=1. If the SL70D0948 is enable then it can receive signal that DIN,SHCLK and STROBE. Output Enable Input The SL70D0948 has output enable pin (OEB). If the OEB = 1, all output are off and if OEB = 0 then all output pins are PWM output. Data Input / Output The SL70D0948 has 9bit data input pins (DIN[8:0]) and 9bit data output pins (DOUT[8:0]). The output data is out after 48 times SHCLK from input data. If DOUT[8:0] pins are connected to next device DIN[8:0] pins, the first device 48bit input data can shift the next device 48bit input data by SHCLK. It can transfer display data to serial method so it makes device to connect directly. The 9bit LED input data are MSB first inputted. The 9bit input data are inputted 9bit LED1 and next 9bit LED2 and next 9bit LED3 … LED48 input data by SHCLK.
SLS System Logic Semiconductor SL70D0948 LED2LED1LED48LED47LED46LED45DIN8~DIN0 SHCLK DATA INPUT STROBE Data Register DATA (internal) Data Register(1) LED1[8:0] LED2[8:0] LED3[8:0] LED4[8:0] LED5[8:0] LED48[8:0] LED47[8:0] INPUT TIMING DIAGRAM LED46[8:0] DOUT TIMING DIAGRAM LED48[8:0]LED47[8:0]LED46[8:0]LED45[8:0]LED44[8:0]LED43[8:0]DIN8~DIN0 SHCLK DATA INPUT DOUT8~DOUT6 LED47[8:0]LED46[8:0]LED43[8:0] LED45[8:0]LED44[8:0] DATA OUTPUT SHCLK (After 48 clocks) 5449 50 51 52 53 61 2 3 4 5 Data Register(2) Data Register(3) Data Register(4) Data Register(5) Data Register(46) Data Register(47) Data Register(48)
SLS System Logic Semiconductor SL70D0948 PWM OUTPUT WAVEFORM OUTPUT DRIVER PWCLK 8 clock = 1 T BRMODE = 0, BRD[2:0] = (1 1 1) 2 OUTPUT DRIVER PWCLK 8 clock = 1 T BRMODE = 0, BRD[2:0] = (0 0 0) 2 OUTPUT DRIVER PWCLK 16 clock = 1 T BRMODE = 1, BRD[2:0] = (111) 2 OUTPUT DRIVER PWCLK BRMODE = 1, BRD[2:0] = (0 0 0) 2 9 clock = 9/16 T 16 clock = 1 T
SLS System Logic Semiconductor SL70D0948 PWM OUTPUT TIMING DIAGRAM OUTPUT DRIVER
511 T 511 T
DATA = (1FF) 16 OUTPUT DRIVER DATA = (100) 16
256 T 256 T
DATA = (001) 16
1 T 1 T
SLS System Logic Semiconductor SL70D0948 SPECIFICATIONS CHARACTERISTIC SYMBOL UNIT MAXIMUM RATINGS ( Ta = 25 o RATING Supply Voltage V DD V0 ~ 7.0 Output Voltage (LED1 ~ LED48) V OUT V-0.5 ~ 17 Output Current (LED1 ~ LED48) IOUT mA90 Input Voltage V IN V-0.4 ~ V DD + 0.4 GND terminal Current IGND mA1440 Clock Frequency F PWM MHz20 Power Dissipation P D W1.78 Operating Temperature T OPR o C-40 ~85 PWCLK F SR MHz15SHCLK Storage Temperature T STG o C-55 ~ 150 CHARACTERISTIC SYMBOL UNIT RECOMMANDED OPERATING CONDITION ( Ta = 25 o CONDITION Supply Voltage V DD V- Output Voltage (LED1~48) V OUT V- Output Current IOUT mA Input Voltage V IN V- Clock Frequency F PWM MHz- Power Dissipation P D W- PWCLK MIN. 4.5 TYP. 5.0 MAX. 5.5 15.0 V DD 1.78 LED1~ 48 SHCLK IOH - - - -1.0 IOL - - - 1.0 DIN Data Setup Time tDSU ns- 50 - - DIN Data Hold Time tDHLD ns- 20 - - STROBE Setup Time tSSU ns- 50 - - STROBE Hold Time tSHLD ns- 20 - - F SR MHz-SHCLK - - 10 Pulse Width SHCLK, PWCLK, STROBE tWH ns- 30 - - tWL ns- 30 - -
SLS System Logic Semiconductor SL70D0948 CHARACTERISTIC SYMBOL UNIT SWITCHING CHARACTERISTICS ( Ta = 25 o tPLH ns F SRMAX F PWMAX Data Set Up Time tDSU Data Hold Time tDHLD ns MHz Maximum Clock Rise Time tR CONDITION MAX.TYP.MIN. V DD = 5.0V V OUT = 0.4V V CON = V DD V IH = V DD V IL = GND F PWM = 10MHz IOUT = 40mA Propagation Delay Time (“L ” to “H ”) SHCLK-DOUT STROBE OE Maximum Clock Frequency SHCLK PWCLK F STMAXSTROBE Minimum Pulse Width tWH tWL SHCLK PWCLK STROBE Maximum Clock Fall Time Maximum Output Rise Time Maximum Output Fall Time tF tOR tOF us 20 50 - 50 100 - 50 100 10 15 20 15 20 30 10 15 20 - 10 20 - 10 20 - 10 20 - 15 30 - 10 15 - - 10 - - 10 - 50 100 - 100 200 ns ns DIN8~DIN0 SHCLK DOUT8~DOUT0 TIMING WAVE FORM DIN[8:0] tDSU tDHLD tR tF tWH tWL
0.1 VDD
0.9 VDD
DOUT[8:0] tPLH LED1 ~ LED48 OUTPUT tPLH
SLS System Logic Semiconductor SL70D0948
PACKAGE INFORMATION
100 PIN MQFP (14 x 20 Body)
20.1 19.9 24.15 23.65 14.1 13.9 18.15 17.65
3.10 MAX
0.38 0.22 0.65 0~7 8 0.36 0.10 0.23 0.13 1.03 0.73 1.95
SLS System Logic Semiconductor SL70D0948 Power Line Connection REFERENCE APPLICATIONS VDD GND SL70D0948 System Logic Semiconductor DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 GND LED43 LED44 LED45 LED46 LED47 LED48 GND LED1 LED2 LED3 LED4 LED5 LED6 GND DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT6 DOUT5 NC VDD GND LED18 LED17 LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 VDD PWCLK OEB BRMODE GND GND LED30 LED29 LED28 LED27 LED26 LED25 GND LED24 LED23 LED22 LED21 LED20 LED19 GND BRD0 BRD1 BRD2 GND VDD VDD VDD GND CE2 / CE1 STROBE SHCLK / RESET GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD DIN8
SLS System Logic Semiconductor SL70D0948 Data & Control Signal Connection REFERENCE APPLICATIONS (continued) Application Ex 1. IN8 IN4 IN3 IN2 IN1 IN0 OUT8 OUT7 PWCLK OEB STROBE SHCLK / RESET BRMODE = 0 : The brightness is controlled by 8 steps such as 8/8 ~ 1/8. VDD GND IN7 IN6 IN5 OUT2 OUT3 OUT4 OUT5 OUT6 OUT0 OUT1 CE SL70D0948 System Logic Semiconductor DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 GND LED43 LED44 LED45 LED46 LED47 LED48 GND LED1 LED2 LED3 LED4 LED5 LED6 GND DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT6 DOUT5 NC VDD GND LED18 LED17 LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 VDD PWCLK OEB BRMODE GND GND LED30 LED29 LED28 LED27 LED26 LED25 GND LED24 LED23 LED22 LED21 LED20 LED19 GND BRD0 BRD1 BRD2 GND VDD VDD VDD GND CE2 / CE1 STROBE SHCLK / RESET GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD DIN8
SLS System Logic Semiconductor SL70D0948 REFERENCE APPLICATIONS (continued) Data & Control Signal Connection Controller 9bit Data9bit Data9bit Data Oscillator SL70D0948 DIN[8:0] DOUT[8:0] LED Driver Outputs
48 Pins
48 LEDs
DIN[8:0] DOUT[8:0] LED Driver Outputs DIN[8:0] DOUT[8:0] LED Driver Outputs 5 ~ 20 MHz