TNSH7A883AE RENESAS | Alldatasheet

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(c) 2014. Renesas Electronics Corporation. All rights reserved. Page 1 of 1 Date: Apr. 2, 2014 RENESAS TECHNICAL UPDATE 1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 Japan Renesas Electronics Corporation Product Category MPU/MCU Document No. TN-SH7-A883A/E Rev. 1.00 Title Correction of errors regarding the SRAM Interface on Internal Bus of the Bus State Controller (BSC) Information Category Technical Notification Applicable Product

  • SH7214 Group
  • SH7216 Group Lot No. Reference Document
  • SH7214 Group, SH7216 Group User’s Manual: Hardware Rev.4.00 (R01UH0230EJ0400) All lots We would like to inform you of the correction of errors in the above listed user's manuals. Please refer to the following for details. <Corrections>

9.5.8 SRAM Interface with Byte Selection

Erroneous: 64K×16-bit This LSI SDRAM Figure 9.41 Exa mple of Con nectio n with 16-Bit Data-W idth SR AM with Byte Selectio n Corrected: 64K×16-bit This LSI SRAM Figure 9.41 Exa mple of Con nectio n with 16-Bit Data-W idth SR AM with Byte Selectio n A16 CSn RD RD/WR D15 WRHH WRHL A15 CS OE WE I/O15 I/O0 UB LB A16 CSn RD RD/WR D15 WRH WRL A15 CS OE WE I/O15 I/O0 UB LB