SFH9250L

SFH9250L FAIRCHILD | Alldatasheet

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Technical content

Advanced Power MOSFET SFH9250L BVDSS = -200 V RDS(on) = 0.23 Ω ID = -19.5 A -200 -19.5 -12.3 -78 ±20 990 -19.5 20.4 -5.0 204 1.63 - 55 to +150 300 0.61 0.24 ❑ Logic-Level Gate Drive ❑ Avalanche Rugged Technology ❑ Rugged Gate Oxide Technology ❑ Lower Input Capacitances ❑ Improved Gate Charge ❑ Extended Safe Operating Area ❑ Lower Leakage Current : 10uA (Max.) @ VDS=-200V ❑ Lower RDS(ON) : 0.175 Ω (Typ.) Thermal Resistance Junction-to-Case Case-to-Sink Junction-to-Ambient RθJC RθCS RθJA °C/ W Characteristic Max. UnitsSymbol Typ.

FEATURES

Continuous Drain Current (TC=25 °C) Continuous Drain Current (TC=100 °C) Drain Current-Pulsed ① Gate-to-Source Voltage Single Pulsed Avalanche Energy ② Avalanche Current ① Repetitive Avalanche Energy ① Peak Diode Recovery dv/dt ③ Total Power Dissipation (TC=25 °C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8″ from case for 5-seconds Characteristic Value UnitsSymbol IDM VGS EAS IAR EAR dv/dt ID PD TJ , TSTG TL A V mJ A mJ V/ns W W/ °C A VDSS V TO-3P 1.Gate 2. Drain 3. Source Rev. A

-200 -1.0 -0.17 400 210 150 100 -2.0 100 -100 100 0.23 3250 520 270 310 210 140 120 2500 260 2.8 -19.5 -78 -1.5 Notes ; ① Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature ② L=3.9mH, IAS=-19.5A, VDD=-50V, RG=27Ω , Starting TJ =25℃ ③ ISD≤-19.5A, di/dt≤500A/μs, VDD≤BVDSS , Starting TJ =25℃ ④ Pulse Test : Pulse Width ≤ 300μs, Duty Cycle ≤ 2% ⑤ Essentially Independent of Operating Temperature Electrical Characteristics (TC=25°C unless otherwise specified) Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse CharacteristicSymbol Max. UnitsTyp.Min. Test Condition Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(Miller) Charge g fs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd BVDSS ΔBV/ΔTJ VGS(th) RDS(on) IGSS IDSS V V/ °C V nA μA Ω pF ns nC .175 V GS=0V,ID=-250μA ID=-250μA See Fig 7 VDS=-5V,ID=-250μA VGS=-20V VGS=20V VDS=-200V VDS=-160V,TC=125 °C VGS=-5V,ID=-9.8A ④ VDS=-40V,ID=-9.8A ④ VDD=-100V,ID=-19.5A, RG=6.2Ω See Fig 13 ④⑤ VDS=-160V,VGS=-5V, ID=-19.5A See Fig 6 & Fig 12 ④⑤ Drain-to-Source Leakage Current VGS=0V,VDS=-25V,f =1MHz See Fig 5 Source-Drain Diode Ratings and Characteristics Continuous Source Current Pulsed-Source Current ① Diode Forward Voltage ④ Reverse Recovery Time Reverse Recovery Charge I S ISM VSD trr Qrr CharacteristicSymbol Max. Units Typ.Min. Test Condition A V ns μC Integral reverse pn-diode in the MOSFET T J=25 °C,IS=-19.5A,VGS=0V TJ=25 °C,IF=-19.5A,VDD=-160V diF/dt=100A/μs ④ P-CHANNEL POWER MOSFET S

Fig 1. Output Characteristics Fig 2. Transfer Characteristics Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current P-CHANNEL POWER MOSFET VGS Top : -10.0 V -8.0 V -6.0 V -5.0 V -4.5 V -4.0 V -3.5 V Bottom : -3.0 V ※ Note : 1. 250μ s Pulse Test 2. TC = 25℃ -ID, Drain Current [A] -VDS, Drain-Source Voltage [V] 2468 1 0 ※ Note 1. VDS = -40V 2. 250μ s Pulse Test -55℃ 150℃ 25℃ -ID , Drain Current [A] -VGS , Gate-Source Voltage [V] 0 2 04 06 08 0 1 0 0 0.0 0.2 0.4 0.6 0.8 ※ Note : TJ = 25℃ VGS = - 10V VGS = - 5V RDS(on) , [Ω ] Drain-Source On-Resistance -ID , Drain Current [A] 25℃150℃ ※ Note : 1. VGS = 0V 2. 250μ s Pulse Test -IDR , Reverse Drain Current [A] -VSD , Source-Drain Voltage [V] 1500 3000 4500 6000 7500 9000 10500 12000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd ※ Note ; 1. VGS = 0 V 2. f = 1 MHz Crss Coss Ciss Capacitances [pF] -VDS, Drain-Source Voltage [V] 02 0 4 0 6 0 8 0 1 0 0 VDS = -100V VDS = -40V VDS = -160V ※ Note : ID = -19.5 A -VGS, Gate-Source Voltage [V] QG, Total Gate Charge [nC]

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature Fig 11. Thermal Response PDM P-CHANNEL POWER MOSFET -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 ※ Note : 1. VGS = 0 V 2. ID = -250 μ A -BVDSS, (Normalized) Drain-Source Breakdown Voltage TJ, Junction Temperature [ o -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 ※ Note : 1. VGS = -5 V 2. ID = -9.8 A RDS(ON), (Normalized) Drain-Source On-Resistance TJ, Junction Temperature [ o DC 10 ms 1 ms 100 µs Operation in This Area is Limited by R DS(on) ※ Notes : 1. TC = 25 o C 2. TJ = 150 o C 3. Single Pulse -ID, Drain Current [A] -VDS, Drain-Source Voltage [V] 25 50 75 100 125 150 -ID, Drain Current [A] TC, Case Temperature [℃] ※ N otes : 1. Z θ JC (t) = 0.61 ℃ /W M ax. 2. D uty Factor, D =t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) single pulse D=0. 5 0.02 0.2 0.05 0.1 0.01 Z θ JC (t), Thermal Response t1 , Square W ave Pulse D uration [sec]

Fig 12. Gate Charge Test Circuit & Waveform Fig 13. Resistive Switching Test Circuit & Waveforms Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms EAS =L L IAS 2----2 BVDSS -- VDD BVDSS Vin VDS 90% 10% td(on) tr t on t off td(off) tf Charge VGS -5V Qg Qgs Qgd VDD VDS BVDSS VDD IAS VDS (t) ID (t) t p Time VDD ( 0.5 rated VDS ) -5V VDS RL DUT RG -3mA VGS DUT VDS 300nF 50KΩ 200nF12V Same Type as DUT -5V DUT RG L I D

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT VDS Driver RG Compliment of DUT (N-Channel) VGS • dv/dt controlled by RG

• IS controlled by pulse period VDD L I S VGS ( Driver ) I S ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop Vf IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width

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