SF23C4000 KB | Alldatasheet

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Technical content

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 1 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use. - Table of Contents -

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 2 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use.

1 Function Description

The SF23C4000 is a fully static, 512K x 8 bit CMOS Mask Programmable ROM. This device operates in wide operating range. It requires no external cl ock for its operation and suitable for use with microprocessor program memory, and data memory (speech, graphic, etc).

2 Features

9 V oltage range 2.4V ~ 5.5V

9 Organization

  • Memory Cell Array: 512K x 8

9 Low Operation Current (Typical)

  • 10µA Standby mode Current - 10mA Active Read Current

9 Fully static operation

9 Three state outputs

9 Package bare chip, PLCC32

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 3 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use.

3 Functional block diagram

4 Pin Description

A111 A22 A39 A48 A57 A66 A75 A12 4 A14 29 A13 28 OE 24 A8 27 A15 3 A17 30A18 31 A16 2 A10 23 A11 25 Q013 Q114 Q215 Q418 Q519 Q620 Q7 21CE 22 VDD 32 VSS16 NC 1 A012 Q317 A9 26 Symbol Pin No. I/O Description VDD 32 P Positive power supply input pin. VSS 16 P Gound pin. CEn 22 I The CEn (Chip Enable) input is th e device selection and power control for internal Mask ROM array. Whenever CEn goes high, the internal Mask ROM will enter standby (power saving) mode. Otherwise, it is in active mode and the contents of the ROM can be accessed. MEMORY CELL ARRAY SENSE AMP. OEn X BUFFER & DECODER [Q7.. Q0] CONTROL LOGIC Y BUFFER & DECODER CEn [A18..A0]

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 4 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use. OEn 24 I OEn (Output Enable) is the output control which gates ROM array data onto the data output pins Q7 ~ Q0. A18 ~ A0 I Mask ROM Address input pins. Q7 ~ Q0 21 ~ 17, 15 ~13 O Mask ROM array Data outputs drive Q7 ~ Q0 pins during read operations (OEn low). The Q7 ~ Q0 pins stay in high-impedance when the chip is deselected (CEn high) or when the outputs are disabled (OEn high).

5 Pad Location

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 5 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use. 1 A7 108.33 2431.75 21 Q5 2058.62 109.14 2 A6 108.33 2244.31 22 Q6 2245.78 109.14 3 A5 108.33 2057.03 23 Q7 2745.87 105.79 4 A4 108.33 1869.59 24 CEN 2745.87 229.55 5 NC 108.33 1682.36 25 A10 2745.87 355.17 6 NC 108.33 1494.92 26 OEN 2745.87 480.32 7 NC 108.33 1307.74 27 A11 2759.48 1365.83 8 NC 108.33 1119.34 28 A9 2759.48 1491.74 9 A3 108.33 932.17 29 A8 2759.48 1617.63 10 A2 108.33 744.73 30 A13 2748.87 2427.92 11 A1 108.33 557.45 31 A14 2748.87 2555.13 12 A0 108.33 370.01 32 A17 2107.66 2566.92 13 Q0 108.33 182.72 33 A18 1920.22 2566.92 14 Q1 395.97 109.14 34 VDD 1578.76 2513.72 15 Q2 583.13 109.14 35 VDD 1404.34 2513.72 16 VSS 997.39 220.71 36 VDD 1229.92 2513.72 17 VSS 1242.34 140.91 37 NC 1029.23 2552.3 18 VSS 1521.38 108.09 38 A16 841.19 2552.3 19 Q3 1684.02 109.14 39 A15 495.57 2552.3 20 Q4 1871.18 109.14 40 A12 308.13 2552.3

6 Absolute Maximum Rating

Items Symbol Rating Condition Supply V oltage V DD -0.3 to 6 V Input V oltage V IN -0.3 to Vdd+0.3 V Operating Temperature T OPR -0 to 70 °C Storage Temperature T STR -55 to 125 °C READ CYCLE There are two ways of accessing the ROM data. The first one is to assert the valid address on the Address Bus, then assert CEn “low” to enable the ROM arra y. The access time in this mode is specified as t ACE. The advantage of this access mode is that power consumption can be lowered. The second access mode keeps the CEn “low” while changes the addresses to access the contents of ROM data. The access time in

King Billion Electronics Co., Ltd 駿 億 電 子 股 份 有 限 公 司 SF23C4000 August 27, 2003 Page 6 of 6 V1.1 This specification is subject to change without notice. Please contact sales person for the latest version before use. this way is specified as t AA. In this device, the Address Acce ss Time decrease monotonically with increasing voltage, and it is shorte r than Chip Enable Access Time wh en the Operation V oltage is higher then 4.5 V . Therefore in Vop higher than 4.5 V olts, it is more advisable to use the Address Access Mode to achieve faster access to ROM data when the power consumption is not a concern. Chip Enable Access Time t ACE 280 190 170 150 150 190 210 ns Min Address Access Time t AA 240 210 210 210 200 190 180 ns Min (VSS = 0V , VDD = 5.0 V , TOPR = 25°C unless otherwise noted) Parameter Symbol Min. Typical Max. Unit Condition Supply V oltage V DD 2.4 - 5.5 V Operating Current I DD - 10 - mA No load Standby Current I DD - 10 - µA No load Input voltage V IH VIL VDD V DD = 4V ~ 6V Input current leakage I IL - - +/- 10 µA D Output High V oltage V OH 2.4 - - V I OH = 14 mA D Output Low V oltage V OL - - 0.4 V I OL = 3 mA

9 Updated History

Version Date Update Description