SEMP8965

SEMP8965 SECOS | Alldatasheet

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Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 1 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. RoHS Compliant Product A suffix of “-C” specifies halogen or lead -free

DESCRIPTION

The SEMP8965 low-dropout (LDO) CMOS linear regulators, consisting of SEMP8965, SEMP8966, and SEMP8968, feature ultra-high power supply rejection ratio (75dB at 1kHz ), low output voltage noise (30µV), low dropout voltage (270mV), low quiescent current (110µA), and fast transient response. It guarantees delivery of 600mA output current, output voltage versions. The SEMP8965 is ideal for battery-powered applications by virtue of its low quiescent current consumption and its 1nA shutdown mode of logical operation. The regulator prov ides fast turn-on and start-up time by using dedicated circuitry to pre-charge an optional external bypass capacitor. This bypass capacitor is used to reduce the output voltage noise without adversely affecting the load transient respons e. The high power supply rejection ratio of the SEMP8965 holds well for low input voltages typically encountered in ba ttery- operated systems. The regulator is stable with small ceramic capacitive loads (2.2µF typical). Additional features include regulation fault detection, band-gap voltage reference, constant current limiting and thermal overload protection.

FEATURES

z 600mA guaranteed output current z 75dB typical PSRR at 1kHz z 30µV RMS output voltage noise (10Hz to 100kHz) z 270mV typical dropout at 600mA z 110µA typical quiescent current z 1nA typical shutdown mode z Fast line and load transient response z 80µs typical fast turn-on time z 2.5V to 5.5V input range z Stable with small ceramic output capacitors z Over temperature and over current protection ±2% output voltage tolerance PACKAGE DIMENSIONS SOT-25 οθ SYMBOLS MIN. NOM. MAX. A 1.05 1.20 1.35 A1 0 - 0.15 A2 1.00 1.10 1.20 b 0.30 - 0.55 c 0.08 - 0.20 D 2.80 2.90 3.00 E 2.60 2.80 3.00 E1 1.50 1.60 1.70 e 0.95 BSC e1 1.90 BSC L 0.30 0.45 0.55 L1 0.60 REF θ° 0 5 10 θ2° 6 8 10

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 2 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. MSOP-8 οθ SYMBOLS MIN. NOM. MAX. A - - 1.1 A1 0 - 0.15 A2 0.75 0.85 0.95 D 3.00 BSC E 4.90 BSC E1 3.00 BSC L 0.40 0.60 0.80 L1 0.95 BSC θ° 0 - 8

APPLICATIONS

z Portable information appliances MARKING & PACKING INFORMATION PIN FUNCTIONS Vout Code Vout Order Information 12 1.2 SEMP8965-12 15 1.5 SEMP8965-15 18 1.8 SEMP8965-18 25 2.5 SEMP8965-25 30 3.0 SEMP8965-30 33 3.3 SEMP8965-33 Symbol Pin # Function VIN 1 Supply Voltage Input. Require a minimum input capacitor of close to 1µF to ensure stability and sufficient decoupling from the ground pin. GND 2 Ground Pin. SHDN 3 Shutdown Input. Set the regulator into the disable mode by pulling the SHDN pin low. To keep the regulator on during normal operation, connect the SHDN pin to VIN. The SHDN pin must not exceed VIN under all operating conditions. CC 4 Compensation Capacitor. Connect an optimum 33nF noise bypass capacitor between the CC and the ground pins to reduce noise in VOUT. VOUT 5 Output Voltage Feedback.

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 3 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. MAXIMUM RATINGS Parameter Value Units VIN, VOUT, V SHDN , VSET, VCC, V FAULT -0.3 ~ 6.0 V Supply Voltage 2.5 ~ 5.5 V Power Dissipation (Note 3) W ESD Susceptibility HBM (Note 5) 2 kV Temperature Lead (10 sec.) 260 Storage (T STG) -65 ~ +160 (Note 1)(Note 2) Operating (T OPR) -40 ~ 85 Junction (T J) 150

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, all limits guaranteed for VIN = VOUT +1V (Note 6), V SHDN = V IN, CIN = COUT = 2.2µF, CCC = 33nF, TJ = 25°C. Boldface limits apply for the operating temperature extremes: -40°C and 85°C. Symbol Parameter Conditions Min Typ (Note 7) Max Units VIN Input Voltage 2.5 5.5 V -2 +2 ΔVOTL Output Voltage Tolerance 100µA ≤ IOUT ≤ 300mA VOUT (NOM) +0.5V ≤ VIN ≤ 5.5V (Note 6) ADJ/NC=VOUT for the Adjust Versions -3 +3 % of VOUT (NOM) VOUT Output Adjust Range Adjust Version Only 1.20 5.0 V IOUT Maximum Output Current Average DC Current Rating 600 mA ILIMIT Output Current Limit 600 950 mA IOUT = 0mA 110 Supply Current IOUT = 600mA 255 IQ Shutdown Supply Current V OUT = 0V, SHDN = GND 0.001 1 µA IOUT = 50mA 19 IOUT = 300mA 110 Dropout Voltage (MSOP-8) (Note 4), (Note 6) IOUT = 600mA 230 IOUT = 50mA 22 IOUT = 300mA 130 VDO Dropout Voltage (SOT-25, SOT-26) (Note 4), (Note 6) IOUT = 600mA 270 mV Line Regulation IOUT = 1mA, (VOUT + 0.5V) ≤ VIN ≤ 5.5V (Note 7) -0.1 0.02 0.1 %/V ΔVOUT Load Regulation 100µA ≤ IOUT ≤ 600mA 0.001 %/mA en Output Voltage Noise I OUT = 10mA, 10Hz ≤ f ≤ 100kHz 30 µVRMS VIH, (VOUT + 0.5V) ≤ VIN ≤ 5.5V (Note 1.2 V SHDN SHDN Input Threshold VIL, (VOUT + 0.5V) ≤ VIN ≤ 5.5V (Note 0.4 V I SHDN SHDN Input Bias Current SHDN = GND or VIN 0.1 100 nA IADJ/NC ADJ/NC Input Leakage ADJ/NC=1.3V, Adjust Version Only (Note 9) 0.1 3 nA FAULT Detection Voltage V OUT ≥ 2.5V, IOUT = 200mA (Note 10) 125 mV V FAULT FAULT Output Low Voltage I SINK = 2mA 0.2 V

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 4 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. I FAULT FAULT Off-Leakage Current FAULT = 3.6V, SHDN = 0V 0.1 100 nA Thermal Shutdown Temperature 165 TSD Thermal Shutdown Hysteresis TON Start-Up Time COUT = 10µF, VOUT at 90% of Final Value 80 µs Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: All voltages are with respect to the potential at the ground pin. Note 3: Maximum Power dissipation for the device is calculated using the following equations: JAθ AT - J(MAX)T DP = where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance. The maximum power dissipation is found to be 561mW. The derating factor (-1/θJA) = -4.5mW/°C, thus below 25°C the power dissipation figure can be increased by 4.5mW per degree, and similarity decreased by this factor for temperatures above 25°C. Note 4: Typical Values represent the most likely parametric norm. Note 5: Human body model: 1.5k  in series with 100pF. Note 6: Condition does not apply to input voltages below 2.5V since this is the minimum input operating voltage. Note 7: Dropout voltage is measured by reducing VIN until VOUT drops 100mV from its nominal value at VIN -VOUT = 0.5V. Dropout voltage does not apply to the regulator versions with VOUT less than 2.5V. Note 8: The ADJ/NC pin is disconnected internally for the preset versions. Note 9: The FAULT detection voltage is specified for the input to output voltage differential at which the FAULT pin goes active low.

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 5 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. TYPICAL APPLICATION BLOCK DIAGRAM Fig.1a. The SEMP8965 Functional Block Diagram (Preset Version with the ADJ/NC Pin Disconnected internally) Fig.1b. The SEMP8965 Functional Block Diagram (Adjustable Version with the ADJ/NC Pin Connected to External Resistors R1 and R2)

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 6 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. TYPICAL CHARACTERISTICS Unless otherwise specified, VIN = VOUT (NOM) + 1V, CIN = COUT = 2.2µF, CCC = 33nF, TA = 25°C, V SHDN = VIN. PSRR vs. Frequency PSRR vs. Frequency PSRR vs. Frequency PSRR vs. Frequency PSRR vs. Frequency Dropout Voltage vs. Load Current Frequency (Hz) Frequency (Hz) PSRR (dB) Frequency (Hz) PSRR (dB) PSRR (dB) Frequency (Hz) PSRR (dB) Frequency (Hz) Frequency (Hz) PSRR (dB) load Current (mA) Dropout Voltage (mV) VOUT=3.3V VIN=4V, VOUT=1.8V VIN=4V, VOUT=2.5V VIN=3.3V, VOUT=1.8V VIN=4.3V, VOUT=3.3V VIN=5V, VOUT=3.3V

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 7 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. TYPICAL CHARACTERISTICS Unless otherwise specified, VIN = VOUT (NOM) + 1V, CIN = COUT = 2.2µF, CCC = 33nF, TA = 25°C, V SHDN = VIN. (cont’d) Supply Current vs. Input Voltage Input Voltage (V) Supply Current vs. Load Current Load Current (mA) Load Transient 400μs/DIV Load Transient 400μs/DIV Supply Current (µA) Supply Current (µA) 50mV/DIV 100mA/DIV 50mV/DIV 200mA/DIV 1mA~300mA 1mA~600mA VOUT IOUT VOUT IOUT

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 8 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. TYPICAL CHARACTERISTICS Unless otherwise specified, VIN = VOUT (NOM) + 1V, CIN = COUT = 2.2µF, CCC = 33nF, TA = 25°C, V SHDN = VIN. (cont’d) Line Transient 200μs/DIV Line Transient 200μs/DIV Current Limit 100ms/DIV Enable and Disable 400μs/DIV Fault Detection Threshold vs. Load Current Load Current (mA) VOUT=3.3V, IOUT=10mA VOUT (10mV/DIV) 4.3V 5.3V VIN VOUT=3.3V, IOUT=600mA VOUT (10mV/DIV) 4.3V 5.3V VIN IOUT (200mA/DIV) VOUT (1V/DIV) VSHDN (2V/DIV) Fault Detect Threshold (mV)

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 9 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually.

APPLICATION INFORMATION

Referring to Figure 1 as shown in the Functional Block Diagram section, the SEMP8965 adopts the classical regulator topology in which negative feedback control is used to perform the desired voltage regulating function. The negative feedback is formed by using feedback resistors (R1, R2) to sample the output voltage for the non-inverting input of the error amplifier, whose inverting input is set to the bandgap reference voltage. By virtue of its high open-loop gain, the error amplifier operates to ensure that the sampled output feedback voltage at its non-inverting input is virtually equal to the preset bandgap reference voltage. These feedback resistors can be either internal or external to the SEMP8965, depending on whether a preset or an adjustable output voltage version is being used. The error amplifier compares the voltage difference at its inputs and produces an appropriate driving voltage to the P-channel MOS pass transistor to control the amount of current reaching the output. If there are changes in the output voltage due to load changes, the feedback resistors register such changes to the non-inverting input of the error amplifier. The error amplifier then adjusts its driving voltage to maintain virtual short between its two input nodes under all loading conditions. In a nutshell, the regulation of the output voltage is achieved as a direct result of the error amplifier keeping its input voltages equal. This negative feedback control topology is further augmented by the shutdown, the fault detection, and the temperature and current protection circuitry. OUTPUT VOLTAGE CONTROL (Adjustable Version Only) The SEMP8965 allows direct user control of the output voltage in accordance with the amount of negative feedback present. To see the explicit relationship between the output voltage and the negative feedback, it is convenient to conceptualize the SEMP8965 as an ideal non-inverting operational amplifier with a fixed DC reference voltage VREF at its non-inverting input. Such a conceptual representation of the SEMP8965 in closed-loop configuration is shown in Figure 2. This ideal op amp features an ultra-high input resistance such that its inverting input voltage is virtually fixed at VREF. The output voltage is therefore given by: += 1 REF V OUT V This equation can be rewritten in the following form to facilitate the determination of the resistor values for a chosen output voltage: −= 1 1.19V OUTV 2R 1R Set R2 equal to 100kΩ to optimize for overall accuracy, power supply rejection, noise, and power consumption.

http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. the X7R capacitors are able to maintain their capacitance values to within ±20% and ±10%, respectively, as the temperature increases. exists between output noise level and turn-on time when selecting the CC capacitor value. Figure 2. Simplified Regulator Topology

Fast Ultra High-PSRR, Low Noise, Low-Dropout, 600 mA Micropower CMOS Linear Regulator 01-June-2002 Rev. A Page 11 of 11 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. POWER DISSIPATION AND THERMAL SHUTDOWN Thermal overload results from excessive power dissipation that causes the IC junction temperature to increase beyond a safe operating level. The SEMP8965 relies on dedicated thermal shutdown circuitry to limit its total power dissipation. An IC junction temperature TJ exceeding 165°C will trigger the thermal shutdown logic, turning off the P-channel MOS pass transistor. The pass transistor turns on again after the junction cools off by about 30°C. When continuous thermal overload conditions persist, this thermal shutdown action then results in a pulsed waveform at the output of the regulator. The concept of thermal resistance θJA (°C/W) is often used to describe an IC juncti on’s relative readiness in allowing its thermal energy to dissipate to its ambient air. An IC junction with a low thermal resistance is preferred because it is relatively effective in dissipating its thermal energy to its ambient, thus resulting in a relatively low and desirable junction temperature. The relationship between θJA and TJ is as follows: T J =θJA (PD) + TA TA is the ambient temperature, and PD is the power generated by the IC and can be written as: PD = IOUT (VIN - VOUT) As the above equations show, it is desirable to work with ICs whose θJA values are small such that TJ does not increase strongly with PD. To avoid thermally overloading the SEMP8965, refrain from exceeding the absolute maximum juncti on temperature rating of 150°C under cont inuous operating conditions. Overstressing the regulator with high lo ading currents and elevated input-to-output differential voltages can increase the IC die temperature significantly. FAULT DETECTION In the event of the occurrence of various fault conditions that cause failure in the output voltage regulation, such as during thermal overload or current limit, the FAULT pin of the SEMP8965 becomes low. Because the FAULT pin connects to the open-drain output of a N-channel MOS transistor, a large pull-up resistor (100kΩ typical) is required to provide the necessary output voltage and yet without compromising the overall power consumption performance of the regulator. The FAULT pin also goes low when the input-to-output differential voltage becomes too small to sustain good load and line regulation at the output. This occurs typically during near dropout when the input-to-output differential voltage is less than 110mV for a load current of 200mA. The SEMP8965 detects near dropout conditions by comparing the differential voltage against a predefined differential threshold that is always slightly above the dropout voltage. This differential threshold is dynamical in the sense that it not only tracks the dropout voltage as the load current varies, but also scale linearly with the load current. SHUTDOWN The SEMP8965 enters the sleep mode when the SHDN pin is low. When this occurs, the pass trans istor, the error amplifier, and the biasing circuits, including the bandgap reference, are turned off, thus reducing the supply current to typically 1nA. Such a low supply current makes the SEMP8965 best suited for battery-powered applications. The maximum guaranteed voltage at the SHDN pin for the sleep mode to take effect is 0.4V. A minimum guaranteed voltage of 1.2V at the SHDN pin will activate the SEMP8965. Direct connection of the SHDN pin to the VIN to keep the regulator on is allowed for the SEMP8965. In this case, the SHDN pin must not exceed the supply voltage VIN. FAST START-UP Fast start-up time is important for overall system efficiency improvement. The SEMP8965 assures fast start-up speed when using the optional noise bypass capacitor (CC). To shorten start-up time, the SEMP8965 internally supplies a 500µA current to charge up the capacitor until it reaches about 90% of its final value.