SED1526 EPSON | Alldatasheet

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SSC5000SeriesDot Matrix LCD Controller Driver PF776-03 SED1526/28 Series n DESCRIPTION The SED1526 series is a single-chip LCD driver for dot-matrix liquid crystal displays (LCD’s). It accepts serial or 8-bit parallel display data directly from a microprocessor and stores data in an on-chip display RAM. It can generate an LCD drive signal independent from microprocessor clock. As the SED1526 series features the very low power dissipation and wide operating voltage range, it can easily realize a powerful but compact display unit having a small battery. A single chip of SED1526 series can drive a 17×80-pixel or 33×64-pixel LCD panel. (Note:The SED1526 series are not designed to have EMI resistance.) n FEATURES l Direct data display using the display RAM. When RAM data bit is 0, it is not displayed; when 1, it is displayed. l Large 80×33-bit RAM capacity l On-chip LCD driver circuit (97 segment and common drivers) l High-speed, 8-bit microprocessor interface allowing direct connection to both the 8080 and 6800 l Supported serial interface l Rich command functions (upward compatible to SED1520 Series); they are Read/Write Display Data, Display On/Off Switching, Set Page Address, Set Initial Display Line, Set Column Address, Read Status, Static Drive On/Off Switching, Select Duty, Duty+1, Read-Modify-Write, Select Segment Driver Direction, Power Save, Reset, Set Power Control, Set Electronic Controls, Clock Stop. l On-chip CR oscillation circuit (OSC) l On-chip LCD power circuit (The internal and external LCD power supplies are software selectable.) l Very low power consumption l Flexible power voltages; 2.4 to 6.0 V (for logic) and -13.0 to -4.0V(V DD -V5) l –40 to +85°C wide operating temperature range l CMOS process l Package: QFP5-128pin (plastic), Die form (Al pad, Au bump) n LINE UP (Series specifications: ex. 128-pin flat package) l Ultra Low Power Consumption l Built-in Power Supply Circuit for LCD l 97 Driver Outputs Model Operating clock Duty Segment Common V REG CMOS (Internal OSC) driver driver type pin positions SED1526F 0A 20 KHz 1/8, 1/9, 1/16, 1/17 80 17 Tpye 1 Type A SED1526F AA 20 KHz 1/8, 1/9, 1/16, 1/17 80 17 Tpye 1 Type B SED1526F EA 20 KHz 1/8, 1/9, 1/16, 1/17 80 17 Tpye 2 Type A SED1528F 0A 20 KHz 1/32, 1/33 64 33 Type 1 Type A Type 1 V REG (Built-in power supply regulating voltage) Temperature gradient: 0.17%/°C Type 2 V REG (Built-in power supply regulating voltage) Temperature gradient: 0.00%/°C Refer to No. P3 (Package pin layout), No. P4 (PAD layout) and No. P5 (PAD coordinates). An SED1526 series package has one of following subcodes according to its package type (an example of SED1526): SED1526F 0A: QFP5-128pin flat package SED1526D 0 *: Bear chip SED1526D 0A having aluminium pad SED1526D 0B having gold bump SED1526T **: TCP

n BLOCK DIAGRAM (SED1526 COM0 COM15···· VDD VSS CAP1+ CAP1– CAP2+ CAP2– V R VOUT SR2 SR1 WR RD CS2 CS1 A0 D0 D1 D2 D3 D4 D5 D6 D7 FR CL M/S Voltage select circuit Segment driver Common driver Shift register Power circuit I/O buffer circuit 80x33-dot display data RAM Display data latch Line address decoder Line counter Initial display line register Page address register Column address decoder 7-bit column address counter 7-bit column address register Display timing generator circuit Bus holder Command decoder Status register Oscillator Microprocessor interface I/O buffer COMS COMS

SEG79 (COM 0) SEG78 (COM 1) SEG77 (COM 2) SEG76 (COM 3) SEG75 (COM 4) SEG74 (COM 5) SEG73 (COM 6) SEG72 (COM 7) SEG71 (COM 8) SEG70 (COM 9) SEG69 (COM10) SEG68 (COM11) SEG67 (COM12) SEG66 (COM13) SEG65 (COM14) SEG64 (COM15) SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 COM7 (COM23) COM8 (COM24) COM9 (COM25) COM10 (COM26) COM11 (COM27) COM12 (COM28) COM13 (COM29) COM14 (COM30) COM15 (COM31) COMS SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 COM6 (COM22) COM5 (COM21) COM4 (COM20) COM3 (COM19) COM2 (COM18) COM1 (COM17) COM0 (COM16) D D 6 D 5 D 4 D 3 D 2 D 1 D 0 CL FR CS1 CS2 RD WR SR1 SR2 W/S VSS CAP1+ CAP1- CAP2+ CAP2- VOUT V DD VR 103 110 120 128 6465 102 Index [COM15] [COM14] [COM13] [COM12] [COM11] [COM10] [COM 9] [COM 8] [COM 7] [COM 6] [COMS ] [COM 0] [COM 1] [COM 2] [COM 3] [COM 4] [COM 5]

  • Pin names in ( ) apply to SED1528. * Pin names in [ ] apply to SED1526DA * (CMOS pin = Type B). Aluminum pad chip
  • Chip size: 5.92 mm × 4.68 mm
  • Chip thickness: 0.4 mm
  • Pad opening: 90.2 µm × 90.2 µm
  • Pad pitch: 130 µm (Min) Gold bump chip (reference)
  • Chip size: 5.92 mm × 4.68 mm
  • Chip thickness: 0.4 mm
  • Bump size: 81.7 µm × 81.7 µm
  • Bump height: 22.5 µm X YSEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 (COM15) SEG65 (COM14) SEG66 (COM13) SEG67 (COM12) SEG68 (COM11) SEG69 (COM10) SEG70 (COM9) SEG71 (COM8) SEG72 (COM7) SEG73 (COM6) SEG74 (COM5) SEG75 (COM4) SEG76 (COM3) SEG77 (COM2) SEG78 (COM1) SEG79 (COM0) SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 COMS COM15 (COM31) COM14 (COM30) COM13 (COM29) COM12 (COM28) COM11 (COM27) COM10 (COM26) COM9 (COM25) COM8 (COM24) COM7 (COM23) COM6 (COM22) VR V DD VOUT CAP2- CAP2+ CAP1- CAP1+ V SS M/S SR2 SR1 WR RD CS2 CS1 FR CL COM0 (COM16) COM1 (COM17) COM2 (COM18) COM3 (COM19) COM4 (COM20) COM5 (COM21) 11 0 3 7 3020 38 6580 7090102 103 110 120 128 [COM15] [COM14] [COM13] [COM12] [COM11] [COM10] [COM 9] [COM 8] [COM 7] [COM 6] [COM 5] [COMS ] [COM 0] [COM 1] [COM 2] [COM 3] [COM 4]

Unit: µm * Pin names in ( ) apply to SED1528. * Pin names in [ ] apply to SED1526DA * (CMOS pin = Type B). PAD No. PIN Name X Y 1V 1 –2767 –2106 2V 2 –2637 3V 3 –2507 4V 4 –2377 5V 5 –2246 6V R –2116 –2149 7V DD –1985 –2176 8V OUT –1857

9 CAP2– –1727

10 CAP2+ –1522

11 CAP1– –1318

12 CAP1+ –1113

SS –553 –2166

14 M/S –356 –2185

15 SR2 –226

16 SR1 –95

17 WR 35

18 RD 165

19 CS2 295

20 CS1 425

21 A0 555

22 FR 719

23 CL 849

24 D0 979

25 D1 1109

26 D2 1239

27 D3 1369

28 D4 1500

29 D5 1630

30 D6 1760

31 D7 1890

32 COM0 (COM16) [CMOS ] 2069

33 COM1 (COM17) [COM0 ] 2199

34 COM2 (COM18) [COM1 ] 2329

35 COM3 (COM19) [COM2 ] 2459

36 COM4 (COM20) [COM3 ] 2589

37 COM5 (COM21) [COM4 ] 2719

38 COM6 (COM22) [COM5 ] 2802 –1654

39 COM7 (COM23) [COM6 ] –1524

40 COM8 (COM24) [COM7 ] –1393

41 COM9 (COM25) [COM8 ] –1263

42 COM10 (COM26) [COM9 ] –1133

43 COM11 (COM27) [COM10] –1003

44 COM12 (COM28) [COM11] –873

45 COM13 (COM29) [COM12] –743

46 COM14 (COM30) [COM13] –612

47 COM15 (COM31) [COM14] –482

48 COMS [COM15] –352

49 SEG0 –193

50 SEG1 –63

51 SEG2 67

52 SEG3 197

53 SEG4 327

54 SEG5 457

55 SEG6 588

56 SEG7 718

57 SEG8 848

58 SEG9 978

59 SEG10 1108

60 SEG11 1238

61 SEG12 1368

62 SEG13 1499

63 SEG14 1629

64 SEG15 1759

PAD No. PIN Name X Y

65 SEG16 2516 2185

66 SEG17 2367

67 SEG18 2218

68 SEG19 2088

69 SEG20 1957

70 SEG21 1827

71 SEG22 1697

72 SEG23 1567

73 SEG24 1437

74 SEG25 1307

75 SEG26 1177

76 SEG27 1046

77 SEG28 916

78 SEG29 786

79 SEG30 656

80 SEG31 526

81 SEG32 396

82 SEG33 266

83 SEG34 135

84 SEG35 5

85 SEG36 –125

86 SEG37 –255

87 SEG38 –385

88 SEG39 –515

89 SEG40 –646

90 SEG41 –776

91 SEG42 –906

92 SEG43 –1036

93 SEG44 –1166

94 SEG45 –1296

95 SEG46 –1426

96 SEG47 –1557

97 SEG48 –1687

98 SEG49 –1817

99 SEG50 –1947

100 SEG51 –2077

101 SEG52 –2226

102 SEG53 –2375

103 SEG54 –2802 1932

104 SEG55 1802

105 SEG56 1672

106 SEG57 1541

107 SEG58 1411

108 SEG59 1281

109 SEG60 1151

110 SEG61 1021

111 SEG62 891

112 SEG63 760

113 SEG64 (COM15) 599

114 SEG65 (COM14) 469

115 SEG66 (COM13) 339

116 SEG67 (COM12) 209

117 SEG68 (COM11) 78

118 SEG69 (COM10) –52

119 SEG70 (COM9) –182

120 SEG71 (COM8) –312

121 SEG72 (COM7) –442

122 SEG73 (COM6) –572

123 SEG74 (COM5) –703

124 SEG75 (COM4) –833

125 SEG76 (COM3) –963

126 SEG77 (COM2) –1093

127 SEG78 (COM1) –1223

128 SEG79 (COM0) –1353

n ABSOLUTE MAXIMUM RATINGS Notes: 1. V1 to V5, VOUT , and VREG voltages are based on VDD =0 V. 2. Voltages VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 must always be satisfied. 3. If an LSI exceeds its absolute maximum rating, it may be damaged permanently. It is desirable to use it under electrical characteristics conditions during general operation. Otherwise, an LSI malfunction or reduced LSI reliability may result. 4. The moisture resistance of the flat package may drop during soldering. Take care not to excessively heat the package resin during chip mounting. VCC GND VDD VSS V1-V5, VOUT ,VREG Rating Symbol Value Unit Supply voltage range VDD –0.3 to +7.0 V VDD –0.3 to +6.0 Driver supply voltage range (1) V 5 –18.0 to +0.3 V Driver supply voltage range (2) V 1, V2, V3, V4 V5 to +0.3 V Input voltage range V IN –0.3 to VDD +0.3 V Output voltage range V 0 –0.3 to VDD +0.3 V Allowable loss P D 250 mW Operating temperature range T OPR –40 to +85 °C Storage temperature range QFP • TCP TSTG –65 to +150 Bear chip –55 to +125 Soldering temperature and time T SOLDER 260/10 (at leads) °C/sec (Microprocessor side)(SED1526 series side) Triple voltage conversion

(VDD = 5 V ±10%, VSS = 0 V, Ta = –40 to +85°C unless otherwise noted.) Item Symbol Condition Min. Typ. Max. Unit Pin used Power voltage (1) Operational VDD 2.4 6.0 V V DD *1 Operating voltage Operational V 5 –13.0 –4.0 V V 5 *2 (2) Operational V 1, V2 0.6 × V5 VDD VV 1, V2 Operational V3, V4 V5 0.4 × V5 VV 3, V4 High-level input voltage V IHC 0.7 × VDD VDD V* 3 VDD = 2.7 V 0.8 × VDD VDD Low-level input voltage V ILC VSS 0.3 × VDD V* 3 VDD = 2.7 V V SS 0.2 × VDD High-level output voltage V OHC IOH = –1 mA 0.8 × VDD VDD V* 4 VDD = 2.7 V, IOH = –0.5 mA0.8 × VDD VDD Low-level output voltage V OLC IOH = 1 mA V SS 0.2 × VDD V* 4 VDD = 2.7 V, IOL = 0.5 mA V SS 0.2 × VDD High-level input voltage V IHS 0.4 × VDD 0.8 × VDD V* 5 VDD = 2.7 V 0.4 × VDD 0.8 × VDD Low-level input voltage V ILS 0.2 × VDD 0.6 × VDD V* 5 VDD = 2.7 V 0.2 × VDD 0.6 × VDD Input leakage current I LI –1.0 1.0 µA* 6 Output leakage current I LO –3.0 3.0 µA* 7 LCD driver ON resistance R ON Ta = 25°CV 5 = –0.5 V 15.0 30.0 K Ω Static current consumption I DDQ CS = CL = VDD 0.05 3.0 µAV DD Input pin capacity C IN Ta = 25°C, f = 1 MHz 5.0 8.0 pF Input pins CL output frequency fCL Ta = 25°C, VDD = 2.7 to 5 V2.4 2.9 3.7 kHz *8 n ELECTRICAL CHARACTERISTICS l DC Characteristics SEG0 to 79 COS0 to 15 COMS *9 l Dynamic current consumption (1) when the built-in power supply is OFFCMOSSchmitt (Ta = 25°C) Item Symbol Conditions Min. Typ. Max. Unit Remarks SED1526 I DD (1) V DD = 5.0V, V5–VDD = –6.0V – 9.1 18 µA *12 VDD = 3.0V, V5–VDD = –6.0V – 12.0 24 SED1528 V DD = 5.0V, V5–VDD = –8.0V – 7.5 15 VDD = 3.0V, V5–VDD = –8.0V – 9.5 19

Item Symbol Conditions Min. Typ. Max. Unit Remarks Power save I DDS1 SED1526, SED1528 — 3 6 µA— mode Ta = 25°C Item Symbol Conditions Min. Typ. Max. Unit Remarks SED1526 I DD (2) V DD = 5.0V, V5–VDD = –6.0V, dual boosting – 28 56 µA *13 VDD = 3.0V, V5–VDD = –6.0V, triple boosting – 52 104 SED1528 V DD = 5.0V, V5–VDD = –8.0V, dual boosting – 29 58 VDD = 3.0V, V5–VDD = –8.0V, triple boosting – 48 96 l Dynamic current consumption (2) when the built-in power supply is ON Ta = 25°C l Typical current consumption characteristics (reference data)

  • Dynamic current consumption (1) when LCD external power mode lamp is ON
  • Dynamic current consumption (2) when the LCD built-in power supply lamp is ON l Current consumption during Power Save mode VSS = 0 V, VDD = 2.7 to 5.5 V (µA) I DD (1) 1234 VDD 5 6 7 (V) Conditions: Remarks: The built-in power supply is OFF and an external power supply is used. SED1526 V5 -V DD = –6.0V SED1528 V5 -VDD = –8.0V *12 SED1527, SED1528 SED1526 (µA) I DD (2) 1234 VDD 5 6 7 (V) Conditions: Remarks: The built-in power supply is ON. SED1526 V5 -VDD = –6.0V dual boosting SED1528 V5 -VDD = –8.0V triple boosting *13 SED1526 SED1528

Item Symbol Conditions Min. Typ. Max. Unit Pins used Input voltage V DD — 2.4 — 6.0 V *10 Booster output voltage VOUT VDD reference (during triple boosting) –16.5 — — V V OUT Voltage regulator circuit VOUT VDD reference –16.5 — –4.0 V V OUT operating voltage Voltage follower operating V5 VDD reference –13.0 — –4.0 V *11 voltage Reference voltage V REG VDD reference Ta = 25°C –3.5 –3.1 –2.7 V V R * See notes below.

  • Current consumption IDD during access (2) during MPU access cycle *1 Although the wide range of operating voltage is guaranteed, a spike voltage change during access to the MPU is not guaranteed. *2 The operating voltage range of the VDD and V5 systems (See Figure 9.) The operating voltage range is applied if an external power supply is used. *3 Pins D0 to D5, A0, CS1, CS2, RD (E), WR (R/W), M/S, CL, and FR *4 Pins D0 to D7, FR, and CL *5 Pins SI (D7), SCL (D6), SR1, and SR2 *6 Pins A0, RD (E), WR (R/W), CS1, CS2, M/S, SR1, and SR2 *7 Applied if pins D0 to D7, FR, and CL are high impedance. *8 For the relationship between CL output frequency and frames, see Figure 7. For the relationship between CL output frequency and power voltage, see Figure 8. For the relationship between CL output frequency and temperature, see Figure 11. *9 The resistance when the 0.1-volt voltage is applied between the SEG and COM output terminals and each power terminal (V 1, V2, V3 or V4). It must be within operating voltage (2). RON = 0.1 V/ΔI where, ΔI is the current that flows between power supply and SEG or COM terminal when the 0.1-volt voltage is applied. *10 If the triple voltage by the built-in power circuit are used the VDD primary power must be used within the input voltage range. *11 The V 5 voltage can be adjusted within the voltage follower operating range by use of voltage regulator. *12 Applied if the built-in oscillation circuit is used and if not accessed by the MPU. *13 Applied if the built-in oscillation circuit and the built-in power circuit are used, and if not accessed by the MPU. The current flowing through the voltage regulator resistors (R1, R2 and R3) is not included. When the built-in voltage booster is used, the current consumption for the V DD power supply is shown. Built-in power circuit 0.1 0.01 0 0.01 0.1 1 10 (mA) IDD (2) fCYC (MHz) SED1526 SED1528 Conditions: It shows the current consumption when a checker pattern is always written in fSYNC timing. When not accessed, only the current consumption of I DD (2) occurs. SED1526 V5 -VDD = –6.0V, dual boosting SED1528 V5 -V DD = –8.0V, triple boosting Ta = 25°C

l TPC shape SED1526T 0A (Reference drawing) This dimensional outline drawing is subject to change for improvements without prior notice. Output terminal pattern shape (Marking area) (Marking area) (Mold area) Specifications

  • Base: U-rexS, 75µm
  • Copper foil: Electrolytic copper foil, 35µm
  • Sn plating
  • Product pitch: 91P (42.75mm)
  • Solder resist positional tolerance: –0.3 (Mold area) IC center

The package dimensions are subject to change without notice. Unit : mm Plastic QFP5–128pin 20±0.1 23.6±0.4 65102 14±0.1 17.6±0.4 INDEX 0.2±0.1 381 128 1032.7±0.1 0.15±0.05 0.1 3max 1.8 0.8±0.2 10° 0.15±0.05 0.5 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Morever, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. IBM is registered trademark of International Business Machines Corporation, U.S.A. © Seiko Epson Corporation 1996 All right reserved. ELECTRONIC DEVICE MARKETING DEPARTMENT IC Marketing & Engineering Group 421-8 Hino, Hino-shi, Tokyo 191, JAPAN Phone: 0425-87-5816 FAX: 0425-87-5624 International Marketing Department I (Europe, U.S.A.) 421-8 Hino, Hino-shi, Tokyo 191, JAPAN Phone: 0425-87-5812 FAX: 0425-87-5564 International Marketing Department II (Asia) 421-8 Hino, Hino-shi, Tokyo 191, JAPAN First issue Dec., 1996 Phone: 0425-87-5814 FAX: 0425-87-5110 Printed Nov. 1996 in Japan H