SDA2717E SHOUDING | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

Wide Input Voltage Range: 8.0V The SDA2717E converters are available in the to 30V, the SDA2717E achi The SDA2717E requires a minimum number of The SDA2717E is a synchronous step down SDA2717E WWiiddee RRaannggee SSyynncchhrroonnoouuss BBuucckk CCoonnttrroolllleerr FFeeaattuurreess  ~ 30V  Up to 93% Efficiency  Programmable Switching Frequency up to up to 500kHz  No Loop Compensation Required  Programmable Current Limit  Cable Compensation from 0 Ω to 0.3Ω  Thermal Shutdown  Available in SOP8-PP Package DDeessccrriippttiioonn regulator from a high voltage input supply. Operating with an input voltage range from 8V eves 2A continuous output current with excellent load and line regulation. The switching frequency is programmable from 100kHz to 500 kHz and the synchronous architecture provides for highly efficient designs. Current mode operation provides fast transient response and eases loop stabilization. readily available standard external components. Other features include cable compensation, programmable current limit and thermal shutdown. industry standard SOP8-PP packages. AApppplliiccaattiioonnss  Car Charger / Adaptor  Pre-Regulator for Linear Regulators  Distributed Power Systems  Batter y Char g e r www.shouding.net ver.1 PPiinn AAssssiiggnnmmeenntt aanndd DDeessccrriippttiioonn TOP VIEW SOP8-PP(Exposed Pad) *The exposed pad must be soldered to a large PCB. PIN NAME

DESCRIPTION

1 FB Feedback

2 ILIM Current Limit

3 EN ON/OFF (High Enable)

4 VIN Input Supply Voltage

5,8 GND Ground 6,9 SW Switch Node

7 RT Frequency Setting

The SDA2717E is guaranteed to meet TTyyppiiccaall AApppplliiccaattiioonn CCiirrccuuiitt * The output voltage is set by R2 and R3: V OUT AAbbssoolluuttee MMaaxxiimmuumm RRaattiinnggss ((NNoottee 11)) ~ 35V ~ +85 ℃ ~ +150 ℃ Note 1: Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: performance specifications from 0℃ to 70℃. Specifications over the –40℃ to 85 ℃ operating temperature range are assur ed by design, characterization and correlation with statistical process controls. SDA2717E SDA2717E www.shouding.net ver.1

EElleeccttrriiccaall CChhaarraacctteerriissttiiccss Operating Conditions: TA=25 , V℃ IN =12V, R2=470k, R3=150k, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IN Operating Voltage Range 8 30 V I Q Quiescent Current I LOAD = 0A 750 850 μA I OFF Shutdown Current V EN = 0V 110 150 μA V UVLO Input UVLO Threshold 4.25 4.5 V ΔV UVLO UVLO Hysteresis 50 100 mV V FB Regulated Voltage 1.188 1.21 1.236 V I FB Feedback Pin Input Current 0.05 μA f OSC Oscillator Frequency range 100 500 kHz R T =100k 180 220 260 kHz DC Max Duty Cycle 100 % I LIM-TH Current Limit Sense Pin Source Current 7 8.5 10 μA V ENH EN Threshold (High) 2 V V ENL EN Threshold (Low) 0.6 V I EN EN bias current V EN =1V 0.2 1 μA R DSP(ON) R DS(ON) of P-Channel FET 65 m Ω R DSN(ON) R DS(ON) of N-Channel FET 28 m Ω T SD Thermal Shutdown Temperature Rising 150 ℃ ΔT SD Thermal Shutdown Hysteresis 30 ℃ www.shouding.net ver.1

TTyyppiiccaall PPeerrffoorrmmaannccee CChhaarraacctteerriissttiiccss Operating Conditions: TA=25℃, C IN =47μF, C OUT =100μF, L=22μH, unless otherwise noted. 20% 40% 60% 80% 100% 00 . 511 . 522 . 5 Efficiency Load Current A Efficiency vs Load Current (VOUT=5V) 3.5 4.5 5.5 0 0.5 1 1.5 2 2.5 VOUT(V) Load Current A Output Voltage vs Load Current 012345 CC Currnet (A) Output Voltage(V) CC Current vs Output Voltage LIM =68K) 012345 CC Currnet (A) Output Voltage(V) CC Current vs Output Voltage LIM =47K) V IN =12V V IN =6V V IN =24V 400 800 1200 1600 2000 0 8 16 24 32 40 Standby supply current(uA) In p ut Volta g e V Standby Current vs Input Voltage (EN=0V) 400 600 800 1000 1200 6 1 21 82 43 0 Quiescent current(uA) Input Voltage (V) Quiescent Current vs I nput Voltage (EN=1V, VOUT=5V) www.shouding.net ver.1

Main Supply Pin. The SDA2717E\` operates from PPiinn FFuunnccttiioonnss FB (Pin 1): Feedback Pin. Receive the feedback voltage from an external resistive divider across the output. In the adjustable version, the output voltage is fixed. The Output voltage is set by R2 and R3: V OUT ILIM (Pin 2): Monitors current through the low-side switch and triggers current limit operation if the inductor valley current exceeds a us er defined value that is set by R LIM and the Sense current sourced out of this pin during operation. EN (Pin 3): En Control Input. Forcing this pin above 2V enables the part. Forcing this pin below 0.6V can shuts down the device. Do not leave EN floating. VIN (Pin 4): a 8V to 30V unregulated input. It must be closely decoupled to GND, with a 47 μF or greater ceramic capacitor to prevent large voltage spikes from appearing at the input. GND (Pin 5, 8): Ground Pin. SW (Pin 6, 9): Switch Node Connection to Inductor. RT (Pin 7): The internal oscillator is set with a single resistor between this pin and the GND pin. BBlloocckk DDiiaaggrraamm www.shouding.net ver.1

The SDA2717E oscillator frequency is Continuously running the SDA2717E The total power dissipation in SDA2717E is limited The SDA2717E operates by a AApppplliiccaattiioonn IInnffoorrmmaattiioonn constant frequency, current mode arch itecture. The output voltage is set by an external divider returned to the FB pin. An error amplifier compares the divided output voltage with a reference voltage of 1.21V and adjusts the peak inductor current accordingly. During normal operation, the internal P-channel MO SFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, resets the RS latch. While the P-channel MOSFET is off, the N-channel MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator or the beginning of the next clock cycle. Thermal Protection by a thermal protection circuit. When the device temperature rises to approximately 150 ℃, this circuit turns off the out put, allowing the IC to cool. The thermal protection circuit can protect the device from being damaged by overheating in the event of fault conditions. into thermal shutdown degrades device reliability. Current Limit Current limit detection occurs during the off-time by monitoring the cu rrent through the low-side switch using an external resistor, R LIM . The current limit value is defined by R LIM . If during the off-time the current in the low-side switch exc eeds the user defined curr ent limit value, the next on-time cycle is immediately terminated. Current sensing is achieved by comparing the voltage across the low side FET with the voltage across the current limit set resistor R LIM . For example, the current limit value is 2.5A by the R LIM =62k. The current limit value rises when the set resistor R LIM rises. The maximum output current is set by R LIM : R LIM (kΩ) = 24• I MAX (A). Oscillator Frequency set by a single external resistor connected between the RT pin and the GND pin. The resistor should be located very close to the device and connected directly to the pins of the IC (RT and GND). An internal amplifier hold s the RT pin at a fixed voltage typically 0.6V. The oscillator frequency rises when the resistor R T falls. To determine the timing resistance for a given switching frequency, use the equation below: R T (kΩ)= 22000 /f OSC (kHz) Setting Output Voltage The output voltage is set with a resistor divider from the output node to the FB pin. It is recommended to use divider resistors with 1% tolerance or better. To improve efficiency at very light loads consider using larger value resistors. If the values are too high the regulator is more susceptible to noise and voltage errors from the FB input current are noticeable. For most applic ations, a resistor in the 10k Ω to 1M Ω range is suggested for R3. R2 is then given by: R2 = R3 • [(V OUT / V REF ) – 1] where V REF is 1.21V. www.shouding.net ver.1

simple, user-programmable cable voltage drop co mpensation using the im pedance at the FB pin. Choose the proper feedback resistance values for c able compensation refer to the curve in Figure 1. Figure 1. Delta Output Voltage vs Load Current also increases the ripple current as shown in equation. applications (2A + 400mA). For better efficiency, choose a low DC-resistance inductor. energy, but generally cost more than powdered iron core inductors with similar electrical characteristics.

Output and Input Capacitor Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle V OUT IN . To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: This formula has a maximum at V IN = 2V OUT , where I RMS = I OUT /2. This simple wors t-case condition is commonly used for design because even significant dev iations do not offer much relief. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the c apacitor, or choose a capacitor ra ted at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of C OUT is driven by the required effective se ries resistance (ESR).Typically, once the ESR requirement for C OUT has been met, the RMS current rati ng generally far exceeds the I RIPPLE(P-P) requirement. The output ripple ΔV OUT is determined by: Where f = operating frequency, C OUT = output capacitance and ΔI L = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔI L increases with input voltage. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surf ace mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1+ dissipative elements in the circuit produce losses, tw o main sources usually account for most of the losses: VIN quiescent current and I R losses. The VIN quiescent curr ent loss dominates the efficiency loss at very low load currents whereas the I R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficienc y curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capa citance of the internal power MOSFET switches. Each time the gate is switched from hi gh to low to high again, a packet of charge Q moves from VIN to ground. The resulting △Q/△t is the current out of VIN that is typically larger than the DC bias current. www.shouding.net ver.1

operation of the SDA2717E. Check In continuous mode, I GATECHG = f (Q T B ) where Q T and Q B are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I R losses are calculated from the resistances of the internal switches, R SW and external inductor R L In continuous mode the average out put current flowing through i nductor L is “chopped” between the main switch and the synchronous sw itch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET R DS(ON) and the duty cycle (DC) as follows: R SW = R DS(ON)TOP x DC + R DS(ON)BOT x (1-DC) The R DS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characterist ics curves. Thus, to obtain I R losses, simply add R SW to R L and multiply the result by the square of the average output current. Other losses including C IN and C OUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Board Layout Suggestions When laying out the printed circ uit board, the following checklist should be used to ensure proper the following in your layout. 1. The power traces, consisting of the GND trace, the SW trac e and the VIN trace should be kept short, direct and wide. 2. Put the input capacitor as close as possible to the device pins (VIN and GND). 3. SW node is with high frequency voltage sw ing and should be kept small area. Keep analog components away from SW node to prevent stray capacitive noise pick-up. 4. Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. www.shouding.net ver.1

PPaacckkaaggiinngg IInnffoorrmmaattiioonn SOP8-PP (EXP PAD) Package Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 1.350 1.750 0.053 0.069 A1 0.050 0.150 0.004 0.010 A2 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 c 0.170 0.250 0.006 0.010 D 4.700 5.100 0.185 0.200 D1 3.202 3.402 0.126 0.134 E 3.800 4.000 0.150 0.157 E1 5.800 6.200 0.228 0.244 E2 2.313 2.513 0.091 0.099 e 1.270(BSC) 0.050(BSC) L 0.400 1.270 0.016 0.050 θ 0° 8° 0° 8° www.shouding.net ver.1