SD53-6R8-R

ADP2300 AD | Alldatasheet

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1.2 A, 20 V, 700 kHz/1.4 MHz, Nonsynchronous Step-Down Regulator ADP2300/ADP2301 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved.

FEATURES

1.2 A maximum load current

±2% output accuracy over temperature range Wide input voltage range: 3.0 V to 20 V 700 kHz (ADP2300) or 1.4 MHz (ADP2301) switching frequency options High efficiency up to 91% Current-mode control architecture Output voltage from 0.8 V to 0.85 × V IN Automatic PFM/PWM mode switching Precision enable pin with hysteresis Integrated high-side MOSFET Integrated bootstrap diode Internal compensation and soft start Minimum external components Undervoltage lockout (UVLO) Overcurrent protection (OCP) and thermal shutdown (TSD) ADIsimPower™ online design tool Available in ultrasmall, 6-lead TSOT package

APPLICATIONS

LDO replacement for digital load applications Intermediate power rail conversion Communications and networking Industrial and instrumentation Healthcare and medical Consumer TYPICAL APPLICATIONS CIRCUIT 3.0V TO 20V VIN BST SW FB VOUT ENON OFF GND ADP2300/ ADP2301 08342-001 Figure 1. 100 EFFICIENCY (%) IOUT (A) VIN = 12V VOUT = 5.0V fSW = 1.4MHz fSW = 700kHz 08342-069 Figure 2. Efficiency vs. Output Current input by using a resistive divider. and are rated for the −40°C to +125°C junction temperature range.

Rev. 0 | Page 2 of 28 TABLE OF CONTENTS

REVISION HISTORY

2/10—Revision 0: Initial Version

Rev. 0 | Page 3 of 28 SPECIFICATIONS VIN = 3.3 V , TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. Table 1. Parameter Symbol Test Conditions Min Typ Max Unit VIN Voltage Range VIN 3 20 V Supply Current IVIN No switching, V IN = 12 V 640 800 μA Shutdown Current ISHDN V EN = 0 V, VIN = 12 V 18 35 μA Undervoltage Lockout Threshold UVLO VIN rising 2.80 2.95 V VIN falling 2.15 2.40 V FB Regulation Voltage VFB T J = 0°C to +125°C 0.788 0.800 0.812 V TJ = −40°C to +125°C 0.784 0.800 0.816 V Bias Current IFB 0.01 0.1 μA SW On Resistance1 V BST − VSW = 5 V, ISW = 150 mA 440 700 mΩ Peak Current Limit2 V BST − VSW = 5 V, VIN = 12 V 1.5 1.9 2.5 A Minimum On Time 100 135 ns Minimum Off Time ADP2300 145 190 ns ADP2301 70 120 ns OSCILLATOR FREQUENCY ADP2300 0.5 0.7 0.9 MHz ADP2301 1.0 1.4 1.75 MHz SOFT START TIME ADP2300 1460 μs ADP2301 730 μs EN Input Threshold VEN 1.13 1.2 1.27 V Input Hysteresis 100 mV Pull-Down Current 1.2 μA BOOTSTRAP VOLTAGE VBOOT No switching, V IN = 12 V 5.0 V THERMAL SHUTDOWN Threshold 140 °C Hysteresis 15 °C 1 Pin-to-pin measurements. 2 Guaranteed by design.

soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance1 1 θJA and θJC are measured using natural convection on a JEDEC 4-layer board.

Figure 3. Pin Configuration Table 4. Pin Function Descriptions to form a floating supply to drive the gate of the MOSFET switch above the VIN supply voltage. 2 GND Ground. Connect this pin to the ground plane. also be used as a programmable UVLO input. This pin has a 1.2 μA pull-down current to GND. 5 VIN Power Input. Connect to the input power source with a ceramic bypass capacitor to GND directly from this pin. 6 SW Switch Node Output. Connect an inductor to VOUT and a catch diode to GND from this pin.

Figure 40. ADP2300 Bode Plot, VOUT = 3.3 V, VIN = 12 V

Figure 41. ADP2300/ADP2301 Functional Block Diagram

Rev. 0 | Page 14 of 28 THEORY OF OPERATION The ADP2300/ADP2301 are nonsynchronous, step-down dc-to-dc regulators, each with an integrated high-side power MOSFET. A high switching frequency and ultrasmall, 6-lead TSOT package allow small step-down dc-to-dc regulator solutions. The ADP2300/ADP2301 can operate with an input voltage from 3.0 V to 20 V while regulating an output voltage down to 0.8 V . The ADP2300/ADP2301 are available in two fixed-frequency options: 700 kHz (ADP2300) and 1.4 MHz (ADP2301). BASIC OPERATION The ADP2300/ADP2301 use the fixed-frequency, peak current- mode PWM control architecture at medium to high loads, but shift to a pulse-skip mode control scheme at light loads to reduce the switching power losses and improve efficiency. When the devices operate in fixed-frequency PWM mode, output regulation is achieved by controlling the duty cycle of the integrated MOSFET. When the devices operate in pulse-skip mode at light loads, the output voltage is controlled in a hysteretic manner with higher output ripple. In this mode of operation, the regulator periodically stops switching for a few cycles, thus keeping the conversion losses minimal to improve efficiency. PWM MODE In PWM mode, the ADP2300/ADP2301 operate at a fixed frequency, set by an internal oscillator. At the start of each oscillator cycle, the MOSFET switch is turned on, sending a positive voltage across the inductor. The inductor current increases until the current-sense signal crosses the peak inductor current threshold that turns off the MOSFET switch; this threshold is set by the error amplifier output. During the MOSFET off time, the inductor current declines through the external diode until the next oscillator clock pulse starts a new cycle. The ADP2300/ADP2301 regulate the output voltage by adjusting the peak inductor current threshold. POWER SAVING MODE To achieve higher efficiency, the ADP2300/ADP2301 smoothly transition to the pulse-skip mode when the output load decreases below the pulse-skip current threshold. When the output voltage dips below regulation, the ADP2300/ADP2301 enter PWM mode for a few oscillator cycles until the voltage increases to within regulation. During the idle time between bursts, the MOSFET switch is turned off, and the output capacitor supplies all the output current. Since the pulse-skip mode comparator monitors the internal compensation node, which represents the peak inductor current information, the average pulse-skip load current threshold depends on the input voltage (V IN), the output voltage (VOUT), the inductor, and the output capacitor. Because the output voltage occasionally dips below regulation and then recovers, the output voltage ripple in the power saving mode is larger than the ripple in the PWM mode of operation. BOOTSTRAP CIRCUITRY The ADP2300/ADP2301 each have an integrated boot regulator, which requires that a 0.1 μF ceramic capacitor (X5R or X7R) be placed between the BST and SW pins to provide the gate drive voltage for the high-side MOSFET. There must be at least a 1.2 V difference between the BST and SW pins to turn on the high-side MOSFET. This voltage should not exceed 5.5 V in case the BST pin is supplied with an external voltage source through a diode. The ADP2300/ADP2301 generate a typical 5.0 V bootstrap voltage for a gate drive circuit by differentially sensing and regulating the voltage between the BST and SW pins. A diode integrated on the chip blocks the reverse voltage between the VIN and BST pins when the MOSFET switch is turned on. PRECISION ENABLE The ADP2300/ADP2301 feature a precision enable circuit that has a 1.2 V reference voltage with 100 mV hysteresis. When the voltage at the EN pin is greater than 1.2 V , the part is enabled. If the EN voltage falls below 1.1 V , the chip is disabled. The precision enable threshold voltage allows the ADP2300/ADP2301 to be easily sequenced from other input/output supplies. It can also be used as programmable UVLO input by using a resistive divider. An internal 1.2 μA pull-down current prevents errors if the EN pin is floating. INTEGRATED SOFT START The ADP2300/ADP2301 include internal soft start circuitry that ramps the output voltage in a controlled manner during startup, thereby limiting the inrush current. The soft start time is typically fixed at 1460 μs for the ADP2300 and at 730 μs for the ADP2301. CURRENT LIMIT The ADP2300/ADP2301 include current-limit protection circuitry to limit the amount of positive current flowing through the high- side MOSFET switch. The positive current limit on the power switch limits the amount of current that can flow from the input to the output.

output current runaway when there is a hard short on the output. Table 5. Correlation Between the Switching Frequency possible overshoot on the output voltage. period is initiated, and the part is enabled. from thermal shutdown, a soft start is initiated.

RFB1 is the feedback resistor from VOUT to FB. RFB2 is the feedback resistor from FB to GND. Figure 42. Programming the Output Voltage Using a Resistive Voltage Divider Table 6. Suggested Values for Resistive Voltage Divider off time, and the bootstrap dropout voltage. VIN(max) is the maximum input voltage. fSW(max) is the maximum switching frequency for the worst case. tMIN-ON is the minimum controllable on time. VD is the diode forward drop. VIN(min) is the minimum input voltage. fSW(max) is the maximum switching frequency for the worst case. VD is the diode forward drop. tMIN-OFF is the minimum controllable off time. voltage for the desired output due to internal dropout voltage. for the 3.3 V output voltage.

values between 2 μH and 22 μH for ADP2300. shorted output, over the intended temperature range. fSW is the switching frequency. VD is the diode forward drop. recommended inductors are shown in Table 7. where ILOAD(max) is the maximum load current. Table 7. Recommended Inductors

of the regulator as well as the output load current. where VD is the diode forward drop. well within the thermal and electrical limits. a list of recommended Schottky diodes. Table 8. Recommended Schottky Diodes dielectrics due to its low ESR and small temperature coefficients. A capacitance of 10 μF should be adequate for most applications. the VIN pin of the ADP2300/ADP2301 as possible. caused by charging and discharging the output capacitor. each with different behavior over temperature and applied voltage. temperature and dc bias characteristics. Table 9. Recommended Capacitors for VOUT ≤ 5.0 V

Rev. 0 | Page 20 of 28 THERMAL CONSIDERATIONS The ADP2300/ADP2301 store the value of the inductor current only during the on time of the internal MOSFET. Therefore, a small amount of power is dissipated inside the ADP2300/ADP2301 package, which reduces thermal constraints. However, when the application is operating under maximum load with high ambient temperature and high duty cycle, the heat dissipated within the package may cause the junction temperature of the die to exceed the maximum junction temperature of 125°C. If the junction temperature exceeds 140°C, the regulator goes into thermal shutdown and recovers when the junction temperature drops below 125°C. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as indicated in the following equation: T J = TA + TR where: TJ is the junction temperature. TA is the ambient temperature. TR is the rise in temperature of the package due to power dissipation. The rise in temperature of the package is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: T R = θJA × PD where: T R is the rise in temperature of the package. θJA is the thermal resistance from the junction of the die to the ambient temperature of the package. P D is the power dissipation in the package.

ponents, based on the example specifications listed in Table 10. The schematic for this design example is shown in Figure 48. Table 10. Step-Down DC-to-DC Regulator Requirements time, the minimum off time, and the bootstrap dropout voltage). bigger inductor and output capacitors. Therefore, IDIODE(AVG) = 0.85 A. would result in more reliable operation. therefore, ΔIRIPPLE = 0.394 A. Therefore, the calculated peak current for the inductor is 1.397 A. for at least a 2.0 A saturation current for reliable operation. If the ESR of the ceramic capacitor is 3 mΩ, then COUT = 1.2 μF .

resistive voltage divider for the programmable VIN start-up voltage. the recommended values in Table 11. REN1, which in this case is 56 kΩ. Figure 48. Schematic for the Design Example Table 11. Recommended External Components for Typical Applications at 1.2 A Output Load

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

2.90 BSC

0.95 BSC

0.10 MAX

Figure 59. 6-Lead Thin Small Outline Transistor Package [TSOT]

Rev. 0 | Page 27 of 28 NOTES

Rev. 0 | Page 28 of 28 ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D08342-0-2/10(0) NOTES