NCP1423_V01 ONSEMI | Alldatasheet
Document overview
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- PDF pages: 16
Technical content
Features
- High Efficiency: 92% for 3.3 V Output@ 400 mA from 2.5 V Input 87% for 1.8 V Output@ 70 mA from 1.2 V Input
- High Switching Frequency, up to 600 kHz (not hitting current limit)
- Low Quiescent Current of 9.0 /C0109A
- Low Battery Detector
- 0.8 V Startup
- External Adjustable Output V oltage
- ±1.5% Output V oltage Accuracy
- Ring−Killer for Discontinuous Conduction Mode
- Thermal Shutdown
- 1.2 A Cycle−by−Cycle Current Limit
- Output Current up to 400 mA @ VOUT = 3.3 V , 200 mA @ VOUT = 1.8 V
- Overvoltage Protection
- Low Profile and Minimum External Part
- Open Drain Low−Battery Detector Output
- Compact Micro10 Package
- SCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
- These Devices are Pb−Free and are RoHS Compliant Typical Applications
- Wireless Optical Mouse
- Wireless Headsets
- Internet Audio Players
- Personal Digital Assistants (PDAs)
- Hand−held Instruments
- Conversion from one/two NiMH or NiCd cells to 1.8 V / 3.3 V PIN CONNECTIONS Device Package Shipping †
ORDERING INFORMATION
(Pb−Free)
4000 Tape & Reel
http://onsemi.com MARKING DIAGRAM XXX = DAR (NCP1423) = GEN (SCV1423) A = Assembly Location Y = Year W = Work Week /C0071 = Pb−Free Package (Top View) Micro10 DM SUFFIX CASE 846B EN LBO REF FB OUT LBI ADEN BAT GND LX Micro10 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. XXX AYW/C0071 /C0071 SCV1423DMR2G Micro10 (Pb−Free) (Note: Microdot may be in either location)
Figure 1. Typical Operation Circuit bypassing capacitor, this pin can be loaded up to 2.5 mA @ VOUT = 3.3 V.
3 FB Output Voltage Feedback Input
4 GND Ground
6 BAT Battery supply input pin and connection for internal Ring−Killer
7 LX N−Channel and P−Channel Power MOSFET Drain
8 ADEN Auto Discharge Input
9 LBI Low−Battery Detector Input
10 LBO Open−Drain Low−Battery Detector Output. Output is Low when VLBI is < 500 mV. should not be assumed, damage may occur and reliability may be affected. NOTE: ESD data available upon request.
- This device contains ESD protection and exceeds the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114. Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115.
- The maximum package power dissipation limit must not be exceeded.
- Latchup Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.
- Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J −STD−020A.
- Measured on approximately 1 in sq of 1 oz Cu.
NCP1423, SCV1423 http://onsemi.com
ELECTRICAL CHARACTERISTICS
(VOUT = 3.3 V, TA = 25°C for typical value, −40°C /C0118 TA /C0118 85°C for min/max values unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Operating Voltage VIN 0.8 − VOUT V Output Voltage Range VOUT 1.8 − 3.3 V Minimum Input Voltage for Startup VIN_MIN − 0.85 0.90 V Reference Voltage (ILOAD = 0 mA, Cref = 100 nF, TA = 25°C) VREF 1.177 1.195 1.213 V Reference Voltage Temperature Coefficient TCVREF − 0.05 − mV/°C FB Input Threshold (ILOAD = 0 mA, TA = −40°C to 85°C) VFB 0.489 0.500 0.512 V FB Input Threshold (ILOAD = 0 mA, TA = 25°C) VFB 0.493 0.500 0.508 V FB Input Current IFB − 1.0 − nA Internal NFET ON−Resistance (ILX=100 mA, TA = 25°C) (Note 7) RDS(ON)_N − 0.3 0.45 /C0087 Internal PFET ON−Resistance (ILX=100 mA, TA = 25°C) (Note 7) RDS(ON)_P − 0.6 0.8 /C0087 LX Switch Current Limit (NFET) (Note 7) ILIM − 1.2 − A Operating Current into OUT (VFB = 0.7 V, TA = 25°C) IQ − 9.0 12 /C0109A Operating Current into BAT (VBAT = 1.2 V, VFB = 0.7 V, VLX = 1.2 V, TA = 25°C) IQBAT − 2.0 3.0 /C0109A Shutdown Current into BAT (LBI/EN = 0 V, VBAT = 3.3 V, TA = 25°C) IBAT_SD − 0.5 1.5 /C0109A LX Switch MAX. ON−Time (VFB = 0 V) tON 1.15 1.4 2.8 /C0109s LX Switch MIN. OFF−Time (VFB = 0 V) tOFF 80 200 350 ns BAT to LX Resistance (VFB = 0.7 V) RBAT_LX − 100 − /C0087 LBI Input Threshold VLBI 0.475 0.500 0.525 V LBI Input Hysteresis VLBI_HYS − 15 − mV LBI Input Current ILBI − 1.5 − nA LBO Low Output Voltage (VLBI = 0 V, ISINK = 1.0 mA) VLBO_L − − 0.2 V Maximum Continuous Output Current (VIN = 2.5 V, VOUT = 3.3 V) (Note 7) IOUT 200 − − mA Maximum Continuous Output Current (VIN = 0.8 V, VOUT = 3.3 V) (Note 7) IOUT 100 − − mA Soft Start Time (VIN = 1.2 V, TA = 25°C, CREF = 100 nF, VOUT = 3.3 V) (Note 6) TSS − 2.0 8.0 ms EN Shutdown Threshold (VBAT = 1.2 V) VSHDN 0.34 0.50 0.68 V EN Input Current IEN − 150 − nA ADEN Threshold (VBAT = 0.9 V to 3.3 V) VADEN 0.5*VBAT V ADEN Input Current IADEN − 100 − nA ADEN Switch Resistance RADEN 100 /C0087 Thermal Shutdown Temperature (Note 7) TSHDN − − 145 °C Thermal Shutdown Hysteresis (Note 7) TSDHYS − 30 − °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Value depends on voltage at V OUT. 7. Values are guaranteed by design.
Figure 2. Detailed Block Diagram
NCP1423, SCV1423 http://onsemi.com DETAILED OPERATION DESCRIPTION NCP1423 is a monolithic micropower high −frequency step−up voltage switching converter IC specially designed for battery operated hand −held electronic products up to 200 mA loading. It integrates a Synchronous Rectifier to improving efficiency as well as to eliminate the external Schottky diode. High switching frequency (up to 600 kHz) allows for a low profile inductor and output capacitor to be used. Low−Battery Detector, Logic−Controlled Shutdown and Cycle−by−Cycle Current Limit provide value −added features for various battery−operated applications. With all these functions ON, the quiescent supply current is typical only 9 /C0109A typical. This device is available in compact Micro10 package. PFM Regulation Scheme From the detailed block diagram (Figure 2), the output voltage is divided down and fed back to Pin 3 (FB). This voltage goes to the non −inverting input of the PFM comparator whereas the comparator’s inverting input is connected to the internal voltage reference, REF. A switching cycle is initiated by the falling edge of the comparator, at the moment the main switch (M1) is turned ON. After the maximum ON−time (typical 1.4 /C0109S) elapses or the current limit is reached, M1 is turned OFF, and the synchronous switch (M2) is turned ON. The M1 OFF time is not less than the minimum OFF−time (typically 0.20 /C0109S), which ensure complete energy transfer from the inductor to the output capacitor. If the regulator is operating in continuous conduction mode (CCM), M2 is turned OFF just before M1 is supposed to be ON again. If the regulator is operating in discontinuous conduction mode (DCM), which means the coil current will decrease to zero before the new cycle start, M1 is turned OFF as the coil current is almost reaching zero. The comparator (ZLC) with fixed offset is dedicated to sense the voltage drop across M2 as it is conducting, when the voltage drop is below the offset, the ZLC comparator output goes HIGH, and M2 is turned OFF. Negative feedback of closed loop operation regulates voltage at Pin 3 (FB) equal to the internal divide down reference voltage times (0.5 V). Synchronous Rectification The Synchronous Rectifier is used to replace the Schottky Diode to reduce the conduction loss contributed by the forward voltage of the Schottky Diode. The Synchronous Rectifier is normally realized by PowerFET with gate control circuitry that incorporates relatively complicated timing concerns. As the main switch (M1) is being turned OFF and the synchronous switch M2 is just turned ON with M1 not being completely turned OFF, current is shunt from the output bulk capacitor through M2 and M1 to ground. This power loss lowers overall efficiency and possibly damage the switching FETs. As a general practice, certain amount of dead time is introduced to make sure M1 is completely turned OFF before M2 is being turned ON. The previously mentioned situation occurs when the regulator is operating in CCM, M2 is being turned OFF, M1 is just turned ON, and M2 is not being completely turned OFF, A dead time is also needed to make sure M2 is completely turned OFF before M1 is being turned ON. As coil current is dropped to zero when the regulator is operating in DCM, M2 should be OFF. If this does not occur, the reverse current flows from the output bulk capacitor through M2 and the inductor to the battery input, causing damage to the battery. The ZLC comparator comes with fixed offset voltage to switch M2 OFF before any reverse current builds up. However, if M2 switch OFF too early, large residue coil current flows through the body diode of M2 and increases conduction loss. Therefore, determination on the offset voltage is essential for optimum performance. With the implementation of synchronous rectification scheme, efficiency can be as high as 90% with this device. Cycle−by−Cycle Current Limit In Figure 2, SENSEFET is used to sample the coil current as M1 is ON. With that sample current flowing through a sense resistor, a sense −voltage is developed. Threshold detector (I LIM) detects whether the sense−voltage is higher than the preset level. If the sense voltage is higher than the present level, the detector output notifies the Control Logic to switch OFF M1, and M1 can only be switched ON when the next cycle starts after the minimum OFF−time (typically 0.20 /C0109S). With proper sizing of SENSEFET and sense resistor, the peak coil current limit is typically set at 1.2 A. Voltage Reference The voltage at REF is typically set at 1.2 V and can output up to 2.5 mA with load regulation ±2.0%, at VOUT equal to 3.3 V . If VOUT is increased, the REF load capability can also be increased. A bypass capacitor of 200 nF is required for proper operation when REF is not loaded. If REF is loaded, 1.0 /C0109F capacitor at REF pin is needed. True−Cutoff The NCP1423 has a True−Cutoff function controlled by the EN pin (Pin 1). Internal circuitry can isolate the current through the body diode of switch M2 to load. Thus, it can eliminate leakage current from the battery to load in shutdown mode and significantly reduces battery current consumption during shutdown. The shutdown function is controlled by the voltage at Pin 1 (EN). When Pin 1 is pulled to lower than 0.5 V , the controller enters shutdown mode. In shutdown mode, when the switches M1 and M2 are both switched OFF, the internal reference voltage of the controller is disable and the controller typically consumes only 600 nA of current. If the Pin 1 voltage is raised to higher than 0.5 V , for example, by a resistor connected to V IN, the
NCP1423, SCV1423 http://onsemi.com IC is enabled again, and the internal circuit typically consumes 9 /C0109A of current from the OUT pin during normal operation. Low−Battery Detection A comparator with 15 mV hysteresis is applied to perform the low−battery detection function. When Pin 9 (LBI) is at a voltage (defined by a resistor divider from the battery voltage) lower than the internal reference voltage of 0.5 V , the comparator output turns on a 50 /C0087 low side switch. It pulls down the voltage at Pin 10 (LBO) which requires a hundred to a thousand k/C0087 of external pull−high resistance. If the Pin 9 voltage is higher than 0.5 V+15 mV , the comparator output turns off the 50 /C0087 low side switch. When this occurs, Pin 10 becomes high impedance and its voltage is pulled high again. Auto Discharge Auto discharge function is using for ensure the output voltage status after the power down occur. This function is using for communication with a digital signal. When auto discharge function is enabled, the ADEN is set high; the output capacitor will be discharged after the device is shutdown. The capacitors connected to the output are discharged by an integrated switch of 100 /C0087. The residual voltage on V OUT will be less than 0.4 V after auto discharge. APPLICATIONS INFORMATION Output Voltage Setting A typical application circuit is shown in Figure 1, The output voltage of the converter is determined by the external feedback network comprised of R1 and R2 and the relationship is given by: VOUT /C00430.5 V /C0032/C04661 /C0041R1 R2/C0467 where R1 and R2 are the upper and lower feedback resistors, respectively. Low Battery Detect Level Setting The Low Battery Detect V oltage of the converter is determined by the external divider network comprised of R3 and R4 and the relationship is given by: VLBI /C00430.5 V /C0032/C04661 /C0041R3 R4/C0467 where R3 and R4 are the upper and lower divider resistors respectively. Inductor Selection The NCP1423 is tested to produce optimum performance with a 5.6 /C0109H inductor at V IN = 1.3 V , V OUT = 3.3 V , supplying an output current up to 200 mA. For other input / output requirements, inductance in the range 3 /C0109H to 10 /C0109H can be used according to end application specifications. Selecting an inductor is a compromise between output current capability, inductor saturation limit and tolerable output voltage ripple. Low inductance values can supply higher output current but also increase the ripple at output and decrease efficiency. On the other hand, high inductance values can improve output ripple and efficiency; however, it also limited the output current capability at the same time. Another parameter of the inductor is its DC resistance. This resistance can introduce unwanted power loss and reduce overall efficiency. The basic rule is to select an inductor with lowest DC resistance within the board space limitation of the end application. Capacitors Selection In all switching mode boost converter applications, both the input and output terminals see impulsive voltage / current waveforms. The currents flowing into and out of the capacitors multiply with the Equivalent Series Resistance (ESR) of the capacitor to produce ripple voltage at the terminals. During the Syn −Rect switch −off cycle, the charges stored in the output capacitor are used to sustain the output load current. Load current at this period and the ESR combined and reflect as ripple at the output terminals. For all cases, the lower the capacitor ESR, the lower the ripple voltage at output. As a general guideline, low ESR capacitors should be used. PCB Layout Recommendations Good PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise, and unwanted feedback that can affect the performance of the converter. Hints suggested below can be used as a guideline in most situations. Grounding A star−ground connection should be used to connect the output power return ground, the input power return ground, and the device power ground together at one point. All high−current paths must be as short as possible and thick enough to allow current to flow through and produce insignificant voltage drop along the path. The feedback signal path must be separated from the main current path and sense directly at the anode of the output capacitor. Components Placement Power components (i.e. input capacitor, inductor and output capacitor) must be placed as close together as possible. All connecting traces must be short, direct and thick. High current flowing and switching paths must be kept away from the feedback (FB, Pin 3) terminal to avoid unwanted injection of noise into the feedback path.
Figure 33. Layout Guidelines
NCP1423, SCV1423 http://onsemi.com General Design Procedures Switching mode converter design is important. Suitable choice an inductor and capacitor value can make the converter has an optimum performance. Below a simple method base on the most basic first order equations to estimate the inductor and capacitor values for NCP1423 operate in Continuous Conduction Mode (CCM) is introduced. The component value set can be used as a starting point to fine −tune the circuit operation. By all means, detail bench testing is needed to get the best performance out of the circuit. Design Parameters: For one cells supply application VIN = 1.1 V to 1.5 V , Typical 1.3 V VOUT = 3.3 V IOUT = 150 mA (200 mA max) VLB = 1.0 V VOUT−RIPPLE = 30 mVp−p at IOUT = 150 mA Calculate the feedback network: Select R2 = 100 k R1 /C0043R2 /C0466VOUT VFB /C00421/C0467 R1 /C0043100 k /C04663.3 V
0.5 V /C00421/C0467/C0043560 k
Calculate the Low Battery Detect divider: VLB0 = 1.0 V Select R4 = 100 k R3 /C0043R4 /C0466VLB0 VLB1 /C00421/C0467 R3 /C0043100 k /C04661.0 V 0.5 V /C00421/C0467/C0043100 k Determine the steady state duty ratio, D for typical V IN, operation will be optimized around this point: VOUT VIN /C00431 1 /C0042D D /C00431 /C0042VIN VOUT /C00431 /C00421.3 V 3.3 V /C00430.606 Determine the average inductor current, I LA VG at maximum IOUT: ILAVG /C0043IOUT 1 /C0042D /C0043150 mA 1 /C00420.606 /C0043381 mA Assume the efficiency /C0104 = 85% Determine the peak inductor ripple current, IRIPPLE−P and calculate the inductor value: Assume IRIPPLE−P is 40% of ILA VG, the inductance of the power inductor can be calculated as in below: IRIPPLE−P = 0.40 x 381 mA / /C0104 = 179 mA L /C0043VIN /C0032tON 2I RIPPLE/C0042P /C00431.3 V /C00321.4 /C0109S 2 (179 mA) /C00435.0 /C0109H A standard value of 5.6 /C0109H is selected for initial trial. Determine the output voltage ripple, V OUT−RIPPLE and calculate the output capacitor value: VOUT−RIPPLE = 30 mVP−P at IOUT = 150 mA COUT /C0117 IOUT /C0032tON VOUT/C0042RIPPLE /C0042IOUT /C0032ESRCOUT where tON = 1.4 /C0109S and ESRCOUT = 0.1 /C0087, From above calculation, you need at least 14 /C0109F in order to achieve the specified ripple level at conditions stated. Practically, a one level larger capacitor will be used to accommodate factors not taken into account in the calculations. Therefore, a capacitor value of 22 /C0109F is selected. The NCP1423 is internal compensated for most applications. But in case additional compensation is required, the capacitor C1 can be used as external compensation adjustment to improve system dynamics. Feedforward Capacitor (C1) Selection A feedforward capacitor might be required to be added in parallel to the upper feedback resistor to avoid double pulsing or group pulsing at the switching node which causes larger inductor ripple current and higher output voltage ripple. With adequate feedforward capacitor, evenly distributed single pulses at the switching node can be achieved. For NCP1423, the lower the switching frequency is, the larger the feedforward capacitor value should be. For initial trial value, the following equation can be used, but actual value may need fine tuning: CFF /C0091 1 2 /C0032/C0112/C0032 FSW 20 /C0032R1 FSW is the switching frequency measured for nominal load. If a feedforward capacitor is used, the equation provides an initial starting value. Some trimming of the feedback capacitor may be required depending on the desired output value. SENSEFET is a trademarkof Semiconductor Components Industries, LLC.
SCALE 2:1 SBM0.08 (0.003) A ST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 2.90 3.10 0.114 0.122 B 2.90 3.10 0.114 0.122 C 0.95 1.10 0.037 0.043 D 0.20 0.30 0.008 0.012 G 0.50 BSC 0.020 BSC H 0.05 0.15 0.002 0.006 J 0.10 0.21 0.004 0.008 K 4.75 5.05 0.187 0.199 L 0.40 0.70 0.016 0.028 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION “A” DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION “B” DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846B−01 OBSOLETE. NEW STANDARD 846B−02 −B− −A− D K G PIN 1 ID 8 PL 0.038 (0.0015) −T− SEATING PLANE C H J L xxxx AYW xxxx = Device Code A = Assembly Location Y = Year W = Work Week = Pb−Free Package GENERIC MARKING DIAGRAM* mm inchesSCALE 8:1 Micro10 10X 10X 1.04 0.041 0.32 0.0126 5.28 0.208 4.24 0.167 3.20 0.126 0.50 0.0196 Micro10 CASE 846B−03 ISSUE D DATE 07 DEC 2004 SOLDERING FOOTPRINT *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ ”, may or may not be present. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS http://onsemi.com Semiconductor Components Industries, LLC, 2002 October, 2002 − Rev. 0 Case Outline Number: XXX DOCUMENT NUMBER: STATUS: NEW STANDARD: DESCRIPTION: 98AON03799D ON SEMICONDUCTOR STANDARD Micro10 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2
DOCUMENT NUMBER: 98AON03799D PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION. REQ BY J. HOSKINS. 09 NOV 2000 USED ON: WAS 10 LEAD TSSOP, PITCH 0.65 REQ BY J. HOSKINS.
13 NOV 2000
B CHANGED “USED ON” WAS: 10 LEAD TSSOP, PITCH 0.50MM. REQ BY A. HAMID. 11 JUL 2001 REQ BY D. TRUHITTE.
31 JUL 2003
D ADDED FOOTPRINT INFORMATION. REQ. BY K. OPPEN. 07 DEC 2004 Semiconductor Components Industries, LLC, 2004 December , 2004 − Rev. 03D Case Outline Number: 846B ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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