SCM1710A MORNSUN | Alldatasheet

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Technical content

Datasheet sections

  • 1 UVP I Thepowersupplylineinputvoltageissensedviaaresistorforundervoltageprotection
  • 3 CS I Currentsamplinginputpin
  • 5 RI I PWM’soperating frequencysetbyexternal resistor toground whichisconnectedinparallelwithacapacitor
  • 6 GND P Groundreference
  • 7 GATE O PowerMOSFETgatedrivepin
  • 8 VDD P Chippowerpin

VER.A5 2019.07 Page of131

Applications

 IsolationAC-DCconverters FunctionalDescription This highly integrated SCM1710A current model PWM controller is ideal for offline AC-DC converter designs. The chip’s accurate operating frequencyisachieved bytrimming,itsmaximumswitching frequencycanbe setby meansof external resistor values. Incase of a lightload condition, the chip decreases the operating switching frequency as well as the CS peak current. Under no load (or nearly no load) condition, it operates intermittent, thus keeping the converter efficiency over the entire load range high which also results in a reduced standby power consumption. A number of compensation functions are integrated into the chip to guarantee extremely high output voltage accuracy, good dynamic response and extremely low output voltage temperature coefficient without device adding. The chip also incorporates a soft start function to improve the start stress and effectively avoiding output overshoot under light-load. EMI behavior is improved by means of flexible drive and frequency jittering technologies.A built-in management clock is preventing the loop from entering the dead zone due to interference. In additions, to increase the system reliability the SCM1710Adesignalsoincludesprotection featuresforVDD undervoltage lockout(UVLO),VDD overvoltage protection(OVP), open loop/outputshort circuit and overload protection (OLP), CS pin floating protection, RI pin short circuit protection, input undervoltage protection and overtemperature protection. TypicalApplicationCircuit  Maximumoperatingfrequencyisadjustable  Inputundervoltageprotection  Built-incompensationforopto-coupler  Compensationforprefeedback  Cycle-by-cyclecurrentlimit,overcurrentprotection  Amplitudeandfrequencyreductionunderlightloadcondition  Softstartup  VDDovervoltageprotectionandundervoltage lockout  OpenloopandCSpinfloatingprotection  RIpinshortcircuitprotection  Inputundervoltageprotection  Flexibledrivetechnology  Frequencyjittering Mechanicalpackage:SOP-8 (see “Orderinginformation” fordetails). PackageFeatures SCM1710AHighlyIntegratedPWMController

VER.A5 2019.07 Page of133 Generaltestconditions:Free-air,normaloperatingtemperaturerange (unlessotherwisespecified).AbsoluteMaximumRatings Parameter Symbol Min Max Unit Biasmainsvoltage VVDD 35 V VoltageoftheGATEpin VDRV -0.6 30 V Voltagerange UVP,FB,CS,RI -0.6 6 BOS -0.6 30 Storagetemperature TSTG -40 150 ℃Operatingjunctiontemperature TJ -40 150 Leadtemperatureforsoldering 0.6mmfromcasefor10s 260 Ratedvalueofelectrostaticdischarge(ESD) Humanbodymodel(HBM) -2000 2000 VChargingdevicemodel(CDM) -1000 1000 Important: Exposure toAbsolute Maximum Ratedconditions foran extended periodmayseverelyaffectthedevicereliability,and stress levelsexceeding the “Absolute Maximum Ratings”mayresultinpermanent damage. RecommendedOperatingConditions Parameter Symbol Min Max Unit Biasmainsvoltage VDD 8 25 V VDDbypasscapacitance CVDD 0.47 20 uF Maximumoperatingswitchingfrequency FSW 65 100 kHz Operatingjunctiontemperature TJ -40 125 ℃ ElectricalCharacteristics Generaltest conditions and VDD =12V,GATEwithno load(unlessotherwisespecified). Symbol Parameter Test condition Mini Typ Max Unit Chippowersupply(VDDpin) ISTARTUP VDDstartingcurrent VVDD<VVDDoff,currentflowing intotheVDDport 150 300 450 uA IVDD_OP Chip’soperatingcurrent VFB=3V,RI=24K 1.5 2.5 3.5 mA VUVLO_ON VDDundervoltagelockout cancellation (enable) VVDD:increasing 14.8 16.1 17.4 V VUVLO_OFF VDDundervoltagelockout VVDD:decreasing 6.8 7.4 8 V VOVP_ON1 VDDovervoltageprotection triggervoltage VVDD:15V~21V FB=4V 22.3 24.2 26.2 V VOVP_OFF VDDovervoltageprotection recoveryvoltage VVDD:21V~10V FB=1-4V 14.8 16.1 17.4 V VOVP_HYS VDDovervoltageprotection backlashvoltage 8.1 V VCLAMP VDDclampingvoltage Suddenimprovementofthe currentabsorptioncapability ofVDD 30 35 40 V Feedbackvoltageinput(FBpin) AV_CS PWMinputgain △VFB/△VCS 2.75 V/V VFB_OPEN FBopen-circuitvoltage 5.37 V IFB_SHORT FBshort-circuitcurrent FBgrounding current 0.9 1.2 1.5 mA VBURST_ON Frequencymodulationmode entrylevel VFBvoltageincreasing 1.25 V VBURST_OFF Frequencymodulationmodeexit level VFBvoltagedecreasing 1.65 V VTH_PL FBthresholdvoltageduring powerlimitation 4.55 V Oscillatorparameter（RIpin） FOSC Oscillatorfrequency RI=24K 90.8 KHz DMAX Maximumdutyratio 76 80 84 % AJITTER Frequencyjitteringamplitude RI=24K 86 90 95 KHz FJITTER Frequencyjitteringtrimming period RI=24K 5 6 8 mS FMIN1 Minimumoperatingfrequency duringstart RI=24K 23.9 kHz FMIN2 Minimumoperatingfrequency duringsteadyoutput RI=24K 23.9 kHz RI_RANGE RIchangerange 15 24 48 KΩ VRI_OPEN RIopen-circuitvoltage 2 V Currentdetectioninput(CSpin) VCST_MAX Internalcurrentlimiting 0.8 V TBLANKING Leadingedgeblankingtime, RI=24K External - nS SCOMP1 Slopecompensation RI=24K, D∈(40%-60%) 33 mV/uS SCOMP2 Slopecompensation RI=24K, 58 mV/uS

VER.A5 2019.07 Page of134 D∈(60%-80%) Inputvoltagedetectionpin(UVPpin) IUVIN_ON Inputundervoltageprotection triggercurrent RI=24K 150 167 184 uA TUVIN1 Inputundervoltageprotection triggervoltageholdtime,start 3 Pulse number TUVIN2 Inputundervoltageprotection triggervoltageholdtime, operating

211 Pulse

K Relationbetween thefeedforward currentfromCSandthecurrent fromUVP VUVP_CLAMP UVPpinclampingvoltage 5.375 V Overtemperatureprotectionpin(BOSpin) VOTP Temperaturethresholdvoltagefor overtemperatureprotection 2.4 V VOTP_HYS Overtemperatureprotection temperaturereturndifference 0.4 V VBOS_OPEN BOSpinopen-circuitvoltage 5.135 V Drivingsignal(GATEpin) VOL Outputlowlevel IO=20mA(source) VVDD=20V 0.14 V VOH Outputhighlevel IO=20mA(sink) VVDD=20V 17.5 V VCLAMP Clampingvoltage CGATE=1nF 18.6 V TR Outputrisetime CGATE=1nF VVDD=20V 275 nS TF Outputfalltime CGATE=1nF VVDD=20V 47 nS Timeparameter(Timing) TD_PL VFB overvoltageprotectiondelay RI=24K 3*211 Pulse number TSLEEP VFB overvoltageprotectionsleep time RI=24K 216 S TRI_SHORT RIpinshortcircuitprotection detectiontime RI=24K 6 Pulse number TSSTART1 Softstarttime,VFB=1.6V-3V 7 9 11 mS TypicalCurves Fig.1:VDDUndervoltage LockoutvsTemperature Fig.2:VDDUndervoltage LockoutCancellationVoltage(start)vs Temperature Fig.3:PWMOperatingCurrentvsVDDVoltage Fig.4:PWMOperatingCurrentvsTemperature

VER.A5 2019.07 Page of135 Fig.5:OperatingFrequencyvsTemperature Fig.6:OperatingFrequencyvsVFB Voltage Fig.7:OperatingFrequencyvsRIPinResistance Fig.8:UVP(InputUndervoltageProtection)PinInputCurrentvs Temperature Fig.9:UVP(InputUndervoltageProtection)CancellationCurrentvs Temperature Fig.10:VDDOvervoltageProtectionVoltagevsTemperature Whentestingtheworkingcurrent,startingandundervoltagepointandotherparametersrelatedtoVDDpin,seefigure11: 1)V1=6V,V2=0V,FBandBOSpinsaresuspended(V3andV4are notpowered up,anda“×”inthefigureindicatesthatthesuspensionisnotpowered up),GATEpinsaresuspended,andCSpinsaregrounded.TesttheinputcurrentofVDDport,namelyI_Startup; 2) Keep V2=0V, V1 increases the voltage from 0V, and the V1 value corresponding to the moment when Ivdd suddenly increases the VDD starting voltage(undervoltagelockcancellationpoint)ofthechip; 3) Keep V2=0V, V1 reduces the voltage from 20V, and the V1 value corresponding to the moment when the input current Ivdd of VDD port suddenly decreasesistheVDDundervoltagelockingvoltage(undervoltagepoint)ofthechip; Whentestingparameterssuchaschipworkingfrequencyanddutyratio,itisnecessarytoensurethattheunder-voltageprotectionfunctionofUVPpinis nottriggered,asshowninfigure12: 1) V1=18V, V2= -2.25v, V3=3V. GATE is connected to the oscilloscope probe. When GATE has square wave output, the duty ratio of square wave is tested. 2) V1=18V,V2=-2.25v,V3=3V,andotherSettingsremainunchanged.ThefrequencyofGATEsquarewaveisdirectlytested. Parametermeasurementinformation

VER.A5 2019.07 Page of136 Fig.11PrinciplediagramofVDDrelatedfunctioncurvetestcircuit Fig.12PrinciplediagramofDutyratioandfrequencytestcircuit Productmodeloverview In SCM1710A, the chip working frequency is adjusted, with high precision, and the maximum working frequency can be changed by external resistance with different resistance values. Under light load, the working frequency and peak current amplitude of the chip will decrease with the decreaseof load. When itis closeto no load, the chip will workin burstmode, so thattheconverter can maintain high efficiencyin the whole load range andreducestandbypowerconsumption.WhenthevoltageofFBportVFB isgreaterthan4.55vandthecumulativetimeexceedstheshut-offtimingTD_PL, VFB isconsidered tobe overvoltage,and the GATEisimmediatelyforcedto beshutoff,entering theresting stateof VFBovervoltage protection.IfVFB is lessthan4.55vbeforeTD_PL,VFBovervoltage protection willnot be triggered.Therestduration ofVFB overvoltage protection isTSLEEP.AfterTSLEEP,the overvoltageprotectionofVFBiscancelled,andtheshutdown effectonGATEiscancelled.Meanwhile,thesoft-startresetpullstheVFB down.Overpower protection (OPP)/output short-circuit protection (OSP)/open-loop protection (OLP) can be achieved by VFB overvoltage protection, because overpower, outputshort-circuitandopen-loop protectioncancauseVFB toriseabove4.55v. RecommendedApplicationCircuit In the practical application of SCM1710A, it is recommended to match our company's SCM9601A as the high-voltage starting circuit. For details, please refer to application circuit 13. When the input voltage reaches 40VDC, SCM9601Abegins to charge the CVDD of SCM1710Abypass capacitor, and when the threshold voltage VUVLO_ON of SCM1710Ais reached, the GATE pin starts to output pulse signal, drive the MOS tube to conduct, and the primary side inductance storage the energy.After that, the MOS tube was turned off, and the excitation inductor on the primary side was demagnetized. Throughcouplingoftheprimaryandsecondarysidesofthetransformer,energywastransferredtotheoutput.Theoutputvoltagegraduallyrose,andthe feedback loop began to work. After SCM9601A reaches the timing cycle, SCM9601A is off. The product charges the CVDD of SCM1710A bypass capacitorthroughtheauxiliarywinding,andtheoutputvoltagecontinuestoriseuntiltheoutputvoltageisstableatthesetvalue. Fig.13recommendedapplicationcircuit FunctionalDescription SCM1710Ais a highly integrated current and voltage PWM controller applicable to offlineAC-DC controllers. Viewed from its main features: In the case of a light load, the chip’s operating frequency and peak current decrease with the load; in the case of nearly no load, it is in the intermittent operation, keeping high efficiency for the converter in the whole load range and reducing the standby power consumption; its chip integrates various compensators for extremely high output voltage accuracy, good dynamic response and extremely low output voltage temperature coefficient without device adding. Unless it is otherwise specified, the following values are all on the following basis: VVDD=12V; RI=24kΩ; ambient temperature; ambient pressure.

VER.A5 2019.07 Page of137 VDDUndervoltageLockoutProtection TheVDDpinofthe SCM1710Achipisconnectedvia a charging capacitortoground. BecauseoftheVDDundervoltage lockoutcircuit,thechip can eitherbeconnected,disconnectedoroperatewithchangesoftheVDDvoltage. Thechipisconnected,when VVDD isgreaterthanVUVLO_ON (VDDvoltagegreaterthanundervoltagelockoutcancellationvoltage). ThechipoperatesnormallywhenVVDD isgreaterthanVUVLO_OFF (VDDisbetween startpointandundervoltagepoint). ThechipisdisconnectedwhenVVDD issmallerthanVUVLO_OFF (VDDvoltagesmallerthanundervoltagelockoutvoltage). VDDOvervoltageProtection IftheVDD voltageexceedstheovervoltageprotection thresholdVOVP_ON formorethan 200us,thechip entersthe VDDovervoltage protectionmode and be the GATE signal will be disabled; once the VDD voltage becomes smaller than the overvoltage protection recovery point VOVP_OFF, the overvoltage protection signal is logically cancelled and the chip becomes enabled again, after soft start reset and soft start sequence the GATE output signalwillstartworkinginnormaloperation. Built-inLoopCompensation The secondary-side feedback circuit controlled by SCM1710A, consists of a TL431 providing the whole loop with maximum grain. To avoid bandwidth impact by zero poles in other positions, a zero pole is set for the TL431 to compensate the loop into a simple pole system before the crossoverfrequency(1/6to1/10switchingfrequency).TocompensatetheimpactbythepoleintroducedtotheFBpinduetoopticalcoupling,aninternal compensationloopissettosavetheexternaldevicesneededbytheFBpin. TransferfunctionoftheSCM1710A’sbuilt-incompensationis: )R(RCS )R(RCSRR R H(s) 2111 21123   (1) Solvingzerofrequencyandpolefrequency: SW P Z TCRR R)R(Rπ Tf 143 4212 (2) SW P P TC)R(Rπ (3) Intheexpressionsabove:R1+R2=1.15MΩ,R3=192kΩ,R4=96kΩ,C1=10.56pF,Tp=230nS Expressionoftheinternalcompensationzeropole: Intheexpression:fswreferstooperatingfrequencyoftheswitch. Built-inSoftStart Forstart-upovershootimprovementunder light-loadconditionsandtoreducestartstress,theSCM1710Aconductssoftstartbyslowlyincreasing theVFB voltage.TheVFB voltageincreasesgraduallyandalmostcontinuously.Aftersoftstart,VFB isnotlimitedbythesoftstartcircuit,buteffectively initializedduringrestartfollowingthefirsttimeofstartandprotection.BecauseofdifferentinitialFBvoltages,thesoftstartdurationvarieswiththeload (usuallybetween 7msand11ms). Intelligent Frequency Modulation Green Mode Function SCM1710Acanadjusttheoscillator frequency,thatisthe frequencyofthe chip’sGATEoutputsignalisadjustedbydetecting theVFB voltageon the FBportunderfollowingscenarios:TheprocessofFBvoltagechangefromhightolow: VFB is greater than 4.4V while FB is decreasing is interpreted by the chip as an overpower stage;VFB is between 3V and 4.4V; the chip operates with maximumfrequencyandmaximumCSpeakvoltage. VFB is between 2.1V and 3V; the chip is in PWM mode and only the CS pin peak voltage is adjusted, while the frequency remains unchanged at maximum. VFB isbetween 1.25Vand 2.1V;thechipisinPWM+PFMmodeinwhichboth,theCSpeakvoltageand thechip’soperatingfrequencyareadjusted,and thefrequencygraduallydecreaseswiththeload. VFB reaches1.25V;thechipisoperatingatitsminimumfrequency,thecspeakvoltagereducesto1/5ofVCST_MAX.. VFB is smaller than 1.25V; the chip is in Burst mode and the GATE output signal stops .The curce of working mode chenging with time is shown in the figure14.

VER.A5 2019.07 Page of138 Fig.14VFB VSswitchingfrequencyandCSpeakvoltage BurstMode The SCM1710Adesign includes an intermittent mode (also called the frequency hopping mode) that reduces the no-load losses. It activates once VFB drops to 1.25V and the chip cuts off the GATE output. The output voltage drops caused by the power consumption of the load. The opto-coupler currentdecreasesandtheVFB voltagestarttoincreaseagain.OncetheVFB voltagelevelreaches1.65V,theGATEoutputsignalresumesatitsminimum frequency (one fourth of the maximum frequency), which ideally should be above 22kHz to avoid audible noise. In thisstage with the GATEdrive signal output enabled, the power supply’s output voltage starts to increase and only if VFB becomes smaller than 1.25V again, the SCM1710A re-enters its intermittentmodeonce(seeFig.15). Fig.15Burstmodetimesequence Note:Burstmodehasadelaytimeofabout80usleavingsomeresponsetimefortheloop. Full-loadFrequencyJittering For EMI improvement under full-load condition, a frequency jittering function is used when operating with the maximum frequency. The RI pin is connected to ground via paralleled external resistor and capacitor to realize this function (recommended value of CJITTER = 1nF to 2nF, see typical applicationcircuit).ThisspreadstheenergytoarangelargerthanthebandwidthoftheEMItester.WithanRIvalueof24kΩ,thefrequencyjitteringhasa periodofabout5msto8msandanamplitudeof-4.2%to+5.3%. Note:FrequencyjitteringfunctionisdisabledwithRIpinwithoutconnectcapacitor. Built-inSlopeCompensation Atwo-stagecompensationdesignisused.Theslopis33mV/uSwhenthedutycycleisbetween 40%and60%,or58mV/uSwhenthedutycycleis intherange from60%to80%.Thisdesignbysegmentavoidstheslopecompensation’simpactontheloadcapacity.Theslopesdescribedaboveare typicalvaluesmeasuredwhentheexternalresistorconnectedtotheRIpinhasavalueof24kΩ. OscillatorFrequency Thechip’smaximumoperatingfrequency(oscillatorfrequency)FmaxcanbesetthroughtheexternalresistorconnectedtotheRIpinasfollows. 1874712 RI(kΩ.(kHz)FMAX  (6) The recommended maximum operating frequency of the chip is between 65kHz and 100kHz (see also section “Recommended Operating Conditions”). Having the maximum operating frequency of the chip too low, can result in a large RI resistance and interference on the RI pin. With the chips’ maximum operating frequency too high, affects the chip’s power consumption (increase) and the frequency accuracy (decrease). When the minimumfrequencyisbelowabout20kHzcanresultinpossibleaudiblenoiseespeciallyintheeventofanextremelysmallloads.

VER.A5 2019.07 Page of139 Thefollowingequationisforcalculatingtheminimumoperatingfrequency. 268712 RI(kΩ.(kHz)FMIN  (7) MaximumPeakCurrent CompensatorandrelatedlogiccircuitinsidetheSCM1710AarelimitingthemaximumCSpinvoltagetoavalueofVCST_Max.Theprimaryside inductor’smaximumpeakcurrentIPL_MAX meetiscalculatedbythefollowingequation(slopecompensationNOTconsidered): CS RLC MAXPK R VI  8.0 _ (8) Where: RCS refers to the current sampling resistor; VRLC refers to the voltage across the feed-forward resistor which can be solved per following equation: CS P DIN RLC RL TVV  (9) TDreferstothecurrentdetectiondelayincludingtheon-offdelayoftheswitch.LP referstoprimarysideinductanceoftransformer. InputUndervoltageProtection 率 Aninputundervoltage protectioncanbedesignedaroundtheUVPpin.SupposethatRS1isapull-upresistorattheUVPend(refertotheTypical Applicationdiagram),thattheprimary-sideandsecondary-sidewindingshaveaturnratioofNP/NAandthattheexternalresistorconnectedtotheRIpin isRI(kΩ),thentheinputundervoltagepointcanbesolvedthroughthefollowingequation: RI R N NV S A P ONIN 4 (10) Theinputundervoltagerecoverypointcanbesolvedthroughthefollowingequation. RI R N NV S A P IN_OFF 9  (11) If there is an input undervoltage during start (input voltage is still below the undervoltage recovery point), the output will be directly stoped after outputting three pulses. If the chip detects an input undervoltage during normal operation of the converter, it enters a off timing sequence and detects whether the input undervoltage is still present after 211 switching periods. If the input undervoltage is still detected, the chip continues with the off timing after outputting two pulsesuntilthe inputvoltage isdetected to be above the undervoltage recoverypoint and subsequently,the chip will begin to output normalcontinuouspulsesagain. NotethattheRS2resistorvaluemustbeguaranteedunderfollowingtwo conditions： (1)ThepartialvoltageoftheauxiliarywindingonRS2islessthan6Vduringdegaussingstage； (2)RS2≥10KΩistrue(theerror oftheinputundervoltagepointislessthan5%). Feed-forwardCompensation 率 InputvoltagesamplingisrealizedbytheUVPpinandthefeedforwardresistorRLCgeneratesacompensationvoltageVRLCforfeedforward compensationwiththepurposeofequalovercurrentcorrespondingtohighorlowinputvoltage.RS1isthepull-upresistorattheUVPend.Solvingthe resultingRcsvoltageaftercompensation: IN S LC P ADCS IDEALRCSRCS V)R R N NKL _ (12) VRCS_IDEAListheidealvoltageinRCS。 Supposingthecontentinthebracketsiszero,then: LC P ADCS R R N NKL TR  LC P ADCS R R N NKL TR  (13) ThefeedforwardresistorvalueRLC canbesolvedbyfollowingequation: NLK RTRR SDCS LC  1 (14) Intheequationabove:

  • Tdisthecurrentdetectiondelayincludingtheon-offdelayoftheswitch.
  • LPistheprimarysideinductanceofthetransformer.
  • RS1/RCSisinputresistanceandcurrentsamplingresistancerespectively(seetheTypicalApplicationdiagram). VFB OvervoltageProtection When the totaltimeduring which the VFB voltage at theFB port isabove 4.55V exceedsthe switchofftimeTd_PL(i.e.3*211TOSC), itwill be assumed thatVFB isinovervoltagestateandthechipwillimmediatelybeforcedtoentertheVFB overvoltageprotectionsleepmodeandstoptheGATE.Incasethe

VER.A5 2019.07 Page of1310 VFB voltage falls below 4.55V before the total time reaches TD_PL, then the VFB overvoltage protection will not be triggered.After the duration of the VFB overvoltageprotectionsleep modeTSLEEP (i.e.216TOSC) isreached,thechipwill deactivatetheVFB overvoltageprotection,decreasetheVFB voltagewith thehelpofthesoftstarterand,successivelyenteringasoftstartsequenceassumingthereisnootherprotectionmodedetected. The VFB overvoltage protection function can also be used to detect protection from overpower (OPP), output short circuit (OSP) and open loop (OLP) situations because if the VFB voltage increases to a level of 4.55V or higher due to overpower, output short circuit or open loop, the protection is being activated. The figure below shows the sequence of VFB and GATE signal in case of an output short circuit condition. T1 indicates the soft start process, VFB changeswiththecapacitorchargingvoltageVSOFT duringsoftstartsequence.T2denotesVFB overvoltageprotectiondelaytime,withGATEsignalnotyet forced to be stoped.T3 shows VFB overvoltage protection sleep time duration, after which the chip resets and re-initiates a soft start sequence.T4 is the initialblankingtime,itcontains4periodsofinternalclock. Ifanoutputfaultconditionremains,theaboveprocesswillrepeatitselfperiodically. Fig.16VFB overvoltageprotectionsequence OvertemperatureProtection TheBOSpinisconnectedtoaNTCthermistorwhichrealizestheovertemperatureprotection. TheovertemperatureprotectionisenabledwhenthevoltageattheBOSpinisbelow2.4VanddisabledwhentheBOSpinvoltageisabove2.4V. RI VIBOS 2 (15) CurrentfromBOSpinwithavoltagegreaterthan2.4V: RI VIBOS 3 (16) CurrentfromtheBOSpinwithavoltagelowerthan2.4V:

VER.A5 2019.07 Page of1311 OrderingInformation Partnumber Packagetype NumberofPins Productmarking Tape&Reel SCM1710ASA SOP-8 8 SCM 1710ASA YM 3K/reel Productmarkinganddatecode SCM1710XYZ: (1)SCM1710=Productdesignation (2)X=Versioncodeinformation(A-Z) (3)Y=Packagingdefinitioncode;SforSOPpackage,MforMSOPpackage (4)Z=Operatingtemperaturerange(C=0℃ to+70℃,I=-40℃ to+85℃,A=-40℃ to+125℃,M=-55℃ to+125℃). (5)YM=Datecodeforproducttraceability;Y=codeforproductionyear;M=codeforproductionmonth PackageInformation(SOP-8) SOP-8 Symbol DimensionsinMillimeters DimensionsinInches Min Max Min Max A 1.350 1.750 0.053 0.069 A1 0.100 0.250 0.004 0.010 A2 1.350 1.550 0.053 0.061 b 0.330 0.510 0.013 0.020 c 0.170 0.250 0.007 0.010 D 4.800 5.000 0.189 0.197 e 1.270(BSC) 0.050(BSC) E 3.800 4.000 0.150 0.157 E1 5.800 6.200 0.228 0.244 L 0.400 0.800 0.016 0.032 θ 0o 8o 0o 8o

VER.A5 2019.07 Page of1312 Tape&ReelInformation(SOP-8) 1:4 U

VER.A5 2019.07 Page of1313 Discdimensions(mm) Packagetype Carriertapewidth B W1 W2Max SOP-8 12 180 12.4 18.4 Technicalrequirements: 1.Color:Blue(colornumbersforreference): PANTONEDS196-1C;C100M70Y0K0 PANTONEDS197-1C;C100M70Y0K10 PANTONEDS205-1C;C100M60Y0K20 PANTONEDS205-2C;C85M50Y0K20 PANTONEDS206-2C;C85M50Y0K35 PANTONEDS219-1C;C90M50Y5K15) 2.DimensionsandtolerancesaccordingtoANSI/EIA-481-C-2003; 3.Thediscshouldbeglossyandwithoutwarping; 4.Theouterpackageshouldbeingoodconditionandwithoutdamageorcontamination. Mornsun Guangzhou Science & Technology Co., Ltd. Tel:86-20-38601850 Fax:86-20-38601272 E-mail:sales@mornsun.cn