SCE7755

SCE7755 SILVAN | Alldatasheet

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SCE7755 Energy Metering IC with Pulse Output SCE7755 FEATURES High Accuracy, Surpasses 50 Hz/60 Hz IEC 687/1036 Less than 0.1% Error over a Dynamic Range of 500 to 1 The SCE7755 Supplies Average Real Power on the Frequency Outputs F1 and F2 The High-Frequency Output CF Is Intended for Calibration and Supplies Instantaneous Real Power Pin Compatible with AD7755 with Synchronous CF and F1/F2 Outputs The Logic Output REVP Can Be Used to Indicate a Potential Miswiring or Negative Power Direct Drive for Electromechanical Counters and Two Phase Stepper Motors (F1 and F2) A PGA in the Current Channel Allows the Use of Small Values of Shunt and Burden Resistance Proprietary ADCs and DSP Provide High Accuracy over Large Variations in Environmental Conditions and Time On-Chip Power Supply Monitoring On-Chip Creep Protection (No Load Threshold) On-Chip Reference 2.5 V 8% (30 ppm/C Typical ) with External Overdrive Capability Single 5 V Supply, Low Power (15 mW Typical) Low Cost CMOS Process SCE7755 GENERAL DESCRIPTION The SCE7755 is pin compatible with the AD7755. The only difference between the SCE7755 and the AD7755 is that the SCE7755 features a synchronous CF and F1/F2 outputs under all load conditions. The SCE7755 is a high accuracy electrical energy measurement IC. The part specifications surpass the accuracy requirements as quoted in the IEC1036 standard. See Analog Devices’ Application Note AN-559 for a description of an IEC1036 watt-hour meter reference design based on the AD7755. The only analog circuitry used in the SCE7755 is in the ADCs and reference circuit. All other signal processing (e.g., multiplication and filtering) is carried out in the digital domain. This approach provides superior stability and accuracy over extremes in environmental conditions and over time. The SCE7755 supplies average real power information on the low-frequency outputs F1 and F2. These logic outputs may be used to directly drive an electromechanical counter or interface to an MCU. The CF logic output gives instantaneous real power information. This output is intended to be used for calibration purposes or for interfacing to an MCU. The SCE7755 includes a power supply monitoring circuit on the AVDD supply pin. The SCE7755 will remain in a reset condition until the supply voltage on AVDD reaches 4 V. If the supply falls below 4 V, the SCE7755 will also be reset and no pulses will be issued on F1, F2, and CF. Internal phase matching circuitry ensures that the voltage and current channels are phase matched whether the HPF in Channel 1 is on or off. An internal no-load threshold ensures that the SCE7755 does not exhibit any creep when there is no load. SCE7755 FUNCTIONAL BLOCK DIAGRAM *U.S. Patents 5,745,323, 5,760,617, 5,862,069, and 5,872,469. SCE7755 SPECIFICATIONS

SCE7755 Energy Metering IC with Pulse Output Parameter Specifications Unit Test Conditions/Comments

SCE7755 Energy Metering IC with Pulse Output For Specified Performance 5 V – 5% POWER SUPPLY 4.75 V min 5 V + 5% AV DD 5.25 V max 5 V – 5% 4.75 V min DVDD 5 V + 5% 5.25 V max Typically 2 mA 3 mA max AIDD Typically 1.5 mA 2.5 mA max DIDD NOTES See Terminology section for explanation of specifications. See Plots in Typical Performance Graphs. Sample tested during initial release and after any redesign or process change that may affect this parameter. Specifications subject to change without notice. SCE7755 TIMING CHARACTERISTICS NOTES Sample tested during initial release and after any redesign or process change that may affect this parameter. See Figure 1. The pulsewidths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs section. The CF pulse is always 18 ns in the high-frequency mode. See Frequency Outputs section and Table IV. Specifications subject to change without notice. SCE7755 ABSOLUTE MAXIMUM RATINGS(TA = 25℃ unless otherwise noted.) Operating Temperature Range PIN CONFIGURATION SCE7755 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description

SCE7755 Energy Metering IC with Pulse Output

1 DVDD

Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the SCE7755. The supply voltage should be maintained at 5 V ë 5% for specified operation. This pin should be decoupled with a 10 nF capacitor in parallel with a ceramic 100 nF capacitor. 2 AC/DC High-Pass Filter Select. This logic input is used to enable the HPF in Channel 1 (Current Channel). A logic one on this pin enables the HPF. The associated phase response of this filter has been inter nally compensated over a frequency range of 45 Hz to 1 kHz. The HPF filter should be enabled in power metering applications.

3 AVDD

Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the SCE7755. The supply should be maintained at 5 V ë 5% for specified operation. Every effort should be made to minimize power supply ripple and noise at this pin by the use of proper decoupling. This pin should be decoupled to AGND with a 10 nF capacitor in parallel with a ceramic 100 nF capacitor. 4, 19 NC No Connect 5, 6 V1P, V1N Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with a maximum differential signal level of ë 470 mV for specified operation. Channel 1 also has a PGA, and the gain selections are outlined in Table I. The maximum signal level at these pins is _1V with respect to AGND. Both inputs have internal ESD protection circuitry. An overvoltage of ë 6V can be sustained on these inputs without risk of permanent damage. 7, 8 V2N, V2P Negative and Positive Inputs for Channel 2 (Voltage Channel). These inputs provide a fully differential input pair. The maximum differential input voltage is ë 660 mV for specified operation. The maxi mum signal level at these pins is ë 1V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage of ë 6V can also be sustained on these inputs without risk of permanent damage. 9 RESET Reset Pin for the SCE7755. A logic low on this pin will hold the ADCs and digital circuitry in a reset condition. Bringing this pin logic low will clear the SCE7755 internal registers.

10 REFIN/OUT

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.5 V ë 8% and a typical temperature coefficient of 30 ppm/∞C. An external reference source may also be connected at this pin. In either case, this pin should be decoupled to AGND with a 1 nF ceramic capacitor and 100 nF ceramic capacitor. 11 AGND This provides the ground reference for the analog circuitry in the SCE7755, i.e., ADCs and reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference for all analog circuitry, e.g., antialiasing filters and current and voltage transducers. For good noise suppression, the analog ground plane should only connect to the digital ground plane at one point. A star ground configuration will help to keep noisy digital currents away from the analog circuits. 12 SCF Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF. Table IV shows how the calibration frequencies are selected. 13, 14 S1, S0 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion. This offers the designer greater flexibility when designing the energy meter. See

SCE7755 Energy Metering IC with Pulse Output Selecting a Frequency for an Energy Meter Application section. 15, 16 G1, G0 These logic inputs are used to select one of four possible gains for Channel 1, i.e., V1. The possible gains are 1, 2, 8, and 16. See Analog Input section. 17 CLKIN An external clock can be provided at this logic input. Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to provide a clock source for the SCE7755. The clock frequency for specified operation is 3.579545 MHz. Crystal load capacitance of between 22 pF and 33 pF (ceramic) should be used with the gate oscillator circuit.

18 CLKOUT A crystal can be connected across this pin and CLKIN as described above to provide a clock

for the SCE7755. The CLKOUT Pin can drive one CMOS load when an external clock is supplied at CLKIN or by the gate oscillator circuit. 20 REVP This logic output will go logic high when negative power is detected, i.e., when the phase angle between the voltage and current signals is greater than 90∞. This output is not latched and will be reset when positive power is once again detected. The output will go high or low at the same time as a pulse is issued on CF.

21 DGND

This provides the ground reference for the digital circuitry in the SCE7755, i.e., multiplier, filters, and digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The digital ground plane is the ground reference for all digital circuitry, e.g., counters (mechanical and digital), MCUs, and indicator LEDs. For good noise suppression, the analog ground plane should only be connected to the digital ground plane at one point only, e.g., a star ground. 22 CF Calibration Frequency Logic Output. The CF logic output gives instantaneous real power informa tion. This output is intended to be used for calibration purposes. Also see SCF Pin description. 23, 24 F2, F1 Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can be used to directly drive electromechanical counters and two phase stepper motors. See Transfer Function section. SCE7755 PHASE ERROR BETWEEN CHANNELS The HPF (High-Pass Filter) in Channel 1 has a phase lead response. To offset this phase response and equalize the phase response between channels, a phase correction network is also placed in Channel 1. The phase correction network matches the phase to within ë 0.1∞ over a range of 45 Hz to 65 Hz and ë 0.2∞ over a range 40 Hz to 1 kHz. See Figures 4 and 5. SCE7755 POWER SUPPLY REJECTION This quantifies the SCE7755 measurement error as a percentage of the reading when the power supplies are varied. For the ac PSR measurement, a reading at nominal supplies (5 V) is taken. A 200 mV rms/100 Hz signal is then introduced onto the supplies and a second reading obtained under the same input signal levels. Any error introduced is expressed as a percentage of the reading (see Measurement Error definition). For the dc PSR measurement, a reading at nominal supplies (5 V) is taken. The supplies are then varied ë 5% and a second reading is obtained with the same input signal levels. Any error introduced is again expressed as a percentage of the reading. SCE7755 ADC OFFSET ERROR This refers to the dc offset associated with the analog inputs to the ADCs. It means that with the analog inputs connected

SCE7755 Energy Metering IC with Pulse Output to AGND, the ADCs still see a small dc signal (offset). The offset decreases with increasing gain in Channel V1. This specification is measured at a gain of 1. At a gain of 16, the dc offset is typically less than 1 mV. However, when the HPF is switched on, the offset is removed from the current channel and the power calculation is not affected by this offset. SCE7755 GAIN ERROR The gain error of the SCE7755 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. It is measured with a gain of 1 in Channel V1. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the SCE7755 transfer function (see Transfer Function section). SCE7755 GAIN ERROR MATCH The gain error match is defined as the gain error (minus the offset) obtained when switching between a gain of 1 and a gain of 2, 8, or 16. It is expressed as a percentage of the output frequency obtained under a gain of 1. This gives the gain error observed when the gain selection is changed from 1 to 2, 8, or 16. TPC 12. Test Circuit for Performance Curves SCE7755 THEORY OF OPERATION The two ADCs digitize the voltage signals from the current and voltage transducers. These ADCs are 16-bit second order sigma-delta with an oversampling rate of 900 kHz. This analog input structure greatly simplifies transducer interfacing by providing a wide dynamic range for direct connection to the transducer and also by simplifying the antialiasing filter design. A programmable gain stage in the current channel further facilitates easy transducer interfacing. A high-pass filter in the current channel removes any dc component from the current signal. This eliminates any inaccuracies in the real power calculation due to offsets in the voltage or current signals (see HPF and Offset Effects section). The real power calculation is derived from the instantaneous power signal. The instantaneous power signal is generated by a direct multiplication of the current and voltage signals. In order to extract the real power component (i.e., the dc component), the instantaneous power signal is low-pass filtered. Figure 2 illustrates the instantaneous real power signal and shows how the real power information can be extracted by low-pass filtering the instantaneous power signal. This scheme correctly calculates real power for nonsinusoidal current and voltage waveforms at all power factors. All signal processing is carried out in the digital domain for superior stability over temperature and time.

Figure 13. Interfacing the SCE7755 to an MCU measured energy will have no ripple. result in a one-in-twenty (or 5%) error in the power measurement. conversion. The output frequency or pulse rate is related to the input voltage signals by the following equation.

SCE7755 Energy Metering IC with Pulse Output VREF = The reference voltage (2.5 V ë 8%) (Volts) F1–4 = One of four possible frequencies selected by using the logic inputs S0 and S1—see Table II Table II. F1–4 Frequency Selection S1 S0 F1–4 (Hz) XTAL/CLKIN* 0 0 1.7 3.579 MHz/221 0 1 3.4 3.579 MHz/220 1 0 6.8 3.579 MHz/219 1 1 13.6 3.579 MHz/218 NOTE *F1–4 is a binary fraction of the master clock and therefore will vary if the specified CLKIN frequency is altered. Example 1 Thus if full-scale differential dc voltages of +470 mV and –660 mV are applied to V1 and V2 respectively (470 mV is the maximum differential voltage that can be connected to Channel 1, and 660 mV is the maximum differential voltage that can be connected to Channel 2), the expected output frequency is calculated as follows: Gain = 1, G0 = G1 = 0 F1–4 = 1.7 Hz, S0 = S1 = 0 V1 = +470mV dc = 0.47 V (rms of dc = dc) V2 = –660mV dc = 0.66 V (rms of dc = |dc|) VREF = 2.5 V (nominal reference value) NOTE: If the on-chip reference is used, actual output frequencies may vary from device to device due to reference tolerance of ±8%. Example 2 In this example, with ac voltages of ë 470 mV peak applied to V1 and ë 660 mV peak applied to V2, the expected output frequency is calculated as follows: Gain = 1, G0 = G1 = 0 F1–4 = 1.7 Hz, S0= S1 = 0 V1 = rms of 470 mV peak ac = 0.47/∂2 volts V2 = rms of 660 mV peak ac = 0.66/∂2 volts VREF = 2.5 V (nominal reference value) NOTE: If the on-chip reference is used, actual output frequencies may vary from device to device due to reference tolerance of ±8%. 2 î 25 . As can be seen from these two example calculations, the maximum output frequency for ac inputs is always half of that for dc input signals. Table III shows a complete listing of all maximum output frequencies. Table III. Maximum Output Frequency on F1 and F2 Max Frequency Max Frequency S1 S0 for DC Inputs (Hz) for AC Inputs (Hz) 0 0 0.68 0.34 0 1 1.36 0.68 1 0 2.72 1.36 1 1 5.44 2.72 Frequency Output CF SCE7755 The pulse output CF (Calibration Frequency) is intended for use during calibration. The output pulse rate on CF can be up to 2048 times the pulse rate on F1 and F2. The lower the F1–4 frequency selected, the higher the CF scaling (except for the high-frequency mode SCF = 0, S1 = S0 = 1). Table IV shows how the two frequencies are related, depending on the states of the logic inputs S0, S1, and SCF. Because of its relatively high pulse rate, the frequency at this logic output is proportional to the instantaneous real power. As is the case with F1 and F2, the frequency is derived from the output of the low-pass filter after multiplication. However, because the output frequency is high, this real power information is accumulated over a much shorter time. Hence, less averaging is carried out in the digital-tofrequency conversion. With much less averaging of the real power signal, the CF output is much more responsive to power fluctuations (see Figure 2, signal processing block diagram).

SCE7755 Energy Metering IC with Pulse Output Table IV. Maximum Output Frequency on CF SELECTING A FREQUENCY FOR AN ENERGY METER APPLICATION SCE7755 As shown in Table II, the user can select one of four frequencies. This frequency selection determines the maximum frequency on F1 and F2. These outputs are intended to be used to drive the energy register (electromechanical or other). Since only four different output frequencies can be selected, the available frequency selection has been optimized for a meter constant of 100 imp/kWhr with a maximum current of between 10 A and 120 A. Table V shows the output frequency for several maximum currents (IMAX) with a line voltage of 220 V. In all cases the meter constant is 100 imp/kWhr. Table V. F1 and F2 Frequency at 100 imp/kWhr IMAX F1 and F2 (Hz) 12.5 A 0.076 25 A 0.153 40 A 0.244 60 A 0.367 80 A 0.489 120 A 0.733 The F1–4 frequencies allow complete coverage of this range of output frequencies on F1 and F2. When designing an energy meter, the nominal design voltage on Channel 2 (voltage) should be set to half scale to allow for calibration of the meter constant. The current channel should also be no more than half scale when the meter sees maximum load. This will allow over current signals and signals with high crest factors to be accommodated. Table VI shows the output frequency on F1 and F2 when both analog inputs are half scale. The frequencies listed in Table VI align very well with those listed in Table V for maximum load. Table VI. F1 and F2 Frequency with Half-Scale AC Inputs SCE7755 Frequency on F1 and F2 CH1 and CH2 Half-Scale AC Inputs S1 S0 F1–4 0 1.7 3.4 6.8 13.6 0.085 Hz 1 0.17 Hz 0 0.34 Hz 1 0.68 Hz When selecting a suitable F1–4 frequency for a meter design, the frequency output at IMAX (maximum load) with a meter constant of 100 imp/kWhr should be compared with Column 4 of Table VI. The frequency that is closest in Table VI will determine the best choice of frequency (F1–4). For example, if a meter with a maximum current of 25 A is being designed, the output frequency on F1 and F2 with a meter constant of 100 imp/kWhr is 0.153 Hz at 25 A and 220 V (from Table V). Looking at Table VI, the closest frequency to 0.153 Hz in column four is 0.17 Hz. Therefore, F2 (3.4 Hz—see Table II) is selected for this design. Frequency Outputs SCE7755 Figure 1 shows a timing diagram for the various frequency outputs. The outputs F1 and F2 are the low-frequency outputs that can be used to directly drive a stepper motor or electromechanical impulse counter. The F1 and F2 outputs provide two alternating low going pulses. The pulsewidth (t 1) is set at 275 ms and the time between the falling edges of F1 and F2 (t3) is approximately half the period of F1 (t2). If, however, the period of F1 and F2 falls below 550 ms (1.81 Hz), the pulsewidth of F1 and F2 is set to half of their period. The maximum output frequencies for F1 and F2 are shown in Table III. The high-frequency CF output is intended to be used for communications and calibration purposes. CF produces a 90 ms-wide active high pulse (t4) at a frequency proportional to active power. The CF output frequencies are given in Table IV. As in the case of F1 and F2, if the period of CF (t5) falls below 180 ms, the CF pulsewidth is set to half the period. For example, if the CF frequency is 20 Hz, the CF pulsewidth is 25 ms. NOTE: When the high-frequency mode is selected, (i.e., SCF = 0, S1 = S0 = 1), the CF pulsewidth is fixed at 18 ns.

SCE7755 Energy Metering IC with Pulse Output Therefore, t4 will always be 18 ns, regardless of the output frequency on CF. NO LOAD THRESHOLD SCE7755 The SCE7755 also includes a “no load threshold” and “startup current” feature that will eliminate any creep effects in the meter. The SCE7755 is designed to issue a minimum output frequency on all modes except when SCF = 0 and S1 = S0 = 1. The no-load detection threshold is disabled on this output mode to accommodate specialized application of the SCE7755. Any load generating a frequency lower than this minimum frequency will not cause a pulse to be issued on F1, F2, or CF. The minimum output frequency is given as 0.0014% of the full-scale output frequency for each of the F 1–4 frequency selections (see Table II). For example, an energy meter with a meter constant of 100 imp/kWhr on F1 and F2 using F2 (3.4 Hz), the maximum output frequency at F1 or F2 would be 0.0014% of 3.4 Hz or –5 –3 of load or a start-up current of 8 mA at 220 V. IEC1036 states that the meter must start up with a load current equal to or less than 0.4% Ib. For a 5A (Ib) meter, 0.4% Ib is equivalent to 20mA. The start-up current of this design therefore satisfies the IEC requirement. As illustrated from this example, the choice of F1– F4 and the ratio of the stepper motor display will determine the start-up current. OUTLINE DIMENSIONS SCE7755