SCAN90CP02

SCAN90CP02_07 NSC | Alldatasheet

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Technical content

Features

■ 1.5 Gbps per channel ■ Low power: 70 mA in dual repeater mode @1.5 Gbps ■ Low output jitter ■ Configurable 0/25/50/100% pre-emphasis drives lossy backplanes and cables ■ Non-blocking architecture allows 1:2 splitter, 2:1 mux, crossover, and dual buffer configurations ■ Flow-through pinout ■ LVDS/BLVDS/CML/LVPECL inputs, LVDS Outputs ■ IEEE 1149.1 and 1149.6 compliant ■ Single 3.3V supply ■ Separate control of inputs and outputs allows for power savings ■ Industrial -40 to +85°C temperature range ■ 28-lead LLP package, or 32-lead LQFP package Block Diagram 20071401 FIGURE 1. SCAN90CP02 Block Diagram

I/O, Type Description DIFFERENTIAL INPUTS COMMON TO ALL MUXES IN0+ IN0− I, LVDS Inverting and non-inverting differential inputs. LVDS, Bus LVDS, CML, or LVPECL compatible. IN1+ IN1− I, LVDS Inverting and non-inverting differential inputs. LVDS, Bus LVDS, CML, or LVPECL compatible. SWITCHED DIFFERENTIAL OUTPUTS OUT0+ OUT0− O, LVDS Inverting and non-inverting differential outputs. OUT0± can be connected to any one pair IN0±, or IN1±. LVDS compatible (Note 2). OUT1+ OUT1− O, LVDS Inverting and non-inverting differential outputs. OUT1± can be connected to any one pair IN0±, or IN1±. LVDS compatible (Note 2). DIGITAL CONTROL INTERFACE SEL0, SEL1 I, LVTTL Select Control Inputs EN0, EN1 7 I, LVTTL Output Enable Inputs PEM00, PEM01 I, LVTTL Channel 0 Output Pre-emphasis Control Inputs PEM10, PEM11 I, LVTTL Channel 1 Output Pre-emphasis Control Inputs TDI 19 22 I, LVTTL Test Data Input to support IEEE 1149.1 features TDO 20 23 O, LVTTL Test Data Output to support IEEE 1149.1 features TMS 18 21 I, LVTTL Test Mode Select to support IEEE 1149.1 features TCK 17 19 I, LVTTL Test Clock to support IEEE 1149.1 features TRST 21 24 I, LVTTL Test Reset to support IEEE 1149.1 features N/C 8, 28 Not Connected POWER VDD 11, 14, 16, 22, 25 12, 16, 18, 25, 29 I, Power VDD = 3.3V ±0.3V. At least 4 low ESR 0.01 µF bypass capacitors should be connected from VDD to GND plane. GND (Note 1) 5, 11, 15, 20, 26, 30 Ground reference to LVDS and CMOS circuitry. For the LLP package, the DAP is used as the primary GND connection to the device. The DAP is the exposed metal contact at the bottom of the LLP-28 package. It should be connected to the ground plane with at least 4 vias for optimal AC and thermal performance. Note 1: Note that for the LLP package GND is not an actual pin on the package, the GND is connected thru the DAP on the back side of the LLP package. Note 2: The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the SCAN90CP02 device have been optimized for point-to-point backplane and cable applications. www.national.com 2 SCAN90CP02

DAP = GND 20071404 LQFP Top View Configuration Select Truth Table SEL0 SEL1 EN0 EN1 OUT0 OUT1 Mode 0 0 0 0 IN0 IN0 1:2 Splitter (IN1 powered down) 0 1 0 0 IN0 IN1 Dual Channel Repeater 1 0 0 0 IN1 IN0 Dual Channel Switch 1 1 0 0 IN1 IN1 1:2 Splitter (IN0 powered down) 0 1 0 1 IN0 PD Single Channel Repeater (Channel 1 powered down) 1 1 0 1 IN1 PD Single Channel Switch (IN0 and OUT1 powered down) 0 0 1 0 PD IN0 Single Channel Switch (IN1 and OUT0 powered down) 0 1 1 0 PD IN1 Single Channel Repeater (Channel 0 powered down) X X 1 1 PD PD Both Channels in Power Down Mode 0 0 0 1 Invalid State* 1 0 0 1 Invalid State* 1 0 1 0 Invalid State* 1 1 1 0 Invalid State* PD = Power Down mode to minimize power consumption X = Don't Care * Entering these states is not forbidden, however device operation is not defined in these states. Pre-Emphasis The pre-emphasis is used to compensate for long or lossy transmission media. Separate pins are provided for each out- put to minimize power consumption. Pre-emphasis is pro- grammable to be off or to preset values per the Pre-emphasis Control Selection Table. Output Characteristics The output characteristics of the SCAN90CP02 device have been optimized for point-to-point backplane and cable appli- cations. Pre-emphasis Control Selection Table Channel 0 Channel 1 Pre-emphasis PEM01 PEM00 PEM11 PEM10 0 0 0 0 0% 0 1 0 1 25% 1 0 1 0 50% 1 1 1 1 100% 3 www.national.com SCAN90CP02

FIGURE 2. SCAN90CP02 Configuration Select Decode

Absolute Maximum Ratings (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VDD) −0.3V to +4.0V CMOS Input Voltage −0.3V to (VDD +0.3V) LVDS Receiver Input Voltage −0.3V to +3.6V LVDS Driver Output Voltage −0.3V to +3.6V LVDS Output Short Circuit Current 40mA Junction Temperature +150°C Storage Temperature −65°C to +150°C Lead Temperature (Soldering, 4sec.) +260°C Maximum Package Power Dissipation at 25°C LLP-28 4.31 W LQFP-32 1.47 W Derating above 25°C LLP-28 34.5 mW/°C LQFP-32 11.8 mW/°C Thermal Resistance, θJA LLP-28 29°C/W LQFP-32 85°C/W ESD Rating HBM, 1.5 k Ω, 100 pF 6.5 kV EIAJ, 0 Ω, 200 pF >250V Recommended Operating Conditions Min Typ Max Unit Supply Voltage (VDD– GND) 3.0 3.3 3.6 V Receiver Input Voltage 0 3.6 V Operating Free Air Temperature −40 25 85 °C Junction Temperature 150 °C

Electrical Characteristics

Over recommended operating supply and temperature ranges unless other specified. Symbol Parameter Conditions Min Typ (Note 4) Max Units LVTTL DC SPECIFICATIONS (SEL0, SEL1, EN1, EN2, PEM00, PEM01, PEM10, PEM11, TDI, TCK, TMS, TRST) VIH High Level Input Voltage 2.0 VDD V VIL Low Level Input Voltage GND 0.8 V IIH High Level Input Current VIN = VDD = VDDMAX −10 +10 µA IIL Low Level Input Current VIN = VSS, VDD = VDDMAX −10 +10 µA IILR Low Level Input Current TDI, TMS, TRST -40 -200 µA CIN1 Input Capacitance Any Digital Input Pin to VSS 3.5 pF COUT1 Output Capacitance Any Digital Output Pin to VSS 5.5 pF VCL Input Clamp Voltage ICL = −18 mA −1.5 −0.8 V VOH High Level Output Voltage (TDO) IOH = −12 mA, VDD = 3.0 V 2.4 V IOH = −100 µA, VDD = 3.0 V VDD-0.2 V VOL Low Level Output Voltage (TDO) IOL = 12 mA, VDD = 3.0 V 0.5 V IOL = 100 µA, VDD = 3.0 V 0.2 V IOS Output Short Circuit Current TDO -15 -125 mA LVDS INPUT DC SPECIFICATIONS (IN0±, IN1±) VTH Differential Input High Threshold (Note 5) VCM = 0.8V or 1.2V or 3.55V, VDD = 3.6V 0 100 mV VTL Differential Input Low Threshold VCM = 0.8V or 1.2V or 3.55V, VDD = 3.6V −100 0 mV VID Differential Input Voltage VCM = 0.8V to 3.55V, VDD = 3.6V 100 mV VCMR Common Mode Voltage Range VID = 150 mV, VDD = 3.6V 0.05 3.55 V CIN2 Input Capacitance IN+ or IN− to VSS 3.5 pF IIN Input Current VIN = 3.6V, VDD = VDDMAX or 0V −10 +10 µA VIN = 0V, VDD = VDDMAX or 0V −10 +10 µA 5 www.national.com SCAN90CP02

Symbol Parameter Conditions Min Typ (Note 4) Max Units LVDS OUTPUT DC SPECIFICATIONS (OUT0±, OUT1±) VOD Differential Output Voltage, 0% Pre-emphasis (Note 5) RL = 100Ω between OUT+ and OUT− 250 400 575 mV ΔVOD Change in VOD between Complementary States −35 35 mV VOS Offset Voltage (Note 6) 1.09 1.25 1.475 V ΔVOS Change in VOS between Complementary States −35 35 mV IOS Output Short Circuit Current, One Complementary Output OUT+ or OUT− Short to GND −60 -90 mA COUT2 Output Capacitance OUT+ or OUT− to GND when TRI- STATE 5.5 pF SUPPLY CURRENT (Static) ICC0 Supply Current All inputs and outputs enabled and active, terminated with differential load of 100Ω between OUT+ and OUT-. 42 60 mA ICC1 Supply Current - one channel powered down Single channel crossover switch or single channel repeater modes (1 channel active, one channel in power down mode) 22 30 mA ICC2 Supply Current - one input powered down Splitter mode (One input powered down, both outputs active) 30 40 mA ICCZ TRI-STATE Supply Current Both input/output Channels in Power Down Mode 1.4 2.5 mA SWITCHING CHARACTERISTICS—LVDS OUTPUTS (Figures 3, 4) tLHT Differential Low to High Transition Time Use an alternating 1 and 0 pattern at 200 Mb/s, measure between 20% and 80% of VOD. 70 150 215 ps tHLT Differential High to Low Transition Time 50 135 180 ps tPLHD Differential Low to High Propagation Delay Use an alternating 1 and 0 pattern at 200 Mb/s, measure at 50% VOD between input to output. 0.5 2.4 3.5 ns tPHLD Differential High to Low Propagation Delay 0.5 2.4 3.5 ns tSKD1 Pulse Skew |tPLHD–tPHLD| 55 120 ps tSKCC Output Channel to Channel Skew Difference in propagation delay (tPLHD or tPHLD) among all output channels in Splitter mode (any one input to all outputs). 0 130 315 ps tJIT Jitter (0% Pre-emphasis) (Note 7) RJ - Alternating 1/0 @ 750 MHz (Note 8) 1.4 2.5 psrms DJ - K28.5 Pattern LQFP 110 140 psp-p

1.5 Gbps (Note 9) LLP 42 75 psp-p

TJ - PRBS 223-1 Pattern LQFP 113 148 psp-p

1.5 Gbps (Note 10) LLP 93 126 psp-p

tON LVDS Output Enable Time Time from ENx to OUT± change from TRI-STATE to active. 50 110 150 ns tOFF LVDS Output Disable Time Time from ENx to OUT± change from active to TRI-STATE. 5 12 ns tSW LVDS Switching Time SELx to OUT± Time from configuration select (SELx) to new switch configuration effective for OUT±. 110 150 ns www.national.com 6 SCAN90CP02

25.0 MHz

should be operated at these limits. Note 4: Typical parameters are measured at VDD = 3.3V, TA = 25°C. They are for reference purposes, and are not production-tested. Note 5: Differential output voltage VOD is defined as ABS(OUT+–OUT−). Differential input voltage VID is defined as ABS(IN+–IN−). Note 6: Output offset voltage VOS is defined as the average of the LVDS single-ended output voltages at logic high and logic low states. Note 7: Jitter is not production tested, but guaranteed through characterization on a sample basis. FIGURE 3. LVDS Signals

The SCAN90CP02 accepts differential signals and allow simple AC or DC coupling. With a wide common mode range, the SCAN90CP02 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures illustrate typical DC-coupled interface to common differential drivers. 20071421 Typical LVDS Driver DC-Coupled Interface to SCAN90CP02 Input 20071422 Typical CML Driver DC-Coupled Interface to SCAN90CP02 Input 20071423 Typical LVPECL Driver DC-Coupled Interface to SCAN90CP02 Input 9 www.national.com SCAN90CP02

The SCAN90CP02 outputs signals that are compliant to the LVDS standard. Their outputs can be DC-coupled to most common differential receivers. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. While most differential receivers have a common mode input range that can ac- comodate LVDS compliant signals, it is recommended to check respective receiver's data sheet prior to implementing the suggested interface implementation. 20071424 Typical SCAN90CP02 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver www.national.com 10 SCAN90CP02

FIGURE 7. Typical Performance Characteristics

Design-For-Test (DfT) Features IEEE 1149.1 SUPPORT The SCAN90CP02 supports a fully compliant IEEE 1149.1 interface. The Test Access Port (TAP) provides access to boundary scan cells at each LVTTL I/O on the device for in- terconnect testing. Differential pins are included in the same boundary scan chain but instead contain IEEE1149.6 cells. IEEE1149.6 is the improved IEEE standard for testing high- speed differential signals. Refer to the BSDL file located on National's website for the details of the SCAN90CP02 IEEE 1149.1 implementation. IEEE 1149.6 SUPPORT AC-coupled differential interconnections on very high speed (1+ Gbps) data paths are not testable using traditional IEEE 1149.1 techniques. The IEEE 1149.1 structures and methods are intended to test static (DC-coupled), single ended net- works. IEEE1149.6 is specifically designed for testing high- speed differential, including AC coupled networks. The SCAN90CP02 is intended for high-speed signalling up to 1.5 Gbps and includes IEEE1149.6 on all differential inputs and outputs. FAULT INSERTION Fault Insertion is a technique used to assist in the verification and debug of diagnostic software. During system testing faults are "injected" to simulate hardware failure and thus help verify the monitoring software can detect and diagnose these faults. In the SCAN90004 an IEEE1149.1 "stuck-at" instruc- tion can create a stuck-at condition, either high or low, on any pin or combination of pins. A more detailed description of the stuck-at feature can be found in NSC Applications note AN-1313. www.national.com 12 SCAN90CP02

Physical Dimensions inches (millimeters) unless otherwise noted LLP, Plastic, QUAD, Order Number SCAN90CP02SP (1000 piece Tape and Reel), SCAN90CP02SPX (4500 piece Tape and Reel) 13 www.national.com SCAN90CP02

LQFP, Plastic, Quad Order Number SCAN90CP02VY (250 piece Tray) SCAN90CP02VYX (1000 piece Tape and Reel) www.national.com 14 SCAN90CP02

15 www.national.com SCAN90CP02

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